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[AMDGPU] Add an asm directive to track code_object_version
Named '.amdgcn_code_object_version'. This directive sets the e_ident[ABIVERSION] in the ELF header, and should be used as the assumed COV for the rest of the asm file. This commit also weakens the --amdhsa-code-object-version CL flag. Previously, the CL flag took precedence over the IR flag. Now the IR flag/asm directive take precedence over the CL flag. This is implemented by merging a few COV-checking functions in AMDGPUBaseInfo.h.
1 parent 62a05d7 commit 954892f

34 files changed

+210
-173
lines changed

‎llvm/docs/AMDGPUUsage.rst

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15416,6 +15416,14 @@ command-line options such as ``-triple``, ``-mcpu``, and
1541615416
The target ID syntax used for code object V2 to V3 for this directive differs
1541715417
from that used elsewhere. See :ref:`amdgpu-target-id-v2-v3`.
1541815418

15419+
.. _amdgpu-assembler-directive-amdgcn-code-object-version:
15420+
15421+
.amdgcn_code_object_version <version>
15422+
+++++++++++++++++++++++++++++++++++++
15423+
15424+
Optional directive which declares the code object version to be generated by the
15425+
assembler. If not present, a default value will be used.
15426+
1541915427
.amdhsa_kernel <name>
1542015428
+++++++++++++++++++++
1542115429

‎llvm/include/llvm/MC/MCAssembler.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -161,6 +161,8 @@ class MCAssembler {
161161
// which flags to be set.
162162
unsigned ELFHeaderEFlags;
163163

164+
unsigned char ELFHeaderABIVersion = 0;
165+
164166
/// Used to communicate Linker Optimization Hint information between
165167
/// the Streamer and the .o writer
166168
MCLOHContainer LOHContainer;
@@ -279,6 +281,10 @@ class MCAssembler {
279281
unsigned getELFHeaderEFlags() const { return ELFHeaderEFlags; }
280282
void setELFHeaderEFlags(unsigned Flags) { ELFHeaderEFlags = Flags; }
281283

284+
/// ELF e_ident[EI_ABIVERSION] value
285+
unsigned char getELFHeaderABIVersion() const { return ELFHeaderABIVersion; }
286+
void setELFHeaderABIVersion(unsigned char V) { ELFHeaderABIVersion = V; }
287+
282288
/// MachO deployment target version information.
283289
const VersionInfoType &getVersionInfo() const { return VersionInfo; }
284290
void setVersionMin(MCVersionMinType Type, unsigned Major, unsigned Minor,

‎llvm/include/llvm/MC/MCELFObjectWriter.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,14 +52,13 @@ struct ELFRelocationEntry {
5252

5353
class MCELFObjectTargetWriter : public MCObjectTargetWriter {
5454
const uint8_t OSABI;
55-
const uint8_t ABIVersion;
5655
const uint16_t EMachine;
5756
const unsigned HasRelocationAddend : 1;
5857
const unsigned Is64Bit : 1;
5958

6059
protected:
6160
MCELFObjectTargetWriter(bool Is64Bit_, uint8_t OSABI_, uint16_t EMachine_,
62-
bool HasRelocationAddend_, uint8_t ABIVersion_ = 0);
61+
bool HasRelocationAddend_);
6362

6463
public:
6564
virtual ~MCELFObjectTargetWriter() = default;
@@ -97,7 +96,6 @@ class MCELFObjectTargetWriter : public MCObjectTargetWriter {
9796
/// \name Accessors
9897
/// @{
9998
uint8_t getOSABI() const { return OSABI; }
100-
uint8_t getABIVersion() const { return ABIVersion; }
10199
uint16_t getEMachine() const { return EMachine; }
102100
bool hasRelocationAddend() const { return HasRelocationAddend; }
103101
bool is64Bit() const { return Is64Bit; }

‎llvm/lib/MC/ELFObjectWriter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -417,7 +417,7 @@ void ELFWriter::writeHeader(const MCAssembler &Asm) {
417417
? int(ELF::ELFOSABI_GNU)
418418
: OSABI);
419419
// e_ident[EI_ABIVERSION]
420-
W.OS << char(OWriter.TargetObjectWriter->getABIVersion());
420+
W.OS << char(Asm.getELFHeaderABIVersion());
421421

422422
W.OS.write_zeros(ELF::EI_NIDENT - ELF::EI_PAD);
423423

‎llvm/lib/MC/MCELFObjectTargetWriter.cpp

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,8 @@ using namespace llvm;
1212

1313
MCELFObjectTargetWriter::MCELFObjectTargetWriter(bool Is64Bit_, uint8_t OSABI_,
1414
uint16_t EMachine_,
15-
bool HasRelocationAddend_,
16-
uint8_t ABIVersion_)
17-
: OSABI(OSABI_), ABIVersion(ABIVersion_), EMachine(EMachine_),
15+
bool HasRelocationAddend_)
16+
: OSABI(OSABI_), EMachine(EMachine_),
1817
HasRelocationAddend(HasRelocationAddend_), Is64Bit(Is64Bit_) {}
1918

2019
bool MCELFObjectTargetWriter::needsRelocateWithSymbol(const MCValue &,

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,8 @@ void AMDGPUAsmPrinter::initTargetStreamer(Module &M) {
117117
if (getTargetStreamer() && !getTargetStreamer()->getTargetID())
118118
initializeTargetID(M);
119119

120+
getTargetStreamer()->EmitDirectiveAMDGCNCodeObjectVersion(CodeObjectVersion);
121+
120122
if (TM.getTargetTriple().getOS() != Triple::AMDHSA &&
121123
TM.getTargetTriple().getOS() != Triple::AMDPAL)
122124
return;
@@ -230,8 +232,7 @@ void AMDGPUAsmPrinter::emitFunctionBodyEnd() {
230232
IsaInfo::getNumExtraSGPRs(
231233
&STM, CurrentProgramInfo.VCCUsed, CurrentProgramInfo.FlatUsed,
232234
getTargetStreamer()->getTargetID()->isXnackOnOrAny()),
233-
CurrentProgramInfo.VCCUsed, CurrentProgramInfo.FlatUsed,
234-
CodeObjectVersion);
235+
CurrentProgramInfo.VCCUsed, CurrentProgramInfo.FlatUsed);
235236

236237
Streamer.popSection();
237238
}
@@ -631,8 +632,8 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
631632
void AMDGPUAsmPrinter::initializeTargetID(const Module &M) {
632633
// In the beginning all features are either 'Any' or 'NotSupported',
633634
// depending on global target features. This will cover empty modules.
634-
getTargetStreamer()->initializeTargetID(
635-
*getGlobalSTI(), getGlobalSTI()->getFeatureString(), CodeObjectVersion);
635+
getTargetStreamer()->initializeTargetID(*getGlobalSTI(),
636+
getGlobalSTI()->getFeatureString());
636637

637638
// If module is empty, we are done.
638639
if (M.empty())

‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 18 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1295,6 +1295,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
12951295
unsigned NextFreeSGPR, SMRange SGPRRange,
12961296
unsigned &VGPRBlocks, unsigned &SGPRBlocks);
12971297
bool ParseDirectiveAMDGCNTarget();
1298+
bool ParseDirectiveAMDGCNCodeObjectVersion();
12981299
bool ParseDirectiveAMDHSAKernel();
12991300
bool ParseAMDKernelCodeTValue(StringRef ID, amd_kernel_code_t &Header);
13001301
bool ParseDirectiveAMDKernelCodeT();
@@ -5519,9 +5520,18 @@ bool AMDGPUAsmParser::ParseDirectiveAMDHSAKernel() {
55195520
}
55205521
}
55215522

5522-
getTargetStreamer().EmitAmdhsaKernelDescriptor(
5523-
getSTI(), KernelName, KD, NextFreeVGPR, NextFreeSGPR, ReserveVCC,
5524-
ReserveFlatScr, AMDGPU::getAmdhsaCodeObjectVersion());
5523+
getTargetStreamer().EmitAmdhsaKernelDescriptor(getSTI(), KernelName, KD,
5524+
NextFreeVGPR, NextFreeSGPR,
5525+
ReserveVCC, ReserveFlatScr);
5526+
return false;
5527+
}
5528+
5529+
bool AMDGPUAsmParser::ParseDirectiveAMDGCNCodeObjectVersion() {
5530+
uint32_t Version;
5531+
if (ParseAsAbsoluteExpression(Version))
5532+
return true;
5533+
5534+
getTargetStreamer().EmitDirectiveAMDGCNCodeObjectVersion(Version);
55255535
return false;
55265536
}
55275537

@@ -5841,6 +5851,9 @@ bool AMDGPUAsmParser::ParseDirective(AsmToken DirectiveID) {
58415851
if (IDVal == PALMD::AssemblerDirective)
58425852
return ParseDirectivePALMetadata();
58435853

5854+
if (IDVal == ".amdgcn_code_object_version")
5855+
return ParseDirectiveAMDGCNCodeObjectVersion();
5856+
58445857
return true;
58455858
}
58465859

@@ -7984,9 +7997,8 @@ void AMDGPUAsmParser::onBeginOfFile() {
79847997
return;
79857998

79867999
if (!getTargetStreamer().getTargetID())
7987-
getTargetStreamer().initializeTargetID(getSTI(), getSTI().getFeatureString(),
7988-
// TODO: Should try to check code object version from directive???
7989-
AMDGPU::getAmdhsaCodeObjectVersion());
8000+
getTargetStreamer().initializeTargetID(getSTI(),
8001+
getSTI().getFeatureString());
79908002

79918003
if (isHsaAbi(getSTI()))
79928004
getTargetStreamer().EmitDirectiveAMDGCNTarget();

‎llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2174,7 +2174,7 @@ AMDGPUDisassembler::decodeKernelDescriptorDirective(
21742174
KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32);
21752175
}
21762176

2177-
if (AMDGPU::getAmdhsaCodeObjectVersion() >= AMDGPU::AMDHSA_COV5)
2177+
if (AMDGPU::getDefaultCodeObjectVersion() >= AMDGPU::AMDHSA_COV5)
21782178
PRINT_DIRECTIVE(".amdhsa_uses_dynamic_stack",
21792179
KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK);
21802180

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -232,13 +232,11 @@ class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
232232
bool Is64Bit;
233233
bool HasRelocationAddend;
234234
uint8_t OSABI = ELF::ELFOSABI_NONE;
235-
uint8_t ABIVersion = 0;
236235

237236
public:
238-
ELFAMDGPUAsmBackend(const Target &T, const Triple &TT, uint8_t ABIVersion) :
239-
AMDGPUAsmBackend(T), Is64Bit(TT.getArch() == Triple::amdgcn),
240-
HasRelocationAddend(TT.getOS() == Triple::AMDHSA),
241-
ABIVersion(ABIVersion) {
237+
ELFAMDGPUAsmBackend(const Target &T, const Triple &TT)
238+
: AMDGPUAsmBackend(T), Is64Bit(TT.getArch() == Triple::amdgcn),
239+
HasRelocationAddend(TT.getOS() == Triple::AMDHSA) {
242240
switch (TT.getOS()) {
243241
case Triple::AMDHSA:
244242
OSABI = ELF::ELFOSABI_AMDGPU_HSA;
@@ -256,8 +254,7 @@ class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
256254

257255
std::unique_ptr<MCObjectTargetWriter>
258256
createObjectTargetWriter() const override {
259-
return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend,
260-
ABIVersion);
257+
return createAMDGPUELFObjectWriter(Is64Bit, OSABI, HasRelocationAddend);
261258
}
262259
};
263260

@@ -267,6 +264,5 @@ MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T,
267264
const MCSubtargetInfo &STI,
268265
const MCRegisterInfo &MRI,
269266
const MCTargetOptions &Options) {
270-
return new ELFAMDGPUAsmBackend(T, STI.getTargetTriple(),
271-
getHsaAbiVersion(&STI).value_or(0));
267+
return new ELFAMDGPUAsmBackend(T, STI.getTargetTriple());
272268
}

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp

Lines changed: 7 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,7 @@ namespace {
1818

1919
class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
2020
public:
21-
AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend,
22-
uint8_t ABIVersion);
21+
AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend);
2322

2423
protected:
2524
unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
@@ -29,12 +28,10 @@ class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
2928

3029
} // end anonymous namespace
3130

32-
AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit,
33-
uint8_t OSABI,
34-
bool HasRelocationAddend,
35-
uint8_t ABIVersion)
36-
: MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU,
37-
HasRelocationAddend, ABIVersion) {}
31+
AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
32+
bool HasRelocationAddend)
33+
: MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU,
34+
HasRelocationAddend) {}
3835

3936
unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
4037
const MCValue &Target,
@@ -100,9 +97,7 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
10097

10198
std::unique_ptr<MCObjectTargetWriter>
10299
llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
103-
bool HasRelocationAddend,
104-
uint8_t ABIVersion) {
100+
bool HasRelocationAddend) {
105101
return std::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
106-
HasRelocationAddend,
107-
ABIVersion);
102+
HasRelocationAddend);
108103
}

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,8 +42,8 @@ MCAsmBackend *createAMDGPUAsmBackend(const Target &T,
4242

4343
std::unique_ptr<MCObjectTargetWriter>
4444
createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
45-
bool HasRelocationAddend, uint8_t ABIVersion);
46-
} // End llvm namespace
45+
bool HasRelocationAddend);
46+
} // namespace llvm
4747

4848
#define GET_REGINFO_ENUM
4949
#include "AMDGPUGenRegisterInfo.inc"

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp

Lines changed: 11 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,12 @@ void AMDGPUTargetAsmStreamer::EmitDirectiveAMDGCNTarget() {
217217
OS << "\t.amdgcn_target \"" << getTargetID()->toString() << "\"\n";
218218
}
219219

220+
void AMDGPUTargetAsmStreamer::EmitDirectiveAMDGCNCodeObjectVersion(
221+
unsigned COV) {
222+
AMDGPUTargetStreamer::EmitDirectiveAMDGCNCodeObjectVersion(COV);
223+
OS << "\t.amdgcn_code_object_version " << COV << '\n';
224+
}
225+
220226
void
221227
AMDGPUTargetAsmStreamer::EmitAMDKernelCodeT(const amd_kernel_code_t &Header) {
222228
OS << "\t.amd_kernel_code_t\n";
@@ -286,7 +292,7 @@ bool AMDGPUTargetAsmStreamer::EmitCodeEnd(const MCSubtargetInfo &STI) {
286292
void AMDGPUTargetAsmStreamer::EmitAmdhsaKernelDescriptor(
287293
const MCSubtargetInfo &STI, StringRef KernelName,
288294
const amdhsa::kernel_descriptor_t &KD, uint64_t NextVGPR, uint64_t NextSGPR,
289-
bool ReserveVCC, bool ReserveFlatScr, unsigned CodeObjectVersion) {
295+
bool ReserveVCC, bool ReserveFlatScr) {
290296
IsaVersion IVersion = getIsaVersion(STI.getCPU());
291297

292298
OS << "\t.amdhsa_kernel " << KernelName << '\n';
@@ -479,6 +485,8 @@ MCELFStreamer &AMDGPUTargetELFStreamer::getStreamer() {
479485
void AMDGPUTargetELFStreamer::finish() {
480486
MCAssembler &MCA = getStreamer().getAssembler();
481487
MCA.setELFHeaderEFlags(getEFlags());
488+
MCA.setELFHeaderABIVersion(
489+
getELFABIVersion(STI.getTargetTriple(), CodeObjectVersion));
482490

483491
std::string Blob;
484492
const char *Vendor = getPALMetadata()->getVendor();
@@ -566,17 +574,7 @@ unsigned AMDGPUTargetELFStreamer::getEFlagsUnknownOS() {
566574
unsigned AMDGPUTargetELFStreamer::getEFlagsAMDHSA() {
567575
assert(isHsaAbi(STI));
568576

569-
if (std::optional<uint8_t> HsaAbiVer = getHsaAbiVersion(&STI)) {
570-
switch (*HsaAbiVer) {
571-
case ELF::ELFABIVERSION_AMDGPU_HSA_V3:
572-
return getEFlagsV3();
573-
case ELF::ELFABIVERSION_AMDGPU_HSA_V4:
574-
case ELF::ELFABIVERSION_AMDGPU_HSA_V5:
575-
return getEFlagsV4();
576-
}
577-
}
578-
579-
llvm_unreachable("HSA OS ABI Version identification must be defined");
577+
return getEFlagsV4();
580578
}
581579

582580
unsigned AMDGPUTargetELFStreamer::getEFlagsAMDPAL() {
@@ -777,8 +775,7 @@ bool AMDGPUTargetELFStreamer::EmitCodeEnd(const MCSubtargetInfo &STI) {
777775
void AMDGPUTargetELFStreamer::EmitAmdhsaKernelDescriptor(
778776
const MCSubtargetInfo &STI, StringRef KernelName,
779777
const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
780-
uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
781-
unsigned CodeObjectVersion) {
778+
uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr) {
782779
auto &Streamer = getStreamer();
783780
auto &Context = Streamer.getContext();
784781

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