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davemgreendavemgreen
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[AArch64] Return an invalid cost for vscale x 2 x i128 srem.
This protects against invalid size requests on scalable vectors by checking the original VT, not the legalized type when checking for scalars. The cost returned is now invalid, which lines up with the codegen not being able to produce a result.
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+17
-1
lines changed

2 files changed

+17
-1
lines changed

‎llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3726,7 +3726,7 @@ InstructionCost AArch64TTIImpl::getArithmeticInstrCost(
37263726
// add/cmp/csel/csneg should have similar cost while asr/negs/and should
37273727
// have similar cost.
37283728
auto VT = TLI->getValueType(DL, Ty);
3729-
if (LT.second.isScalarInteger() && VT.getSizeInBits() <= 64) {
3729+
if (VT.isScalarInteger() && VT.getSizeInBits() <= 64) {
37303730
if (Op2Info.isPowerOf2()) {
37313731
return ISD == ISD::SDIV ? (3 * AddCost + AsrCost)
37323732
: (3 * AsrCost + AddCost);

‎llvm/test/Analysis/CostModel/AArch64/sve-rem.ll

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@ define void @srem() {
2323
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16i8 = srem <16 x i8> undef, undef
2424
; CHECK-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V32i8 = srem <32 x i8> undef, undef
2525
; CHECK-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %V64i8 = srem <64 x i8> undef, undef
26+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = srem <vscale x 2 x i128> undef, undef
2627
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %NV2i64 = srem <vscale x 2 x i64> undef, undef
2728
; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %NV4i64 = srem <vscale x 4 x i64> undef, undef
2829
; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %NV8i64 = srem <vscale x 8 x i64> undef, undef
@@ -61,6 +62,7 @@ define void @srem() {
6162
%V16i8 = srem <16 x i8> undef, undef
6263
%V32i8 = srem <32 x i8> undef, undef
6364
%V64i8 = srem <64 x i8> undef, undef
65+
%NV2i128 = srem <vscale x 2 x i128> undef, undef
6466
%NV2i64 = srem <vscale x 2 x i64> undef, undef
6567
%NV4i64 = srem <vscale x 4 x i64> undef, undef
6668
%NV8i64 = srem <vscale x 8 x i64> undef, undef
@@ -102,6 +104,7 @@ define void @urem() {
102104
; CHECK-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V16i8 = urem <16 x i8> undef, undef
103105
; CHECK-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V32i8 = urem <32 x i8> undef, undef
104106
; CHECK-NEXT: Cost Model: Found an estimated cost of 72 for instruction: %V64i8 = urem <64 x i8> undef, undef
107+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = urem <vscale x 2 x i128> undef, undef
105108
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %NV2i64 = urem <vscale x 2 x i64> undef, undef
106109
; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %NV4i64 = urem <vscale x 4 x i64> undef, undef
107110
; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %NV8i64 = urem <vscale x 8 x i64> undef, undef
@@ -140,6 +143,7 @@ define void @urem() {
140143
%V16i8 = urem <16 x i8> undef, undef
141144
%V32i8 = urem <32 x i8> undef, undef
142145
%V64i8 = urem <64 x i8> undef, undef
146+
%NV2i128 = urem <vscale x 2 x i128> undef, undef
143147
%NV2i64 = urem <vscale x 2 x i64> undef, undef
144148
%NV4i64 = urem <vscale x 4 x i64> undef, undef
145149
%NV8i64 = urem <vscale x 8 x i64> undef, undef
@@ -181,6 +185,7 @@ define void @srem_uniformconst() {
181185
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16i8 = srem <16 x i8> undef, splat (i8 7)
182186
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V32i8 = srem <32 x i8> undef, splat (i8 7)
183187
; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V64i8 = srem <64 x i8> undef, splat (i8 7)
188+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 7)
184189
; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 7)
185190
; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 7)
186191
; CHECK-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 7)
@@ -219,6 +224,7 @@ define void @srem_uniformconst() {
219224
%V16i8 = srem <16 x i8> undef, splat (i8 7)
220225
%V32i8 = srem <32 x i8> undef, splat (i8 7)
221226
%V64i8 = srem <64 x i8> undef, splat (i8 7)
227+
%NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 7)
222228
%NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 7)
223229
%NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 7)
224230
%NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 7)
@@ -260,6 +266,7 @@ define void @urem_uniformconst() {
260266
; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16i8 = urem <16 x i8> undef, splat (i8 7)
261267
; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32i8 = urem <32 x i8> undef, splat (i8 7)
262268
; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V64i8 = urem <64 x i8> undef, splat (i8 7)
269+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 7)
263270
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 7)
264271
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 7)
265272
; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 7)
@@ -298,6 +305,7 @@ define void @urem_uniformconst() {
298305
%V16i8 = urem <16 x i8> undef, splat (i8 7)
299306
%V32i8 = urem <32 x i8> undef, splat (i8 7)
300307
%V64i8 = urem <64 x i8> undef, splat (i8 7)
308+
%NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 7)
301309
%NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 7)
302310
%NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 7)
303311
%NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 7)
@@ -339,6 +347,7 @@ define void @srem_uniformconstpow2() {
339347
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16i8 = srem <16 x i8> undef, splat (i8 16)
340348
; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32i8 = srem <32 x i8> undef, splat (i8 16)
341349
; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64i8 = srem <64 x i8> undef, splat (i8 16)
350+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 16)
342351
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 16)
343352
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 16)
344353
; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 16)
@@ -377,6 +386,7 @@ define void @srem_uniformconstpow2() {
377386
%V16i8 = srem <16 x i8> undef, splat (i8 16)
378387
%V32i8 = srem <32 x i8> undef, splat (i8 16)
379388
%V64i8 = srem <64 x i8> undef, splat (i8 16)
389+
%NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 16)
380390
%NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 16)
381391
%NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 16)
382392
%NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 16)
@@ -418,6 +428,7 @@ define void @urem_uniformconstpow2() {
418428
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i8 = urem <16 x i8> undef, splat (i8 16)
419429
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32i8 = urem <32 x i8> undef, splat (i8 16)
420430
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64i8 = urem <64 x i8> undef, splat (i8 16)
431+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 16)
421432
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 16)
422433
; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 16)
423434
; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 16)
@@ -456,6 +467,7 @@ define void @urem_uniformconstpow2() {
456467
%V16i8 = urem <16 x i8> undef, splat (i8 16)
457468
%V32i8 = urem <32 x i8> undef, splat (i8 16)
458469
%V64i8 = urem <64 x i8> undef, splat (i8 16)
470+
%NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 16)
459471
%NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 16)
460472
%NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 16)
461473
%NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 16)
@@ -497,6 +509,7 @@ define void @srem_uniformconstnegpow2() {
497509
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V16i8 = srem <16 x i8> undef, splat (i8 -16)
498510
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V32i8 = srem <32 x i8> undef, splat (i8 -16)
499511
; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V64i8 = srem <64 x i8> undef, splat (i8 -16)
512+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 -16)
500513
; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 -16)
501514
; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 -16)
502515
; CHECK-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 -16)
@@ -535,6 +548,7 @@ define void @srem_uniformconstnegpow2() {
535548
%V16i8 = srem <16 x i8> undef, splat (i8 -16)
536549
%V32i8 = srem <32 x i8> undef, splat (i8 -16)
537550
%V64i8 = srem <64 x i8> undef, splat (i8 -16)
551+
%NV2i128 = srem <vscale x 2 x i128> undef, splat (i128 -16)
538552
%NV2i64 = srem <vscale x 2 x i64> undef, splat (i64 -16)
539553
%NV4i64 = srem <vscale x 4 x i64> undef, splat (i64 -16)
540554
%NV8i64 = srem <vscale x 8 x i64> undef, splat (i64 -16)
@@ -576,6 +590,7 @@ define void @urem_uniformconstnegpow2() {
576590
; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16i8 = urem <16 x i8> undef, splat (i8 -16)
577591
; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32i8 = urem <32 x i8> undef, splat (i8 -16)
578592
; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V64i8 = urem <64 x i8> undef, splat (i8 -16)
593+
; CHECK-NEXT: Cost Model: Invalid cost for instruction: %NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 -16)
579594
; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 -16)
580595
; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 -16)
581596
; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 -16)
@@ -614,6 +629,7 @@ define void @urem_uniformconstnegpow2() {
614629
%V16i8 = urem <16 x i8> undef, splat (i8 -16)
615630
%V32i8 = urem <32 x i8> undef, splat (i8 -16)
616631
%V64i8 = urem <64 x i8> undef, splat (i8 -16)
632+
%NV2i128 = urem <vscale x 2 x i128> undef, splat (i128 -16)
617633
%NV2i64 = urem <vscale x 2 x i64> undef, splat (i64 -16)
618634
%NV4i64 = urem <vscale x 4 x i64> undef, splat (i64 -16)
619635
%NV8i64 = urem <vscale x 8 x i64> undef, splat (i64 -16)

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