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Revert "[AArch64] Codegen support for FEAT_PAuthLR"
This reverts commit 5992ce9. Builtbot failures with expensive checks enabled.
1 parent 8866558 commit 9f0f558

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21 files changed

+25
-752
lines changed

21 files changed

+25
-752
lines changed

‎clang/include/clang/Basic/LangOptions.def

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -456,7 +456,6 @@ ENUM_LANGOPT(SignReturnAddressScope, SignReturnAddressScopeKind, 2, SignReturnAd
456456
ENUM_LANGOPT(SignReturnAddressKey, SignReturnAddressKeyKind, 1, SignReturnAddressKeyKind::AKey,
457457
"Key used for return address signing")
458458
LANGOPT(BranchTargetEnforcement, 1, 0, "Branch-target enforcement enabled")
459-
LANGOPT(BranchProtectionPAuthLR, 1, 0, "Use PC as a diversifier using PAuthLR NOP instructions.")
460459

461460
LANGOPT(SpeculativeLoadHardening, 1, 0, "Speculative load hardening enabled")
462461

‎clang/include/clang/Basic/TargetInfo.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1372,7 +1372,6 @@ class TargetInfo : public TransferrableTargetInfo,
13721372
LangOptions::SignReturnAddressKeyKind SignKey =
13731373
LangOptions::SignReturnAddressKeyKind::AKey;
13741374
bool BranchTargetEnforcement = false;
1375-
bool BranchProtectionPAuthLR = false;
13761375
};
13771376

13781377
/// Determine if the Architecture in this TargetInfo supports branch

‎clang/include/clang/Driver/Options.td

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7000,8 +7000,6 @@ def msign_return_address_key_EQ : Joined<["-"], "msign-return-address-key=">,
70007000
Values<"a_key,b_key">;
70017001
def mbranch_target_enforce : Flag<["-"], "mbranch-target-enforce">,
70027002
MarshallingInfoFlag<LangOpts<"BranchTargetEnforcement">>;
7003-
def mbranch_protection_pauth_lr : Flag<["-"], "mbranch-protection-pauth-lr">,
7004-
MarshallingInfoFlag<LangOpts<"BranchProtectionPAuthLR">>;
70057003
def fno_dllexport_inlines : Flag<["-"], "fno-dllexport-inlines">,
70067004
MarshallingInfoNegativeFlag<LangOpts<"DllExportInlines">>;
70077005
def cfguard_no_checks : Flag<["-"], "cfguard-no-checks">,

‎clang/lib/Basic/Targets/AArch64.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -225,7 +225,6 @@ bool AArch64TargetInfo::validateBranchProtection(StringRef Spec, StringRef,
225225
BPI.SignKey = LangOptions::SignReturnAddressKeyKind::BKey;
226226

227227
BPI.BranchTargetEnforcement = PBP.BranchTargetEnforcement;
228-
BPI.BranchProtectionPAuthLR = PBP.BranchProtectionPAuthLR;
229228
return true;
230229
}
231230

‎clang/lib/Basic/Targets/ARM.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -419,7 +419,6 @@ bool ARMTargetInfo::validateBranchProtection(StringRef Spec, StringRef Arch,
419419
BPI.SignKey = LangOptions::SignReturnAddressKeyKind::AKey;
420420

421421
BPI.BranchTargetEnforcement = PBP.BranchTargetEnforcement;
422-
BPI.BranchProtectionPAuthLR = PBP.BranchProtectionPAuthLR;
423422
return true;
424423
}
425424

‎clang/lib/CodeGen/CodeGenModule.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1106,9 +1106,6 @@ void CodeGenModule::Release() {
11061106
if (LangOpts.BranchTargetEnforcement)
11071107
getModule().addModuleFlag(llvm::Module::Min, "branch-target-enforcement",
11081108
1);
1109-
if (LangOpts.BranchProtectionPAuthLR)
1110-
getModule().addModuleFlag(llvm::Module::Min, "branch-protection-pauth-lr",
1111-
1);
11121109
if (LangOpts.hasSignReturnAddress())
11131110
getModule().addModuleFlag(llvm::Module::Min, "sign-return-address", 1);
11141111
if (LangOpts.isSignReturnAddressScopeAll())

‎clang/lib/CodeGen/Targets/AArch64.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -136,8 +136,6 @@ class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
136136

137137
Fn->addFnAttr("branch-target-enforcement",
138138
BPI.BranchTargetEnforcement ? "true" : "false");
139-
Fn->addFnAttr("branch-protection-pauth-lr",
140-
BPI.BranchProtectionPAuthLR ? "true" : "false");
141139
}
142140

143141
bool isScalarizableAsmOperand(CodeGen::CodeGenFunction &CGF,

‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1497,7 +1497,7 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
14971497
<< Triple.getArchName();
14981498

14991499
StringRef Scope, Key;
1500-
bool IndirectBranches, BranchProtectionPAuthLR;
1500+
bool IndirectBranches;
15011501

15021502
if (A->getOption().matches(options::OPT_msign_return_address_EQ)) {
15031503
Scope = A->getValue();
@@ -1506,7 +1506,6 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
15061506
<< A->getSpelling() << Scope;
15071507
Key = "a_key";
15081508
IndirectBranches = false;
1509-
BranchProtectionPAuthLR = false;
15101509
} else {
15111510
StringRef DiagMsg;
15121511
llvm::ARM::ParsedBranchProtection PBP;
@@ -1518,7 +1517,6 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
15181517
<< "b-key" << A->getAsString(Args);
15191518
Scope = PBP.Scope;
15201519
Key = PBP.Key;
1521-
BranchProtectionPAuthLR = PBP.BranchProtectionPAuthLR;
15221520
IndirectBranches = PBP.BranchTargetEnforcement;
15231521
}
15241522

@@ -1527,9 +1525,6 @@ static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
15271525
if (!Scope.equals("none"))
15281526
CmdArgs.push_back(
15291527
Args.MakeArgString(Twine("-msign-return-address-key=") + Key));
1530-
if (BranchProtectionPAuthLR)
1531-
CmdArgs.push_back(
1532-
Args.MakeArgString(Twine("-mbranch-protection-pauth-lr")));
15331528
if (IndirectBranches)
15341529
CmdArgs.push_back("-mbranch-target-enforce");
15351530
}

‎clang/test/CodeGen/aarch64-branch-protection-attr.c

Lines changed: 0 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -46,24 +46,6 @@ __attribute__ ((target("branch-protection=pac-ret+leaf+bti")))
4646
void btileaf() {}
4747
// CHECK: define{{.*}} void @btileaf() #[[#BTIPACLEAF:]]
4848

49-
50-
__attribute__ ((target("branch-protection=pac-ret+pc")))
51-
void pauthlr() {}
52-
// CHECK: define{{.*}} void @pauthlr() #[[#PAUTHLR:]]
53-
54-
__attribute__ ((target("branch-protection=pac-ret+pc+b-key")))
55-
void pauthlr_bkey() {}
56-
// CHECK: define{{.*}} void @pauthlr_bkey() #[[#PAUTHLR_BKEY:]]
57-
58-
__attribute__ ((target("branch-protection=pac-ret+pc+leaf")))
59-
void pauthlr_leaf() {}
60-
// CHECK: define{{.*}} void @pauthlr_leaf() #[[#PAUTHLR_LEAF:]]
61-
62-
__attribute__ ((target("branch-protection=pac-ret+pc+bti")))
63-
void pauthlr_bti() {}
64-
// CHECK: define{{.*}} void @pauthlr_bti() #[[#PAUTHLR_BTI:]]
65-
66-
6749
// CHECK-DAG: attributes #[[#NONE]] = { {{.*}} "branch-target-enforcement"="false" {{.*}} "sign-return-address"="none"
6850

6951
// CHECK-DAG: attributes #[[#STD]] = { {{.*}} "branch-target-enforcement"="true" {{.*}} "sign-return-address"="non-leaf" "sign-return-address-key"="a_key"
@@ -79,13 +61,3 @@ void pauthlr_bti() {}
7961
// CHECK-DAG: attributes #[[#PACBKEYLEAF]] = { {{.*}} "branch-target-enforcement"="false" {{.*}}"sign-return-address"="all" "sign-return-address-key"="b_key"
8062

8163
// CHECK-DAG: attributes #[[#BTIPACLEAF]] = { {{.*}}"branch-target-enforcement"="true" {{.*}} "sign-return-address"="all" "sign-return-address-key"="a_key"
82-
83-
84-
// CHECK-DAG: attributes #[[#PAUTHLR]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="false" {{.*}}"sign-return-address"="non-leaf" "sign-return-address-key"="a_key"
85-
86-
// CHECK-DAG: attributes #[[#PAUTHLR_BKEY]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="false" {{.*}}"sign-return-address"="non-leaf" "sign-return-address-key"="b_key"
87-
88-
// CHECK-DAG: attributes #[[#PAUTHLR_LEAF]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="false" {{.*}}"sign-return-address"="all" "sign-return-address-key"="a_key"
89-
90-
// CHECK-DAG: attributes #[[#PAUTHLR_BTI]] = { {{.*}}"branch-protection-pauth-lr"="true" {{.*}}"branch-target-enforcement"="true" {{.*}}"sign-return-address"="non-leaf" "sign-return-address-key"="a_key"
91-

‎clang/test/Driver/aarch64-pauth-lr.c

Lines changed: 0 additions & 23 deletions
This file was deleted.

‎clang/test/Driver/aarch64-v95a.c

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,13 +1,10 @@
1-
// ===== Base v9.5a architecture =====
2-
31
// RUN: %clang -target aarch64 -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
42
// RUN: %clang -target aarch64 -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
53
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
64
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
75
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
86
// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A %s
97
// GENERICV95A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a"
10-
118
// RUN: %clang -target aarch64_be -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
129
// RUN: %clang -target aarch64_be -march=armv9.5-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
1310
// RUN: %clang -target aarch64 -mbig-endian -march=armv9.5a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
@@ -21,7 +18,3 @@
2118
// RUN: %clang -target aarch64 -march=armv9.5a+cpa -### -c %s 2>&1 | FileCheck -check-prefix=V95A-CPA %s
2219
// RUN: %clang -target aarch64 -march=armv9.5-a+cpa -### -c %s 2>&1 | FileCheck -check-prefix=V95A-CPA %s
2320
// V95A-CPA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+cpa"
24-
25-
// RUN: %clang -target aarch64 -march=armv9.5a+pauth-lr -### -c %s 2>&1 | FileCheck -check-prefix=V95A-PAUTHLR %s
26-
// RUN: %clang -target aarch64 -march=armv9.5-a+pauth-lr -### -c %s 2>&1 | FileCheck -check-prefix=V95A-PAUTHLR %s
27-
// V95A-PAUTHLR: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+pauth-lr"

‎llvm/include/llvm/TargetParser/AArch64TargetParser.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -174,7 +174,6 @@ enum ArchExtKind : unsigned {
174174
AEK_SMEF8F32 = 70, // FEAT_SME_F8F32
175175
AEK_SMEFA64 = 71, // FEAT_SME_FA64
176176
AEK_CPA = 72, // FEAT_CPA
177-
AEK_PAUTHLR = 73, // FEAT_PAuth_LR
178177
AEK_NUM_EXTENSIONS
179178
};
180179
using ExtensionBitset = Bitset<AEK_NUM_EXTENSIONS>;
@@ -298,7 +297,6 @@ inline constexpr ExtensionInfo Extensions[] = {
298297
{"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", FEAT_INIT, "+sme2,+fp8", 0},
299298
{"sme-fa64", AArch64::AEK_SMEFA64, "+sme-fa64", "-sme-fa64", FEAT_INIT, "", 0},
300299
{"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0},
301-
{"pauth-lr", AArch64::AEK_PAUTHLR, "+pauth-lr", "-pauth-lr", FEAT_INIT, "", 0},
302300
// Special cases
303301
{"none", AArch64::AEK_NONE, {}, {}, FEAT_INIT, "", ExtensionInfo::MaxFMVPriority},
304302
};

‎llvm/include/llvm/TargetParser/ARMTargetParserCommon.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,6 @@ struct ParsedBranchProtection {
4141
StringRef Scope;
4242
StringRef Key;
4343
bool BranchTargetEnforcement;
44-
bool BranchProtectionPAuthLR;
4544
};
4645

4746
bool parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP,

‎llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -8802,23 +8802,12 @@ AArch64InstrInfo::getOutliningTypeImpl(MachineBasicBlock::iterator &MIT,
88028802
// Don't outline anything used for return address signing. The outlined
88038803
// function will get signed later if needed
88048804
switch (MI.getOpcode()) {
8805-
case AArch64::PACM:
88068805
case AArch64::PACIASP:
88078806
case AArch64::PACIBSP:
8808-
case AArch64::PACIASPPC:
8809-
case AArch64::PACIBSPPC:
88108807
case AArch64::AUTIASP:
88118808
case AArch64::AUTIBSP:
8812-
case AArch64::AUTIASPPCi:
8813-
case AArch64::AUTIASPPCr:
8814-
case AArch64::AUTIBSPPCi:
8815-
case AArch64::AUTIBSPPCr:
88168809
case AArch64::RETAA:
88178810
case AArch64::RETAB:
8818-
case AArch64::RETAASPPCi:
8819-
case AArch64::RETAASPPCr:
8820-
case AArch64::RETABSPPCi:
8821-
case AArch64::RETABSPPCr:
88228811
case AArch64::EMITBKEY:
88238812
case AArch64::PAUTH_PROLOGUE:
88248813
case AArch64::PAUTH_EPILOGUE:

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp

Lines changed: 10 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -93,24 +93,16 @@ AArch64FunctionInfo::AArch64FunctionInfo(const Function &F,
9393
// TODO: skip functions that have no instrumented allocas for optimization
9494
IsMTETagged = F.hasFnAttribute(Attribute::SanitizeMemTag);
9595

96-
// BTI/PAuthLR may be set either on the function or the module. Set Bool from
97-
// either the function attribute or module attribute, depending on what is
98-
// set.
99-
// Note: the module attributed is numeric (0 or 1) but the function attribute
100-
// is stringy ("true" or "false").
101-
auto TryFnThenModule = [&](StringRef AttrName, bool &Bool) {
102-
if (F.hasFnAttribute(AttrName)) {
103-
const StringRef V = F.getFnAttribute(AttrName).getValueAsString();
104-
assert(V.equals_insensitive("true") || V.equals_insensitive("false"));
105-
Bool = V.equals_insensitive("true");
106-
} else if (const auto *ModVal = mdconst::extract_or_null<ConstantInt>(
107-
F.getParent()->getModuleFlag(AttrName))) {
108-
Bool = ModVal->getZExtValue();
109-
}
110-
};
111-
112-
TryFnThenModule("branch-target-enforcement", BranchTargetEnforcement);
113-
TryFnThenModule("branch-protection-pauth-lr", BranchProtectionPAuthLR);
96+
if (!F.hasFnAttribute("branch-target-enforcement")) {
97+
if (const auto *BTE = mdconst::extract_or_null<ConstantInt>(
98+
F.getParent()->getModuleFlag("branch-target-enforcement")))
99+
BranchTargetEnforcement = BTE->getZExtValue();
100+
} else {
101+
const StringRef BTIEnable =
102+
F.getFnAttribute("branch-target-enforcement").getValueAsString();
103+
assert(BTIEnable == "true" || BTIEnable == "false");
104+
BranchTargetEnforcement = BTIEnable == "true";
105+
}
114106

115107
// The default stack probe size is 4096 if the function has no
116108
// stack-probe-size attribute. This is a safe default because it is the

‎llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,6 @@
2222
#include "llvm/CodeGen/MachineFunction.h"
2323
#include "llvm/IR/Function.h"
2424
#include "llvm/MC/MCLinkerOptimizationHint.h"
25-
#include "llvm/MC/MCSymbol.h"
2625
#include <cassert>
2726
#include <optional>
2827

@@ -165,21 +164,10 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
165164
/// SignWithBKey modifies the default PAC-RET mode to signing with the B key.
166165
bool SignWithBKey = false;
167166

168-
/// SigningInstrOffset captures the offset of the PAC-RET signing instruction
169-
/// within the prologue, so it can be re-used for authentication in the
170-
/// epilogue when using PC as a second salt (FEAT_PAuth_LR)
171-
MCSymbol *SignInstrLabel = nullptr;
172-
173167
/// BranchTargetEnforcement enables placing BTI instructions at potential
174168
/// indirect branch destinations.
175169
bool BranchTargetEnforcement = false;
176170

177-
/// Indicates that SP signing should be diversified with PC as-per PAuthLR.
178-
/// This is set by -mbranch-protection and will emit NOP instructions unless
179-
/// the subtarget feature +pauthlr is also used (in which case non-NOP
180-
/// instructions are emitted).
181-
bool BranchProtectionPAuthLR = false;
182-
183171
/// Whether this function has an extended frame record [Ctx, FP, LR]. If so,
184172
/// bit 60 of the in-memory FP will be 1 to enable other tools to detect the
185173
/// extended record.
@@ -448,16 +436,10 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
448436
bool needsShadowCallStackPrologueEpilogue(MachineFunction &MF) const;
449437

450438
bool shouldSignWithBKey() const { return SignWithBKey; }
451-
452-
MCSymbol *getSigningInstrLabel() const { return SignInstrLabel; }
453-
void setSigningInstrLabel(MCSymbol *Label) { SignInstrLabel = Label; }
454-
455439
bool isMTETagged() const { return IsMTETagged; }
456440

457441
bool branchTargetEnforcement() const { return BranchTargetEnforcement; }
458442

459-
bool branchProtectionPAuthLR() const { return BranchProtectionPAuthLR; }
460-
461443
void setHasSwiftAsyncContext(bool HasContext) {
462444
HasSwiftAsyncContext = HasContext;
463445
}

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