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[AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (#115669)
For the same reason that we do not translate lifetime markers in a -O0, we should not translate them for optnone functions too.
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llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2166,7 +2166,8 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
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case Intrinsic::lifetime_start:
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case Intrinsic::lifetime_end: {
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// No stack colouring in O0, discard region information.
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if (MF->getTarget().getOptLevel() == CodeGenOptLevel::None)
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if (MF->getTarget().getOptLevel() == CodeGenOptLevel::None ||
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MF->getFunction().hasOptNone())
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return true;
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unsigned Op = ID == Intrinsic::lifetime_start ? TargetOpcode::LIFETIME_START

llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1477,6 +1477,20 @@ define void @test_lifetime_intrin() {
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ret void
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}
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define void @test_lifetime_intrin_optnone() optnone noinline {
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; CHECK-LABEL: name: test_lifetime_intrin_optnone
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; CHECK: RET_ReallyLR
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; O3-LABEL: name: test_lifetime_intrin_optnone
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; O3: {{%[0-9]+}}:_(p0) = G_FRAME_INDEX %stack.0.slot
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; O3-NEXT: G_STORE
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; O3-NEXT: RET_ReallyLR
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%slot = alloca i8, i32 4
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call void @llvm.lifetime.start.p0(i64 0, ptr %slot)
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store volatile i8 10, ptr %slot
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call void @llvm.lifetime.end.p0(i64 0, ptr %slot)
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ret void
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}
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define void @test_load_store_atomics(ptr %addr) {
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; CHECK-LABEL: name: test_load_store_atomics
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; CHECK: [[ADDR:%[0-9]+]]:_(p0) = COPY $x0

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