NFC: Move check for artificial regunit to MachineRegisterInfo

Author: sdesmalen-arm

llvm/include/llvm/CodeGen/MachineRegisterInfo.h

@@ -980,6 +980,12 @@ class MachineRegisterInfo {
   /// expected.
   bool isReservedRegUnit(unsigned Unit) const;
 
+  /// Returns true when the given register unit is considered artificial.
+  ///
+  /// Register units are considered artificial when at least one of the
+  /// root registers is artificial.
+  bool isArtificialRegUnit(unsigned Unit) const;
+
   /// isAllocatable - Returns true when PhysReg belongs to an allocatable
   /// register class and it hasn't been reserved.
   ///

llvm/lib/CodeGen/LiveIntervals.cpp

@@ -734,12 +734,8 @@ void LiveIntervals::addKillFlags(const VirtRegMap *VRM) {
     for (MCRegUnitMaskIterator UI(PhysReg, TRI); UI.isValid(); ++UI) {
       auto [Unit, Bitmask] = *UI;
       // Record lane mask for all artificial RegUnits for this physreg.
-      for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) {
-        if (TRI->isArtificial(*Root)) {
-          ArtificialLanes |= Bitmask;
-          break;
-        }
-      }
+      if (MRI->isArtificialRegUnit(Unit))
+        ArtificialLanes |= Bitmask;
       const LiveRange &RURange = getRegUnit(Unit);
       if (RURange.empty())
         continue;

llvm/lib/CodeGen/MachineRegisterInfo.cpp

@@ -659,3 +659,11 @@ bool MachineRegisterInfo::isReservedRegUnit(unsigned Unit) const {
   }
   return false;
 }
+
+bool MachineRegisterInfo::isArtificialRegUnit(unsigned Unit) const {
+  const TargetRegisterInfo *TRI = getTargetRegisterInfo();
+  for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root)
+    if (TRI->isArtificial(*Root))
+      return true;
+  return false;
+}