[Exegesis][RISCV] Only check if vd and vs2 are alias in rvv/reduction.test

This test was designed to check if we alias between vd and vs2. While we
make sure there is no alias relationship between vd and vs1 in the
snippet generator, there is nothing preventing the randomizer to assign
the same register between vs1 and vs2. Which makes this test pretty
unstable.
However, we really only care if vd and vs2 are alias, so instead of
going an extra mile to check whether vd and vs1 are NOT alias, which is
actually irrelevant, we should just focusing on checking if vd and vs2
are alias.

Author: mshockwave

llvm/test/tools/llvm-exegesis/RISCV/rvv/reduction.test

@@ -1,7 +1,7 @@
 # RUN: llvm-exegesis -mtriple=riscv64 -mcpu=sifive-p670 -benchmark-phase=assemble-measured-code --mode=latency --opcode-name=PseudoVWREDSUMU_VS_M8_E32 --min-instructions=100 | \
 # RUN:    FileCheck %s
 
-# Make sure reduction ops don't have alias between vd and vs1
+# Make sure reduction ops alias between vd and vs2
 # CHECK:      instructions:
 # CHECK-NEXT: PseudoVWREDSUMU_VS_M8_E32
-# CHECK-NOT:  V[[REG:[0-9]+]] V[[REG]] V{{[0-9]+}}M8 V[[REG]]
+# CHECK-SAME:  V[[REG:[0-9]+]] V[[REG]] V{{[0-9]+}}M8