Skip to content

Commit b926fd7

Browse files
committed
Pull out repeated value types. NFCI.
llvm-svn: 344354
1 parent f5b1892 commit b926fd7

File tree

1 file changed

+5
-3
lines changed

1 file changed

+5
-3
lines changed

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1079,7 +1079,7 @@ SDValue VectorLegalizer::ExpandCTLZ(SDValue Op) {
10791079
if (Op.getOpcode() == ISD::CTLZ_ZERO_UNDEF &&
10801080
TLI.isOperationLegalOrCustom(ISD::CTLZ, VT)) {
10811081
SDLoc DL(Op);
1082-
return DAG.getNode(ISD::CTLZ, DL, Op.getValueType(), Op.getOperand(0));
1082+
return DAG.getNode(ISD::CTLZ, DL, VT, Op.getOperand(0));
10831083
}
10841084

10851085
// If we have the appropriate vector bit operations, it is better to use them
@@ -1095,10 +1095,12 @@ SDValue VectorLegalizer::ExpandCTLZ(SDValue Op) {
10951095
}
10961096

10971097
SDValue VectorLegalizer::ExpandCTTZ_ZERO_UNDEF(SDValue Op) {
1098+
EVT VT = Op.getValueType();
1099+
10981100
// If the non-ZERO_UNDEF version is supported we can use that instead.
1099-
if (TLI.isOperationLegalOrCustom(ISD::CTTZ, Op.getValueType())) {
1101+
if (TLI.isOperationLegalOrCustom(ISD::CTTZ, VT)) {
11001102
SDLoc DL(Op);
1101-
return DAG.getNode(ISD::CTTZ, DL, Op.getValueType(), Op.getOperand(0));
1103+
return DAG.getNode(ISD::CTTZ, DL, VT, Op.getOperand(0));
11021104
}
11031105

11041106
// Otherwise go ahead and unroll.

0 commit comments

Comments
 (0)