@@ -152,7 +152,6 @@ for.end: ; preds = %for.cond
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@h = global i64 0
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- ; TODO: Currently we generate SCEV check code for the same predicate twice.
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define void @implied_wrap_predicate (ptr %A , ptr %B , ptr %C ) {
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; CHECK-LABEL: define void @implied_wrap_predicate
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; CHECK-SAME: (ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]]) {
@@ -184,17 +183,11 @@ define void @implied_wrap_predicate(ptr %A, ptr %B, ptr %C) {
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; CHECK-NEXT: [[TMP16:%.*]] = icmp ult i16 [[TMP15]], 2
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; CHECK-NEXT: [[TMP17:%.*]] = icmp ugt i64 [[TMP8]], 65535
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; CHECK-NEXT: [[TMP18:%.*]] = or i1 [[TMP16]], [[TMP17]]
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- ; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[TMP8]] to i16
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- ; CHECK-NEXT: [[TMP20:%.*]] = add i16 1, [[TMP19]]
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- ; CHECK-NEXT: [[TMP21:%.*]] = icmp ult i16 [[TMP20]], 1
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- ; CHECK-NEXT: [[TMP22:%.*]] = icmp ugt i64 [[TMP8]], 65535
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- ; CHECK-NEXT: [[TMP23:%.*]] = or i1 [[TMP21]], [[TMP22]]
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- ; CHECK-NEXT: [[TMP24:%.*]] = or i1 [[TMP13]], [[TMP18]]
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- ; CHECK-NEXT: [[TMP25:%.*]] = or i1 [[TMP24]], [[TMP23]]
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- ; CHECK-NEXT: br i1 [[TMP25]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
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+ ; CHECK-NEXT: [[TMP19:%.*]] = or i1 [[TMP13]], [[TMP18]]
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+ ; CHECK-NEXT: br i1 [[TMP19]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
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; CHECK: vector.memcheck:
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- ; CHECK-NEXT: [[TMP26 :%.*]] = sub i64 [[C2]], [[A3]]
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- ; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP26 ]], 32
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+ ; CHECK-NEXT: [[TMP20 :%.*]] = sub i64 [[C2]], [[A3]]
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+ ; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP20 ]], 32
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; CHECK-NEXT: br i1 [[DIFF_CHECK]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP4]], 4
@@ -206,16 +199,16 @@ define void @implied_wrap_predicate(ptr %A, ptr %B, ptr %C) {
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
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- ; CHECK-NEXT: [[TMP27 :%.*]] = add i64 [[OFFSET_IDX]], 0
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- ; CHECK-NEXT: [[TMP28 :%.*]] = getelementptr i64, ptr [[A]], i64 [[TMP27 ]]
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- ; CHECK-NEXT: [[TMP29 :%.*]] = getelementptr i64, ptr [[TMP28 ]], i32 0
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- ; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP29 ]], align 4
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- ; CHECK-NEXT: [[TMP30 :%.*]] = getelementptr i64, ptr [[C]], i64 [[TMP27 ]]
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- ; CHECK-NEXT: [[TMP31 :%.*]] = getelementptr i64, ptr [[TMP30 ]], i32 0
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- ; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP31 ]], align 4
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+ ; CHECK-NEXT: [[TMP21 :%.*]] = add i64 [[OFFSET_IDX]], 0
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+ ; CHECK-NEXT: [[TMP22 :%.*]] = getelementptr i64, ptr [[A]], i64 [[TMP21 ]]
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+ ; CHECK-NEXT: [[TMP23 :%.*]] = getelementptr i64, ptr [[TMP22 ]], i32 0
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+ ; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP23 ]], align 4
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+ ; CHECK-NEXT: [[TMP24 :%.*]] = getelementptr i64, ptr [[C]], i64 [[TMP21 ]]
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+ ; CHECK-NEXT: [[TMP25 :%.*]] = getelementptr i64, ptr [[TMP24 ]], i32 0
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+ ; CHECK-NEXT: store <4 x i64> zeroinitializer, ptr [[TMP25 ]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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- ; CHECK-NEXT: [[TMP32 :%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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- ; CHECK-NEXT: br i1 [[TMP32 ]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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+ ; CHECK-NEXT: [[TMP26 :%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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+ ; CHECK-NEXT: br i1 [[TMP26 ]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP4]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
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