@@ -1238,40 +1238,28 @@ static void emitAccSpillRestoreInfo(MachineBasicBlock &MBB, bool IsPrimed,
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#endif
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}
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- static void spillRegPairs (MachineBasicBlock &MBB,
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- MachineBasicBlock::iterator II, DebugLoc DL,
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- const TargetInstrInfo &TII, Register SrcReg ,
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- unsigned FrameIndex, bool IsLittleEndian,
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- bool IsKilled, bool TwoPairs) {
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- unsigned Offset = 0 ;
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- // The register arithmetic in this function does not support virtual
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- // registers.
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- assert (!SrcReg .isVirtual () &&
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+ void PPCRegisterInfo::spillRegPair (MachineBasicBlock &MBB,
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+ MachineBasicBlock::iterator II, DebugLoc DL,
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+ const TargetInstrInfo &TII,
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+ unsigned FrameIndex, bool IsLittleEndian,
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+ bool IsKilled, Register Reg,
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+ int Offset) const {
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+
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+ // This function does not support virtual registers.
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+ assert (!Reg .isVirtual () &&
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" Spilling register pairs does not support virtual registers." );
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- if (TwoPairs)
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- Offset = IsLittleEndian ? 48 : 0 ;
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- else
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- Offset = IsLittleEndian ? 16 : 0 ;
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- Register Reg = (SrcReg > PPC::VSRp15) ? PPC::V0 + (SrcReg - PPC::VSRp16) * 2
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- : PPC::VSL0 + (SrcReg - PPC::VSRp0) * 2 ;
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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- .addReg (Reg, getKillRegState (IsKilled)),
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- FrameIndex, Offset);
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- Offset += IsLittleEndian ? -16 : 16 ;
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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- .addReg (Reg + 1 , getKillRegState (IsKilled)),
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- FrameIndex, Offset);
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- if (TwoPairs) {
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- Offset += IsLittleEndian ? -16 : 16 ;
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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- .addReg (Reg + 2 , getKillRegState (IsKilled)),
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- FrameIndex, Offset);
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- Offset += IsLittleEndian ? -16 : 16 ;
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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- .addReg (Reg + 3 , getKillRegState (IsKilled)),
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- FrameIndex, Offset);
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- }
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+ addFrameReference (
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+ BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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+ .addReg (TargetRegisterInfo::getSubReg (Reg, PPC::sub_vsx0),
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+ getKillRegState (IsKilled)),
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+ FrameIndex, Offset);
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+
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+ addFrameReference (
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+ BuildMI (MBB, II, DL, TII.get (PPC::STXV))
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+ .addReg (TargetRegisterInfo::getSubReg (Reg, PPC::sub_vsx1),
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+ getKillRegState (IsKilled)),
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+ FrameIndex, IsLittleEndian ? Offset - 16 : Offset + 16 );
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}
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// / Remove any STXVP[X] instructions and split them out into a pair of
@@ -1290,8 +1278,10 @@ void PPCRegisterInfo::lowerOctWordSpilling(MachineBasicBlock::iterator II,
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Register SrcReg = MI.getOperand (0 ).getReg ();
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bool IsLittleEndian = Subtarget.isLittleEndian ();
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bool IsKilled = MI.getOperand (0 ).isKill ();
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- spillRegPairs (MBB, II, DL, TII, SrcReg, FrameIndex, IsLittleEndian, IsKilled,
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- /* TwoPairs */ false );
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+
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+ spillRegPair (MBB, II, DL, TII, FrameIndex, IsLittleEndian, IsKilled, SrcReg,
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+ IsLittleEndian ? 16 : 0 );
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+
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// Discard the original instruction.
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MBB.erase (II);
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}
@@ -1325,8 +1315,6 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
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bool IsKilled = MI.getOperand (0 ).isKill ();
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bool IsPrimed = PPC::ACCRCRegClass.contains (SrcReg);
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- Register Reg =
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- PPC::VSRp0 + (SrcReg - (IsPrimed ? PPC::ACC0 : PPC::UACC0)) * 2 ;
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bool IsLittleEndian = Subtarget.isLittleEndian ();
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emitAccSpillRestoreInfo (MBB, IsPrimed, false );
@@ -1337,16 +1325,24 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
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// adjust the offset of the store that is within the 64-byte stack slot.
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if (IsPrimed)
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BuildMI (MBB, II, DL, TII.get (PPC::XXMFACC), SrcReg).addReg (SrcReg);
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- if (DisableAutoPairedVecSt)
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- spillRegPairs (MBB, II, DL, TII, Reg, FrameIndex, IsLittleEndian, IsKilled,
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- /* TwoPairs */ true );
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- else {
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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- .addReg (Reg, getKillRegState (IsKilled)),
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- FrameIndex, IsLittleEndian ? 32 : 0 );
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- addFrameReference (BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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- .addReg (Reg + 1 , getKillRegState (IsKilled)),
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- FrameIndex, IsLittleEndian ? 0 : 32 );
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+ if (DisableAutoPairedVecSt) {
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+ spillRegPair (MBB, II, DL, TII, FrameIndex, IsLittleEndian, IsKilled,
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+ TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair0),
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+ IsLittleEndian ? 48 : 0 );
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+ spillRegPair (MBB, II, DL, TII, FrameIndex, IsLittleEndian, IsKilled,
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+ TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair1),
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+ IsLittleEndian ? 16 : 32 );
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+ } else {
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+ addFrameReference (
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+ BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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+ .addReg (TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair0),
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+ getKillRegState (IsKilled)),
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+ FrameIndex, IsLittleEndian ? 32 : 0 );
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+ addFrameReference (
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+ BuildMI (MBB, II, DL, TII.get (PPC::STXVP))
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+ .addReg (TargetRegisterInfo::getSubReg (SrcReg, PPC::sub_pair1),
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+ getKillRegState (IsKilled)),
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+ FrameIndex, IsLittleEndian ? 0 : 32 );
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}
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if (IsPrimed && !IsKilled)
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BuildMI (MBB, II, DL, TII.get (PPC::XXMTACC), SrcReg).addReg (SrcReg);
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