[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spilling #142220

lei137 · 2025-05-30T21:55:25Z

Remove explicit register arithmetic from spilling ACC and STXVP code.

llvmbot · 2025-05-30T21:55:59Z

@llvm/pr-subscribers-backend-powerpc

Author: Lei Huang (lei137)

Changes

Remove explicit register arithmetic from spilling ACC and STXVP code.

Full diff: https://github.com/llvm/llvm-project/pull/142220.diff

1 Files Affected:

(modified) llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp (+43-50)

diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 51902ad218d1c..7c0d2e0dbec27 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -1238,42 +1238,6 @@ static void emitAccSpillRestoreInfo(MachineBasicBlock &MBB, bool IsPrimed,
 #endif
 }
 
-static void spillRegPairs(MachineBasicBlock &MBB,
-                          MachineBasicBlock::iterator II, DebugLoc DL,
-                          const TargetInstrInfo &TII, Register SrcReg,
-                          unsigned FrameIndex, bool IsLittleEndian,
-                          bool IsKilled, bool TwoPairs) {
-  unsigned Offset = 0;
-  // The register arithmetic in this function does not support virtual
-  // registers.
-  assert(!SrcReg.isVirtual() &&
-         "Spilling register pairs does not support virtual registers.");
-
-  if (TwoPairs)
-    Offset = IsLittleEndian ? 48 : 0;
-  else
-    Offset = IsLittleEndian ? 16 : 0;
-  Register Reg = (SrcReg > PPC::VSRp15) ? PPC::V0 + (SrcReg - PPC::VSRp16) * 2
-                                        : PPC::VSL0 + (SrcReg - PPC::VSRp0) * 2;
-  addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
-                        .addReg(Reg, getKillRegState(IsKilled)),
-                    FrameIndex, Offset);
-  Offset += IsLittleEndian ? -16 : 16;
-  addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
-                        .addReg(Reg + 1, getKillRegState(IsKilled)),
-                    FrameIndex, Offset);
-  if (TwoPairs) {
-    Offset += IsLittleEndian ? -16 : 16;
-    addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
-                          .addReg(Reg + 2, getKillRegState(IsKilled)),
-                      FrameIndex, Offset);
-    Offset += IsLittleEndian ? -16 : 16;
-    addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXV))
-                          .addReg(Reg + 3, getKillRegState(IsKilled)),
-                      FrameIndex, Offset);
-  }
-}
-
 /// Remove any STXVP[X] instructions and split them out into a pair of
 /// STXV[X] instructions if --disable-auto-paired-vec-st is specified on
 /// the command line.
@@ -1290,8 +1254,21 @@ void PPCRegisterInfo::lowerOctWordSpilling(MachineBasicBlock::iterator II,
   Register SrcReg = MI.getOperand(0).getReg();
   bool IsLittleEndian = Subtarget.isLittleEndian();
   bool IsKilled = MI.getOperand(0).isKill();
-  spillRegPairs(MBB, II, DL, TII, SrcReg, FrameIndex, IsLittleEndian, IsKilled,
-                /* TwoPairs */ false);
+
+  assert(PPC::VSRpRCRegClass.contains(SrcReg) &&
+          "Expecting STXVP to be utilizing a VSRp register.");
+
+  addFrameReference(
+      BuildMI(MBB, II, DL, TII.get(PPC::STXV))
+          .addReg(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_vsx0),
+                  getKillRegState(IsKilled)),
+      FrameIndex, IsLittleEndian ? 16 : 0);
+  addFrameReference(
+      BuildMI(MBB, II, DL, TII.get(PPC::STXV))
+          .addReg(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_vsx1),
+                  getKillRegState(IsKilled)),
+      FrameIndex, IsLittleEndian ? 0 : 16);
+
   // Discard the original instruction.
   MBB.erase(II);
 }
@@ -1325,8 +1302,6 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
   bool IsKilled = MI.getOperand(0).isKill();
 
   bool IsPrimed = PPC::ACCRCRegClass.contains(SrcReg);
-  Register Reg =
-      PPC::VSRp0 + (SrcReg - (IsPrimed ? PPC::ACC0 : PPC::UACC0)) * 2;
   bool IsLittleEndian = Subtarget.isLittleEndian();
 
   emitAccSpillRestoreInfo(MBB, IsPrimed, false);
@@ -1337,16 +1312,34 @@ void PPCRegisterInfo::lowerACCSpilling(MachineBasicBlock::iterator II,
   // adjust the offset of the store that is within the 64-byte stack slot.
   if (IsPrimed)
     BuildMI(MBB, II, DL, TII.get(PPC::XXMFACC), SrcReg).addReg(SrcReg);
-  if (DisableAutoPairedVecSt)
-    spillRegPairs(MBB, II, DL, TII, Reg, FrameIndex, IsLittleEndian, IsKilled,
-                  /* TwoPairs */ true);
-  else {
-    addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
-                          .addReg(Reg, getKillRegState(IsKilled)),
-                      FrameIndex, IsLittleEndian ? 32 : 0);
-    addFrameReference(BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
-                          .addReg(Reg + 1, getKillRegState(IsKilled)),
-                      FrameIndex, IsLittleEndian ? 0 : 32);
+  if (DisableAutoPairedVecSt) {
+    auto spillPair = [&](Register Reg, int Offset) {
+      addFrameReference(
+          BuildMI(MBB, II, DL, TII.get(PPC::STXV))
+              .addReg(TargetRegisterInfo::getSubReg(Reg, PPC::sub_vsx0),
+                      getKillRegState(IsKilled)),
+          FrameIndex, Offset);
+      addFrameReference(
+          BuildMI(MBB, II, DL, TII.get(PPC::STXV))
+              .addReg(TargetRegisterInfo::getSubReg(Reg, PPC::sub_vsx1),
+                      getKillRegState(IsKilled)),
+          FrameIndex, IsLittleEndian ? Offset - 16 : Offset + 16);
+    };
+    spillPair(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair0),
+              IsLittleEndian ? 48 : 0);
+    spillPair(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair1),
+              IsLittleEndian ? 16 : 32);
+  } else {
+    addFrameReference(
+        BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
+            .addReg(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair0),
+                    getKillRegState(IsKilled)),
+        FrameIndex, IsLittleEndian ? 32 : 0);
+    addFrameReference(
+        BuildMI(MBB, II, DL, TII.get(PPC::STXVP))
+            .addReg(TargetRegisterInfo::getSubReg(SrcReg, PPC::sub_pair1),
+                    getKillRegState(IsKilled)),
+        FrameIndex, IsLittleEndian ? 0 : 32);
   }
   if (IsPrimed && !IsKilled)
     BuildMI(MBB, II, DL, TII.get(PPC::XXMTACC), SrcReg).addReg(SrcReg);

github-actions · 2025-05-30T21:57:50Z

⚠️ C/C++ code formatter, clang-format found issues in your code. ⚠️

You can test this locally with the following command:

git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

View the diff from clang-format here.

diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 9dc69e203..a3a8eea33 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -1256,7 +1256,7 @@ void PPCRegisterInfo::lowerOctWordSpilling(MachineBasicBlock::iterator II,
   bool IsKilled = MI.getOperand(0).isKill();
 
   assert(PPC::VSRpRCRegClass.contains(SrcReg) &&
-          "Expecting STXVP to be utilizing a VSRp register.");
+         "Expecting STXVP to be utilizing a VSRp register.");
 
   addFrameReference(
       BuildMI(MBB, II, DL, TII.get(PPC::STXV))

lei137 · 2025-06-11T15:54:24Z

gentle ping.

RolandF77

LGTM

…ling (llvm#142220)" This reverts commit edf636a. Checked in the wrong branch.

…ling (llvm#142220)" This reverts commit edf636a.

#143948) …ling (#142220)" This reverts commit edf636a. checked in wrong branch.

lei137 · 2025-06-12T19:03:23Z

I accidentally pushed the wrong branch ☹️
Will commit original one from this PR separately.

…43953) Simpliy handling for spilling of acc reg with stx by removing explicit register arithmetic and clean up code gen for register mapping used in stxvp spilling. Relanding: #142220

…pilling (#143953) Simpliy handling for spilling of acc reg with stx by removing explicit register arithmetic and clean up code gen for register mapping used in stxvp spilling. Relanding: llvm/llvm-project#142220

…vm#142220) Remove explicit register arithmetic from spilling ACC and STXVP code.

llvm#143948) …ling (llvm#142220)" This reverts commit edf636a. checked in wrong branch.

…vm#143953) Simpliy handling for spilling of acc reg with stx by removing explicit register arithmetic and clean up code gen for register mapping used in stxvp spilling. Relanding: llvm#142220

…vm#142220) Remove explicit register arithmetic from spilling ACC and STXVP code.

llvm#143948) …ling (llvm#142220)" This reverts commit edf636a. checked in wrong branch.

…vm#143953) Simpliy handling for spilling of acc reg with stx by removing explicit register arithmetic and clean up code gen for register mapping used in stxvp spilling. Relanding: llvm#142220

lei137 requested a review from stefanp-synopsys May 30, 2025 21:55

llvmbot added the backend:PowerPC label May 30, 2025

lei137 requested review from RolandF77, maryammo, amy-kwan and redstar May 30, 2025 21:55

lei137 requested a review from diggerlin May 30, 2025 21:56

lei137 force-pushed the updateSpillingforStxvp branch from 9fbf355 to 407bc35 Compare June 5, 2025 15:19

RolandF77 approved these changes Jun 11, 2025

View reviewed changes

lei137 added 5 commits June 12, 2025 12:55

clean up code gen for register mapping used in stxvp spilling

3da0355

simpliy handling for spilling acc reg with stx

1d809d4

remove un-intentional code move

4e19f2e

clean up acc register allocation code

e460bda

update assert check

5f1a84d

lei137 force-pushed the updateSpillingforStxvp branch from 407bc35 to 5f1a84d Compare June 12, 2025 18:38

lei137 merged commit edf636a into llvm:main Jun 12, 2025
4 of 7 checks passed

lei137 added a commit to lei137/llvm-project that referenced this pull request Jun 12, 2025

Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil…

4681ce5

…ling (llvm#142220)" This reverts commit edf636a. Checked in the wrong branch.

lei137 added a commit to lei137/llvm-project that referenced this pull request Jun 12, 2025

Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil…

aa3de45

…ling (llvm#142220)" This reverts commit edf636a.

lei137 mentioned this pull request Jun 12, 2025

Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil… #143948

Merged

lei137 added a commit that referenced this pull request Jun 12, 2025

Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil… (

df7db44

#143948) …ling (#142220)" This reverts commit edf636a. checked in wrong branch.

lei137 mentioned this pull request Jun 12, 2025

[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spilling #143953

Merged

tomtor pushed a commit to tomtor/llvm-project that referenced this pull request Jun 14, 2025

[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spilling (ll…

99bf231

…vm#142220) Remove explicit register arithmetic from spilling ACC and STXVP code.

tomtor pushed a commit to tomtor/llvm-project that referenced this pull request Jun 14, 2025

Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil… (

e4f2271

llvm#143948) …ling (llvm#142220)" This reverts commit edf636a. checked in wrong branch.

akuhlens pushed a commit to akuhlens/llvm-project that referenced this pull request Jun 24, 2025

[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spilling (ll…

470abe7

…vm#142220) Remove explicit register arithmetic from spilling ACC and STXVP code.

akuhlens pushed a commit to akuhlens/llvm-project that referenced this pull request Jun 24, 2025

Revert "[PowerPC][NFC] Update lowering STXVP to STXV in Oct word spil… (

6b56982

llvm#143948) …ling (llvm#142220)" This reverts commit edf636a. checked in wrong branch.

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