small change

tangaac · tangaac · commit c3ab9bc6ecee · 2025-04-02T17:08:07.000+08:00
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/absd.ll
@@ -1,10 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s
 
-;; Mostly copy from AArch64/neon-abd.ll
+;; Mostly copied from AArch64/neon-abd.ll
 
 ;
-; VABDS_[B/H/W/D]
+; XVABDS_[B/H/W/D]
 ;
 define <32 x i8> @xvabsd_b(<32 x i8> %a, <32 x i8> %b) #0 {
 ; CHECK-LABEL: xvabsd_b:
@@ -67,7 +67,7 @@ define <4 x i64> @xvabsd_d(<4 x i64> %a, <4 x i64> %b) #0 {
 }
 
 ;
-; xvabsd_[B/H/W/D]U
+; XVABSD_[B/H/W/D]U
 ;
 
 define <32 x i8> @xvabsd_bu(<32 x i8> %a, <32 x i8> %b) #0 {
diff --git a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/absd.ll b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/absd.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=loongarch64 -mattr=+lsx < %s | FileCheck %s
 
-;; Mostly copy from AArch64/neon-abd.ll
+;; Mostly copied from AArch64/neon-abd.ll
 
 ;
 ; VABDS_[B/H/W/D]

Original file line number	Diff line number	Diff line change
`@@ -1,10 +1,10 @@`
`1`	`1`	`; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py`
`2`	`2`	`; RUN: llc -mtriple=loongarch64 -mattr=+lasx < %s \| FileCheck %s`
`3`	`3`
`4`		`-;; Mostly copy from AArch64/neon-abd.ll`
	`4`	`+;; Mostly copied from AArch64/neon-abd.ll`
`5`	`5`
`6`	`6`	`;`
`7`		`-; VABDS_[B/H/W/D]`
	`7`	`+; XVABDS_[B/H/W/D]`
`8`	`8`	`;`
`9`	`9`	`define <32 x i8> @xvabsd_b(<32 x i8> %a, <32 x i8> %b) #0 {`
`10`	`10`	`; CHECK-LABEL: xvabsd_b:`
`@@ -67,7 +67,7 @@ define <4 x i64> @xvabsd_d(<4 x i64> %a, <4 x i64> %b) #0 {`
`67`	`67`	`}`
`68`	`68`
`69`	`69`	`;`
`70`		`-; xvabsd_[B/H/W/D]U`
	`70`	`+; XVABSD_[B/H/W/D]U`
`71`	`71`	`;`
`72`	`72`
`73`	`73`	`define <32 x i8> @xvabsd_bu(<32 x i8> %a, <32 x i8> %b) #0 {`
Original file line number	Diff line number	Diff line change
`@@ -1,7 +1,7 @@`
`1`	`1`	`; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py`
`2`	`2`	`; RUN: llc -mtriple=loongarch64 -mattr=+lsx < %s \| FileCheck %s`
`3`	`3`
`4`		`-;; Mostly copy from AArch64/neon-abd.ll`
	`4`	`+;; Mostly copied from AArch64/neon-abd.ll`
`5`	`5`
`6`	`6`	`;`
`7`	`7`	`; VABDS_[B/H/W/D]`