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R600: Use range for and fix missing consts.
llvm-svn: 212897
1 parent 762af96 commit d32dbb6

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2 files changed

+20
-29
lines changed

2 files changed

+20
-29
lines changed

llvm/lib/Target/R600/AMDGPUAsmPrinter.cpp

Lines changed: 16 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ using namespace llvm;
4747
// precision, and leaves single precision to flush all and does not report
4848
// CL_FP_DENORM for CL_DEVICE_SINGLE_FP_CONFIG. Mesa's OpenCL currently reports
4949
// CL_FP_DENORM for both.
50-
static uint32_t getFPMode(MachineFunction &) {
50+
static uint32_t getFPMode(const MachineFunction &) {
5151
return FP_ROUND_MODE_SP(FP_ROUND_ROUND_TO_NEAREST) |
5252
FP_ROUND_MODE_DP(FP_ROUND_ROUND_TO_NEAREST) |
5353
FP_DENORM_MODE_SP(FP_DENORM_FLUSH_NONE) |
@@ -144,25 +144,21 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
144144
return false;
145145
}
146146

147-
void AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) {
147+
void AMDGPUAsmPrinter::EmitProgramInfoR600(const MachineFunction &MF) {
148148
unsigned MaxGPR = 0;
149149
bool killPixel = false;
150-
const R600RegisterInfo * RI =
151-
static_cast<const R600RegisterInfo*>(TM.getRegisterInfo());
152-
R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
150+
const R600RegisterInfo *RI
151+
= static_cast<const R600RegisterInfo*>(TM.getRegisterInfo());
152+
const R600MachineFunctionInfo *MFI = MF.getInfo<R600MachineFunctionInfo>();
153153
const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
154154

155-
for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
156-
BB != BB_E; ++BB) {
157-
MachineBasicBlock &MBB = *BB;
158-
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
159-
I != E; ++I) {
160-
MachineInstr &MI = *I;
155+
for (const MachineBasicBlock &MBB : MF) {
156+
for (const MachineInstr &MI : MBB) {
161157
if (MI.getOpcode() == AMDGPU::KILLGT)
162158
killPixel = true;
163159
unsigned numOperands = MI.getNumOperands();
164160
for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
165-
MachineOperand & MO = MI.getOperand(op_idx);
161+
const MachineOperand &MO = MI.getOperand(op_idx);
166162
if (!MO.isReg())
167163
continue;
168164
unsigned HWReg = RI->getEncodingValue(MO.getReg()) & 0xff;
@@ -209,27 +205,22 @@ void AMDGPUAsmPrinter::EmitProgramInfoR600(MachineFunction &MF) {
209205
}
210206

211207
void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
212-
MachineFunction &MF) const {
208+
const MachineFunction &MF) const {
213209
uint64_t CodeSize = 0;
214210
unsigned MaxSGPR = 0;
215211
unsigned MaxVGPR = 0;
216212
bool VCCUsed = false;
217-
const SIRegisterInfo * RI =
218-
static_cast<const SIRegisterInfo*>(TM.getRegisterInfo());
219-
220-
for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
221-
BB != BB_E; ++BB) {
222-
MachineBasicBlock &MBB = *BB;
223-
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
224-
I != E; ++I) {
225-
MachineInstr &MI = *I;
213+
const SIRegisterInfo *RI
214+
= static_cast<const SIRegisterInfo*>(TM.getRegisterInfo());
226215

216+
for (const MachineBasicBlock &MBB : MF) {
217+
for (const MachineInstr &MI : MBB) {
227218
// TODO: CodeSize should account for multiple functions.
228219
CodeSize += MI.getDesc().Size;
229220

230221
unsigned numOperands = MI.getNumOperands();
231222
for (unsigned op_idx = 0; op_idx < numOperands; op_idx++) {
232-
MachineOperand &MO = MI.getOperand(op_idx);
223+
const MachineOperand &MO = MI.getOperand(op_idx);
233224
unsigned width = 0;
234225
bool isSGPR = false;
235226

@@ -317,10 +308,10 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
317308
ProgInfo.CodeLen = CodeSize;
318309
}
319310

320-
void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
311+
void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF,
321312
const SIProgramInfo &KernelInfo) {
322313
const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
323-
SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
314+
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
324315

325316
unsigned RsrcReg;
326317
switch (MFI->getShaderType()) {

llvm/lib/Target/R600/AMDGPUAsmPrinter.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -49,15 +49,15 @@ class AMDGPUAsmPrinter : public AsmPrinter {
4949
uint64_t CodeLen;
5050
};
5151

52-
void getSIProgramInfo(SIProgramInfo &Out, MachineFunction &MF) const;
53-
void findNumUsedRegistersSI(MachineFunction &MF,
52+
void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF) const;
53+
void findNumUsedRegistersSI(const MachineFunction &MF,
5454
unsigned &NumSGPR,
5555
unsigned &NumVGPR) const;
5656

5757
/// \brief Emit register usage information so that the GPU driver
5858
/// can correctly setup the GPU state.
59-
void EmitProgramInfoR600(MachineFunction &MF);
60-
void EmitProgramInfoSI(MachineFunction &MF, const SIProgramInfo &KernelInfo);
59+
void EmitProgramInfoR600(const MachineFunction &MF);
60+
void EmitProgramInfoSI(const MachineFunction &MF, const SIProgramInfo &KernelInfo);
6161

6262
public:
6363
explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer);

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