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[X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT
Noticed by inspection, we shouldn't use FloatDomain directly, we've already bitcast both inputs to MaskVT so select the opcode using that.
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34133,7 +34133,7 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
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SDValue BitMask = getConstVector(EltBits, UndefElts, MaskVT, DAG, DL);
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Res = DAG.getBitcast(MaskVT, V1);
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unsigned AndOpcode =
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FloatDomain ? unsigned(X86ISD::FAND) : unsigned(ISD::AND);
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MaskVT.isFloatingPoint() ? unsigned(X86ISD::FAND) : unsigned(ISD::AND);
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Res = DAG.getNode(AndOpcode, DL, MaskVT, Res, BitMask);
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return DAG.getBitcast(RootVT, Res);
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}

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