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builtins & call lowering
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2 files changed

+6
-5
lines changed

2 files changed

+6
-5
lines changed

llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -762,7 +762,7 @@ static bool buildAtomicCompareExchangeInst(
762762
Register Tmp = !IsCmpxchg ? MRI->createGenericVirtualRegister(DesiredLLT)
763763
: Call->ReturnRegister;
764764
if (!MRI->getRegClassOrNull(Tmp))
765-
MRI->setRegClass(Tmp, &SPIRV::iIDRegClass);
765+
MRI->setRegClass(Tmp, GR->getRegClass(SpvDesiredTy));
766766
GR->assignSPIRVTypeToVReg(SpvDesiredTy, Tmp, MIRBuilder.getMF());
767767

768768
SPIRVType *IntTy = GR->getOrCreateSPIRVIntegerType(32, MIRBuilder);

llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -403,13 +403,14 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
403403
int i = 0;
404404
for (const auto &Arg : F.args()) {
405405
assert(VRegs[i].size() == 1 && "Formal arg has multiple vregs");
406-
MRI->setRegClass(VRegs[i][0], GR->getRegClass(ArgTypeVRegs[i]));
407-
MRI->setType(VRegs[i][0], GR->getRegType(ArgTypeVRegs[i]));
406+
Register ArgReg = VRegs[i][0];
407+
MRI->setRegClass(ArgReg, GR->getRegClass(ArgTypeVRegs[i]));
408+
MRI->setType(ArgReg, GR->getRegType(ArgTypeVRegs[i]));
408409
MIRBuilder.buildInstr(SPIRV::OpFunctionParameter)
409-
.addDef(VRegs[i][0])
410+
.addDef(ArgReg)
410411
.addUse(GR->getSPIRVTypeID(ArgTypeVRegs[i]));
411412
if (F.isDeclaration())
412-
GR->add(&Arg, &MIRBuilder.getMF(), VRegs[i][0]);
413+
GR->add(&Arg, &MIRBuilder.getMF(), ArgReg);
413414
i++;
414415
}
415416
// Name the function.

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