Skip to content

Commit eb1120c

Browse files
committed
document the new arguments
1 parent 28da84c commit eb1120c

File tree

1 file changed

+5
-0
lines changed

1 file changed

+5
-0
lines changed

llvm/include/llvm/CodeGen/TargetInstrInfo.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1018,6 +1018,11 @@ class TargetInstrInfo : public MCInstrInfo {
10181018
/// The source and destination registers may overlap, which may require a
10191019
/// careful implementation when multiple copy instructions are required for
10201020
/// large registers. See for example the ARM target.
1021+
///
1022+
/// If RenamableDest is true, the copy instruction's destination operand is
1023+
/// marked renamable.
1024+
/// If RenamableSrc is true, the copy instruction's source operand is
1025+
/// marked renamable.
10211026
virtual void copyPhysReg(MachineBasicBlock &MBB,
10221027
MachineBasicBlock::iterator MI, const DebugLoc &DL,
10231028
MCRegister DestReg, MCRegister SrcReg, bool KillSrc,

0 commit comments

Comments
 (0)