Skip to content

Commit fc655a9

Browse files
nikicnikic
committed
[AddDiscriminators] Migrate tests to opaque pointers (NFC)
Update performed using: https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34 memcpy-discriminator.ll was fixed up to use named instructions and drop the no longer needed bitcasts.
1 parent 7c802f9 commit fc655a9

File tree

11 files changed

+90
-93
lines changed

11 files changed

+90
-93
lines changed

‎llvm/test/Transforms/AddDiscriminators/basic.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -15,17 +15,17 @@ define void @foo(i32 %i) #0 !dbg !4 {
1515
entry:
1616
%i.addr = alloca i32, align 4
1717
%x = alloca i32, align 4
18-
store i32 %i, i32* %i.addr, align 4
19-
%0 = load i32, i32* %i.addr, align 4, !dbg !10
18+
store i32 %i, ptr %i.addr, align 4
19+
%0 = load i32, ptr %i.addr, align 4, !dbg !10
2020
%cmp = icmp slt i32 %0, 10, !dbg !10
2121
br i1 %cmp, label %if.then, label %if.end, !dbg !10
2222

2323
if.then: ; preds = %entry
24-
%1 = load i32, i32* %i.addr, align 4, !dbg !10
25-
; CHECK: %1 = load i32, i32* %i.addr, align 4, !dbg ![[THEN:[0-9]+]]
24+
%1 = load i32, ptr %i.addr, align 4, !dbg !10
25+
; CHECK: %1 = load i32, ptr %i.addr, align 4, !dbg ![[THEN:[0-9]+]]
2626

27-
store i32 %1, i32* %x, align 4, !dbg !10
28-
; CHECK: store i32 %1, i32* %x, align 4, !dbg ![[THEN]]
27+
store i32 %1, ptr %x, align 4, !dbg !10
28+
; CHECK: store i32 %1, ptr %x, align 4, !dbg ![[THEN]]
2929

3030
br label %if.end, !dbg !10
3131
; CHECK: br label %if.end, !dbg ![[THEN]]

‎llvm/test/Transforms/AddDiscriminators/call.ll

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,8 @@ define void @_Z3foov() #0 !dbg !4 {
1212
call void @_Z3barv(), !dbg !10
1313
; CHECK: call void @_Z3barv(), !dbg ![[CALL0:[0-9]+]]
1414
%a = alloca [100 x i8], align 16
15-
%b = bitcast [100 x i8]* %a to i8*
16-
call void @llvm.lifetime.start.p0i8(i64 100, i8* %b), !dbg !11
17-
call void @llvm.lifetime.end.p0i8(i64 100, i8* %b), !dbg !11
15+
call void @llvm.lifetime.start.p0(i64 100, ptr %a), !dbg !11
16+
call void @llvm.lifetime.end.p0(i64 100, ptr %a), !dbg !11
1817
call void @_Z3barv(), !dbg !11
1918
; CHECK: call void @_Z3barv(), !dbg ![[CALL1:[0-9]+]]
2019
call void @_Z3barv(), !dbg !12
@@ -23,8 +22,8 @@ define void @_Z3foov() #0 !dbg !4 {
2322
}
2423

2524
declare void @_Z3barv() #1
26-
declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) nounwind argmemonly
27-
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) nounwind argmemonly
25+
declare void @llvm.lifetime.start.p0(i64, ptr nocapture) nounwind argmemonly
26+
declare void @llvm.lifetime.end.p0(i64, ptr nocapture) nounwind argmemonly
2827

2928
attributes #0 = { uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
3029
attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }

‎llvm/test/Transforms/AddDiscriminators/dbg-declare-discriminator.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,9 +8,9 @@ declare void @llvm.dbg.declare(metadata, metadata, metadata)
88
; CHECK-LABEL: @test_valid_metadata
99
define void @test_valid_metadata() {
1010
%a = alloca i8
11-
call void @llvm.dbg.declare(metadata i8* %a, metadata !2, metadata !5), !dbg !6
11+
call void @llvm.dbg.declare(metadata ptr %a, metadata !2, metadata !5), !dbg !6
1212
%b = alloca i8
13-
call void @llvm.dbg.declare(metadata i8* %b, metadata !9, metadata !5), !dbg !11
13+
call void @llvm.dbg.declare(metadata ptr %b, metadata !9, metadata !5), !dbg !11
1414
ret void
1515
}
1616

‎llvm/test/Transforms/AddDiscriminators/diamond.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,9 @@
1414
; Function Attrs: uwtable
1515
define void @_Z3fooi(i32 %i) #0 !dbg !4 {
1616
%1 = alloca i32, align 4
17-
store i32 %i, i32* %1, align 4
18-
call void @llvm.dbg.declare(metadata i32* %1, metadata !11, metadata !12), !dbg !13
19-
%2 = load i32, i32* %1, align 4, !dbg !14
17+
store i32 %i, ptr %1, align 4
18+
call void @llvm.dbg.declare(metadata ptr %1, metadata !11, metadata !12), !dbg !13
19+
%2 = load i32, ptr %1, align 4, !dbg !14
2020
%3 = icmp sgt i32 %2, 10, !dbg !16
2121
br i1 %3, label %4, label %5, !dbg !17
2222

‎llvm/test/Transforms/AddDiscriminators/first-only.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -18,23 +18,23 @@ entry:
1818
%i.addr = alloca i32, align 4
1919
%x = alloca i32, align 4
2020
%y = alloca i32, align 4
21-
store i32 %i, i32* %i.addr, align 4
22-
%0 = load i32, i32* %i.addr, align 4, !dbg !10
21+
store i32 %i, ptr %i.addr, align 4
22+
%0 = load i32, ptr %i.addr, align 4, !dbg !10
2323
%cmp = icmp slt i32 %0, 10, !dbg !10
2424
br i1 %cmp, label %if.then, label %if.end, !dbg !10
2525

2626
if.then: ; preds = %entry
27-
%1 = load i32, i32* %i.addr, align 4, !dbg !12
28-
store i32 %1, i32* %x, align 4, !dbg !12
27+
%1 = load i32, ptr %i.addr, align 4, !dbg !12
28+
store i32 %1, ptr %x, align 4, !dbg !12
2929

30-
%2 = load i32, i32* %i.addr, align 4, !dbg !14
31-
; CHECK: %2 = load i32, i32* %i.addr, align 4, !dbg ![[THEN:[0-9]+]]
30+
%2 = load i32, ptr %i.addr, align 4, !dbg !14
31+
; CHECK: %2 = load i32, ptr %i.addr, align 4, !dbg ![[THEN:[0-9]+]]
3232

3333
%sub = sub nsw i32 0, %2, !dbg !14
3434
; CHECK: %sub = sub nsw i32 0, %2, !dbg ![[THEN]]
3535

36-
store i32 %sub, i32* %y, align 4, !dbg !14
37-
; CHECK: store i32 %sub, i32* %y, align 4, !dbg ![[THEN]]
36+
store i32 %sub, ptr %y, align 4, !dbg !14
37+
; CHECK: store i32 %sub, ptr %y, align 4, !dbg ![[THEN]]
3838

3939
br label %if.end, !dbg !15
4040
; CHECK: br label %if.end, !dbg ![[BR:[0-9]+]]

‎llvm/test/Transforms/AddDiscriminators/inlined.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -13,29 +13,29 @@ target triple = "arm64-apple-ios"
1313
; Function Attrs: noreturn nounwind ssp
1414
define i32 @f() local_unnamed_addr #0 !dbg !7 {
1515
entry:
16-
%0 = tail call i64 @llvm.objectsize.i64.p0i8(i8* inttoptr (i64 1 to i8*), i1 false) #2, !dbg !11
16+
%0 = tail call i64 @llvm.objectsize.i64.p0(ptr inttoptr (i64 1 to ptr), i1 false) #2, !dbg !11
1717
br label %for.cond, !dbg !18
1818

1919
for.cond: ; preds = %for.cond, %entry
2020
; CHECK: %call.i
21-
%call.i = tail call i8* @__memset_chk(i8* null, i32 0, i64 0, i64 %0) #2, !dbg !19
21+
%call.i = tail call ptr @__memset_chk(ptr null, i32 0, i64 0, i64 %0) #2, !dbg !19
2222
; CHECK: br label %for.cond, !dbg ![[BR:[0-9]+]]
2323
br label %for.cond, !dbg !20, !llvm.loop !21
2424
}
2525

2626
; Function Attrs: nounwind ssp
2727
define i32 @g() local_unnamed_addr #1 !dbg !12 {
2828
entry:
29-
%0 = tail call i64 @llvm.objectsize.i64.p0i8(i8* inttoptr (i64 1 to i8*), i1 false), !dbg !22
30-
%call = tail call i8* @__memset_chk(i8* null, i32 0, i64 0, i64 %0) #2, !dbg !23
29+
%0 = tail call i64 @llvm.objectsize.i64.p0(ptr inttoptr (i64 1 to ptr), i1 false), !dbg !22
30+
%call = tail call ptr @__memset_chk(ptr null, i32 0, i64 0, i64 %0) #2, !dbg !23
3131
ret i32 undef, !dbg !24
3232
}
3333

3434
; Function Attrs: nounwind
35-
declare i8* @__memset_chk(i8*, i32, i64, i64) local_unnamed_addr #2
35+
declare ptr @__memset_chk(ptr, i32, i64, i64) local_unnamed_addr #2
3636

3737
; Function Attrs: nounwind readnone
38-
declare i64 @llvm.objectsize.i64.p0i8(i8*, i1) #3
38+
declare i64 @llvm.objectsize.i64.p0(ptr, i1) #3
3939

4040
attributes #0 = { noreturn nounwind ssp }
4141
attributes #1 = { nounwind ssp }

‎llvm/test/Transforms/AddDiscriminators/invoke.ll

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -5,9 +5,9 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
55
target triple = "x86_64-apple-macosx10.14.0"
66

77
; Function Attrs: ssp uwtable
8-
define void @_Z3foov() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) !dbg !8 {
8+
define void @_Z3foov() #0 personality ptr @__gxx_personality_v0 !dbg !8 {
99
entry:
10-
%exn.slot = alloca i8*
10+
%exn.slot = alloca ptr
1111
%ehselector.slot = alloca i32
1212
; CHECK: call void @_Z12bar_noexceptv({{.*}} !dbg ![[CALL1:[0-9]+]]
1313
call void @_Z12bar_noexceptv() #4, !dbg !11
@@ -21,27 +21,27 @@ invoke.cont: ; preds = %entry
2121
br label %try.cont, !dbg !15
2222

2323
lpad: ; preds = %entry
24-
%0 = landingpad { i8*, i32 }
25-
catch i8* null, !dbg !16
26-
%1 = extractvalue { i8*, i32 } %0, 0, !dbg !16
27-
store i8* %1, i8** %exn.slot, align 8, !dbg !16
28-
%2 = extractvalue { i8*, i32 } %0, 1, !dbg !16
29-
store i32 %2, i32* %ehselector.slot, align 4, !dbg !16
24+
%0 = landingpad { ptr, i32 }
25+
catch ptr null, !dbg !16
26+
%1 = extractvalue { ptr, i32 } %0, 0, !dbg !16
27+
store ptr %1, ptr %exn.slot, align 8, !dbg !16
28+
%2 = extractvalue { ptr, i32 } %0, 1, !dbg !16
29+
store i32 %2, ptr %ehselector.slot, align 4, !dbg !16
3030
br label %catch, !dbg !16
3131

3232
catch: ; preds = %lpad
33-
%exn = load i8*, i8** %exn.slot, align 8, !dbg !15
34-
%3 = call i8* @__cxa_begin_catch(i8* %exn) #4, !dbg !15
33+
%exn = load ptr, ptr %exn.slot, align 8, !dbg !15
34+
%3 = call ptr @__cxa_begin_catch(ptr %exn) #4, !dbg !15
3535
invoke void @__cxa_rethrow() #5
3636
to label %unreachable unwind label %lpad1, !dbg !17
3737

3838
lpad1: ; preds = %catch
39-
%4 = landingpad { i8*, i32 }
39+
%4 = landingpad { ptr, i32 }
4040
cleanup, !dbg !19
41-
%5 = extractvalue { i8*, i32 } %4, 0, !dbg !19
42-
store i8* %5, i8** %exn.slot, align 8, !dbg !19
43-
%6 = extractvalue { i8*, i32 } %4, 1, !dbg !19
44-
store i32 %6, i32* %ehselector.slot, align 4, !dbg !19
41+
%5 = extractvalue { ptr, i32 } %4, 0, !dbg !19
42+
store ptr %5, ptr %exn.slot, align 8, !dbg !19
43+
%6 = extractvalue { ptr, i32 } %4, 1, !dbg !19
44+
store i32 %6, ptr %ehselector.slot, align 4, !dbg !19
4545
invoke void @__cxa_end_catch()
4646
to label %invoke.cont2 unwind label %terminate.lpad, !dbg !20
4747

@@ -52,17 +52,17 @@ try.cont: ; preds = %invoke.cont
5252
ret void, !dbg !21
5353

5454
eh.resume: ; preds = %invoke.cont2
55-
%exn3 = load i8*, i8** %exn.slot, align 8, !dbg !20
56-
%sel = load i32, i32* %ehselector.slot, align 4, !dbg !20
57-
%lpad.val = insertvalue { i8*, i32 } undef, i8* %exn3, 0, !dbg !20
58-
%lpad.val4 = insertvalue { i8*, i32 } %lpad.val, i32 %sel, 1, !dbg !20
59-
resume { i8*, i32 } %lpad.val4, !dbg !20
55+
%exn3 = load ptr, ptr %exn.slot, align 8, !dbg !20
56+
%sel = load i32, ptr %ehselector.slot, align 4, !dbg !20
57+
%lpad.val = insertvalue { ptr, i32 } undef, ptr %exn3, 0, !dbg !20
58+
%lpad.val4 = insertvalue { ptr, i32 } %lpad.val, i32 %sel, 1, !dbg !20
59+
resume { ptr, i32 } %lpad.val4, !dbg !20
6060

6161
terminate.lpad: ; preds = %lpad1
62-
%7 = landingpad { i8*, i32 }
63-
catch i8* null, !dbg !20
64-
%8 = extractvalue { i8*, i32 } %7, 0, !dbg !20
65-
call void @__clang_call_terminate(i8* %8) #6, !dbg !20
62+
%7 = landingpad { ptr, i32 }
63+
catch ptr null, !dbg !20
64+
%8 = extractvalue { ptr, i32 } %7, 0, !dbg !20
65+
call void @__clang_call_terminate(ptr %8) #6, !dbg !20
6666
unreachable, !dbg !20
6767

6868
unreachable: ; preds = %catch
@@ -76,15 +76,15 @@ declare void @_Z3barv() #2
7676

7777
declare i32 @__gxx_personality_v0(...)
7878

79-
declare i8* @__cxa_begin_catch(i8*)
79+
declare ptr @__cxa_begin_catch(ptr)
8080

8181
declare void @__cxa_rethrow()
8282

8383
declare void @__cxa_end_catch()
8484

8585
; Function Attrs: noinline noreturn nounwind
86-
define linkonce_odr hidden void @__clang_call_terminate(i8*) #3 {
87-
%2 = call i8* @__cxa_begin_catch(i8* %0) #4
86+
define linkonce_odr hidden void @__clang_call_terminate(ptr) #3 {
87+
%2 = call ptr @__cxa_begin_catch(ptr %0) #4
8888
call void @_ZSt9terminatev() #6
8989
unreachable
9090
}

‎llvm/test/Transforms/AddDiscriminators/memcpy-discriminator.ll

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -67,14 +67,12 @@ cond.true:
6767
; CHECK-DAG: ![[SCOPE]] = !DILexicalBlockFile({{.*}}, discriminator: 2)
6868
; CHECK-DAG: ![[BR_LOC]] = !DILocation(line: 16, column: 16, scope: ![[SCOPE]])
6969

70-
%0 = bitcast { i64, i32 }* %g_b.coerce to i8*, !dbg !8
71-
%1 = bitcast %struct.B* @g_b to i8*, !dbg !8
72-
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %0, i8* align 4 %1, i64 12, i1 false), !dbg !8
73-
%2 = getelementptr inbounds { i64, i32 }, { i64, i32 }* %g_b.coerce, i32 0, i32 0, !dbg !8
74-
%3 = load i64, i64* %2, align 4, !dbg !8
75-
%4 = getelementptr inbounds { i64, i32 }, { i64, i32 }* %g_b.coerce, i32 0, i32 1, !dbg !8
76-
%5 = load i32, i32* %4, align 4, !dbg !8
77-
%call = call i32 @bar(i64 %3, i32 %5, i32 33), !dbg !8
70+
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %g_b.coerce, ptr align 4 @g_b, i64 12, i1 false), !dbg !8
71+
%p1 = getelementptr inbounds { i64, i32 }, ptr %g_b.coerce, i32 0, i32 0, !dbg !8
72+
%v1 = load i64, ptr %p1, align 4, !dbg !8
73+
%p2 = getelementptr inbounds { i64, i32 }, ptr %g_b.coerce, i32 0, i32 1, !dbg !8
74+
%v2 = load i32, ptr %p2, align 4, !dbg !8
75+
%call = call i32 @bar(i64 %v1, i32 %v2, i32 33), !dbg !8
7876
br label %cond.end, !dbg !7
7977

8078
cond.end: ; preds = %entry, %cond.true
@@ -84,7 +82,7 @@ cond.end: ; preds = %entry, %cond.true
8482

8583
declare i32 @bar(i64, i32, i32)
8684

87-
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1) #1
85+
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1) #1
8886

8987
attributes #0 = { noinline nounwind uwtable }
9088
attributes #1 = { argmemonly nounwind }

‎llvm/test/Transforms/AddDiscriminators/multiple.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -14,30 +14,30 @@ define void @foo(i32 %i) #0 !dbg !4 {
1414
entry:
1515
%i.addr = alloca i32, align 4
1616
%x = alloca i32, align 4
17-
store i32 %i, i32* %i.addr, align 4
18-
%0 = load i32, i32* %i.addr, align 4, !dbg !10
17+
store i32 %i, ptr %i.addr, align 4
18+
%0 = load i32, ptr %i.addr, align 4, !dbg !10
1919
%cmp = icmp slt i32 %0, 10, !dbg !10
2020
br i1 %cmp, label %if.then, label %if.else, !dbg !10
2121

2222
if.then: ; preds = %entry
23-
%1 = load i32, i32* %i.addr, align 4, !dbg !10
24-
; CHECK: %1 = load i32, i32* %i.addr, align 4, !dbg ![[THEN:[0-9]+]]
23+
%1 = load i32, ptr %i.addr, align 4, !dbg !10
24+
; CHECK: %1 = load i32, ptr %i.addr, align 4, !dbg ![[THEN:[0-9]+]]
2525

26-
store i32 %1, i32* %x, align 4, !dbg !10
27-
; CHECK: store i32 %1, i32* %x, align 4, !dbg ![[THEN]]
26+
store i32 %1, ptr %x, align 4, !dbg !10
27+
; CHECK: store i32 %1, ptr %x, align 4, !dbg ![[THEN]]
2828

2929
br label %if.end, !dbg !10
3030
; CHECK: br label %if.end, !dbg ![[THEN]]
3131

3232
if.else: ; preds = %entry
33-
%2 = load i32, i32* %i.addr, align 4, !dbg !10
34-
; CHECK: %2 = load i32, i32* %i.addr, align 4, !dbg ![[ELSE:[0-9]+]]
33+
%2 = load i32, ptr %i.addr, align 4, !dbg !10
34+
; CHECK: %2 = load i32, ptr %i.addr, align 4, !dbg ![[ELSE:[0-9]+]]
3535

3636
%sub = sub nsw i32 0, %2, !dbg !10
3737
; CHECK: %sub = sub nsw i32 0, %2, !dbg ![[ELSE]]
3838

39-
store i32 %sub, i32* %x, align 4, !dbg !10
40-
; CHECK: store i32 %sub, i32* %x, align 4, !dbg ![[ELSE]]
39+
store i32 %sub, ptr %x, align 4, !dbg !10
40+
; CHECK: store i32 %sub, ptr %x, align 4, !dbg ![[ELSE]]
4141

4242
br label %if.end
4343

‎llvm/test/Transforms/AddDiscriminators/no-discriminators.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -16,25 +16,25 @@ define i32 @foo(i64 %i) #0 !dbg !4 {
1616
entry:
1717
%retval = alloca i32, align 4
1818
%i.addr = alloca i64, align 8
19-
store i64 %i, i64* %i.addr, align 8
20-
call void @llvm.dbg.declare(metadata i64* %i.addr, metadata !13, metadata !DIExpression()), !dbg !14
21-
%0 = load i64, i64* %i.addr, align 8, !dbg !15
22-
; CHECK: %0 = load i64, i64* %i.addr, align 8, !dbg ![[ENTRY:[0-9]+]]
19+
store i64 %i, ptr %i.addr, align 8
20+
call void @llvm.dbg.declare(metadata ptr %i.addr, metadata !13, metadata !DIExpression()), !dbg !14
21+
%0 = load i64, ptr %i.addr, align 8, !dbg !15
22+
; CHECK: %0 = load i64, ptr %i.addr, align 8, !dbg ![[ENTRY:[0-9]+]]
2323
%cmp = icmp slt i64 %0, 5, !dbg !15
2424
; CHECK: %cmp = icmp slt i64 %0, 5, !dbg ![[ENTRY:[0-9]+]]
2525
br i1 %cmp, label %if.then, label %if.else, !dbg !15
2626
; CHECK: br i1 %cmp, label %if.then, label %if.else, !dbg ![[ENTRY:[0-9]+]]
2727

2828
if.then: ; preds = %entry
29-
store i32 2, i32* %retval, !dbg !15
29+
store i32 2, ptr %retval, !dbg !15
3030
br label %return, !dbg !15
3131

3232
if.else: ; preds = %entry
33-
store i32 90, i32* %retval, !dbg !15
33+
store i32 90, ptr %retval, !dbg !15
3434
br label %return, !dbg !15
3535

3636
return: ; preds = %if.else, %if.then
37-
%1 = load i32, i32* %retval, !dbg !17
37+
%1 = load i32, ptr %retval, !dbg !17
3838
ret i32 %1, !dbg !17
3939
}
4040

‎llvm/test/Transforms/AddDiscriminators/oneline.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -13,15 +13,15 @@
1313
define i32 @_Z3fooi(i32 %i) #0 !dbg !4 {
1414
%1 = alloca i32, align 4
1515
%2 = alloca i32, align 4
16-
store i32 %i, i32* %2, align 4, !tbaa !13
17-
call void @llvm.dbg.declare(metadata i32* %2, metadata !9, metadata !17), !dbg !18
18-
%3 = load i32, i32* %2, align 4, !dbg !19, !tbaa !13
16+
store i32 %i, ptr %2, align 4, !tbaa !13
17+
call void @llvm.dbg.declare(metadata ptr %2, metadata !9, metadata !17), !dbg !18
18+
%3 = load i32, ptr %2, align 4, !dbg !19, !tbaa !13
1919
%4 = icmp eq i32 %3, 3, !dbg !21
2020
br i1 %4, label %8, label %5, !dbg !22
2121

2222
; <label>:5 ; preds = %0
23-
%6 = load i32, i32* %2, align 4, !dbg !23, !tbaa !13
24-
; CHECK: %6 = load i32, i32* %2, align 4, !dbg ![[THEN1:[0-9]+]],{{.*}}
23+
%6 = load i32, ptr %2, align 4, !dbg !23, !tbaa !13
24+
; CHECK: %6 = load i32, ptr %2, align 4, !dbg ![[THEN1:[0-9]+]],{{.*}}
2525

2626
%7 = icmp eq i32 %6, 5, !dbg !24
2727
; CHECK: %7 = icmp eq i32 %6, 5, !dbg ![[THEN2:[0-9]+]]
@@ -30,21 +30,21 @@ define i32 @_Z3fooi(i32 %i) #0 !dbg !4 {
3030
; CHECK: br i1 %7, label %8, label %9, !dbg ![[THEN3:[0-9]+]]
3131

3232
; <label>:8 ; preds = %5, %0
33-
store i32 100, i32* %1, align 4, !dbg !26
34-
; CHECK: store i32 100, i32* %1, align 4, !dbg ![[ELSE:[0-9]+]]
33+
store i32 100, ptr %1, align 4, !dbg !26
34+
; CHECK: store i32 100, ptr %1, align 4, !dbg ![[ELSE:[0-9]+]]
3535

3636
br label %10, !dbg !26
3737
; CHECK: br label %10, !dbg ![[ELSE]]
3838

3939
; <label>:9 ; preds = %5
40-
store i32 99, i32* %1, align 4, !dbg !27
41-
; CHECK: store i32 99, i32* %1, align 4, !dbg ![[COMBINE:[0-9]+]]
40+
store i32 99, ptr %1, align 4, !dbg !27
41+
; CHECK: store i32 99, ptr %1, align 4, !dbg ![[COMBINE:[0-9]+]]
4242

4343
br label %10, !dbg !27
4444
; CHECK: br label %10, !dbg ![[COMBINE]]
4545

4646
; <label>:10 ; preds = %9, %8
47-
%11 = load i32, i32* %1, align 4, !dbg !28
47+
%11 = load i32, ptr %1, align 4, !dbg !28
4848
ret i32 %11, !dbg !28
4949
}
5050

0 commit comments

Comments
 (0)