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[AMDGPU] Update isLegalAddressingMode for GFX12 SMEM loads (#78728)
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llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1534,13 +1534,14 @@ bool SITargetLowering::isLegalAddressingMode(const DataLayout &DL,
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if (AM.BaseOffs % 4 != 0)
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return isLegalMUBUFAddressingMode(AM);
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// There are no SMRD extloads, so if we have to do a small type access we
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// will use a MUBUF load.
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// FIXME?: We also need to do this if unaligned, but we don't know the
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// alignment here.
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// TODO: Update this for GFX12 which does have scalar sub-dword loads.
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if (Ty->isSized() && DL.getTypeStoreSize(Ty) < 4)
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return isLegalGlobalAddressingMode(AM);
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if (!Subtarget->hasScalarSubwordLoads()) {
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// There are no SMRD extloads, so if we have to do a small type access we
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// will use a MUBUF load.
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// FIXME?: We also need to do this if unaligned, but we don't know the
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// alignment here.
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if (Ty->isSized() && DL.getTypeStoreSize(Ty) < 4)
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return isLegalGlobalAddressingMode(AM);
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}
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if (Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS) {
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// SMRD instructions have an 8-bit, dword offset on SI.

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