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[CodeGen] TwoAddressInstructionPass: Update default option #100046

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[CodeGen] TwoAddressInstructionPass: Update default option #100046

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13 changes: 10 additions & 3 deletions llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,13 @@ EnableRescheduling("twoaddr-reschedule",
cl::desc("Coalesce copies by rescheduling (default=true)"),
cl::init(true), cl::Hidden);

// Limit the number of rescheduling visits to dependent instructions.
// FIXME: Arbitrary limit to reduce compile time cost.
static cl::opt<unsigned>
MaxVisits("twoaddr-visit-limit", cl::Hidden, cl::init(100),
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For this PR, it would be better to keep the original value as default (10) - but add test coverage for setting twoaddr-visit-limit to higher (and lower?) values. We can then do another PR that alters the default value in the future.

cl::desc("Maximum number of rescheduling visits to dependent "
"instructions (0 = no limit)"));

// Limit the number of dataflow edges to traverse when evaluating the benefit
// of commuting operands.
static cl::opt<unsigned> MaxDataFlowEdge(
Expand Down Expand Up @@ -994,7 +1001,7 @@ bool TwoAddressInstructionImpl::rescheduleMIBelowKill(
// Debug or pseudo instructions cannot be counted against the limit.
if (OtherMI.isDebugOrPseudoInstr())
continue;
if (NumVisited > 10) // FIXME: Arbitrary limit to reduce compile time cost.
if (MaxVisits && NumVisited > MaxVisits)
return false;
++NumVisited;
if (OtherMI.hasUnmodeledSideEffects() || OtherMI.isCall() ||
Expand Down Expand Up @@ -1160,14 +1167,14 @@ bool TwoAddressInstructionImpl::rescheduleKillAboveMI(
}
}

// Check if the reschedule will not break depedencies.
// Check if the reschedule will not break dependencies.
unsigned NumVisited = 0;
for (MachineInstr &OtherMI :
make_range(mi, MachineBasicBlock::iterator(KillMI))) {
// Debug or pseudo instructions cannot be counted against the limit.
if (OtherMI.isDebugOrPseudoInstr())
continue;
if (NumVisited > 10) // FIXME: Arbitrary limit to reduce compile time cost.
if (MaxVisits && NumVisited > MaxVisits)
return false;
++NumVisited;
if (OtherMI.hasUnmodeledSideEffects() || OtherMI.isCall() ||
Expand Down
168 changes: 78 additions & 90 deletions llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -1148,63 +1148,57 @@ define void @sext_v32i8_v32i64(ptr %in, ptr %out) {
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q1, q0, [x0]
; CHECK-NEXT: add z0.b, z0.b, z0.b
; CHECK-NEXT: add z1.b, z1.b, z1.b
; CHECK-NEXT: mov z2.d, z0.d
; CHECK-NEXT: sunpklo z0.h, z0.b
; CHECK-NEXT: mov z3.d, z1.d
; CHECK-NEXT: sunpklo z1.h, z1.b
; CHECK-NEXT: add z2.b, z1.b, z1.b
; CHECK-NEXT: sunpklo z3.h, z0.b
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: sunpklo z1.h, z2.b
; CHECK-NEXT: ext z2.b, z2.b, z2.b, #8
; CHECK-NEXT: sunpklo z0.h, z0.b
; CHECK-NEXT: sunpklo z4.s, z3.h
; CHECK-NEXT: ext z3.b, z3.b, z3.b, #8
; CHECK-NEXT: sunpklo z4.s, z0.h
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: sunpklo z5.s, z1.h
; CHECK-NEXT: ext z1.b, z1.b, z1.b, #8
; CHECK-NEXT: sunpklo z2.h, z2.b
; CHECK-NEXT: sunpklo z3.h, z3.b
; CHECK-NEXT: sunpklo z0.s, z0.h
; CHECK-NEXT: sunpklo z16.d, z4.s
; CHECK-NEXT: ext z1.b, z1.b, z1.b, #8
; CHECK-NEXT: sunpklo z6.s, z0.h
; CHECK-NEXT: sunpklo z3.s, z3.h
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: sunpklo z7.d, z4.s
; CHECK-NEXT: ext z4.b, z4.b, z4.b, #8
; CHECK-NEXT: sunpklo z1.s, z1.h
; CHECK-NEXT: sunpklo z17.d, z5.s
; CHECK-NEXT: sunpklo z16.d, z5.s
; CHECK-NEXT: ext z5.b, z5.b, z5.b, #8
; CHECK-NEXT: sunpklo z6.s, z2.h
; CHECK-NEXT: sunpklo z7.s, z3.h
; CHECK-NEXT: sunpklo z17.s, z2.h
; CHECK-NEXT: ext z2.b, z2.b, z2.b, #8
; CHECK-NEXT: sunpklo z4.d, z4.s
; CHECK-NEXT: sunpklo z1.s, z1.h
; CHECK-NEXT: sunpklo z0.s, z0.h
; CHECK-NEXT: sunpklo z18.d, z6.s
; CHECK-NEXT: ext z6.b, z6.b, z6.b, #8
; CHECK-NEXT: sunpklo z19.d, z3.s
; CHECK-NEXT: ext z3.b, z3.b, z3.b, #8
; CHECK-NEXT: sunpklo z19.d, z0.s
; CHECK-NEXT: sunpklo z4.d, z4.s
; CHECK-NEXT: sunpklo z5.d, z5.s
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: sunpklo z2.s, z2.h
; CHECK-NEXT: sunpklo z18.d, z6.s
; CHECK-NEXT: ext z6.b, z6.b, z6.b, #8
; CHECK-NEXT: sunpklo z3.s, z3.h
; CHECK-NEXT: stp q16, q4, [x1, #128]
; CHECK-NEXT: mov z16.d, z7.d
; CHECK-NEXT: sunpklo z0.d, z0.s
; CHECK-NEXT: stp q17, q5, [x1]
; CHECK-NEXT: sunpklo z5.d, z7.s
; CHECK-NEXT: sunpklo z4.d, z6.s
; CHECK-NEXT: mov z6.d, z1.d
; CHECK-NEXT: ext z16.b, z16.b, z7.b, #8
; CHECK-NEXT: mov z7.d, z2.d
; CHECK-NEXT: stp q19, q0, [x1, #160]
; CHECK-NEXT: sunpklo z0.d, z2.s
; CHECK-NEXT: ext z6.b, z6.b, z1.b, #8
; CHECK-NEXT: sunpklo z1.d, z1.s
; CHECK-NEXT: stp q18, q4, [x1, #192]
; CHECK-NEXT: mov z4.d, z3.d
; CHECK-NEXT: ext z7.b, z7.b, z2.b, #8
; CHECK-NEXT: sunpklo z16.d, z16.s
; CHECK-NEXT: sunpklo z6.d, z6.s
; CHECK-NEXT: ext z4.b, z4.b, z3.b, #8
; CHECK-NEXT: sunpklo z2.d, z7.s
; CHECK-NEXT: sunpklo z3.d, z3.s
; CHECK-NEXT: stp q5, q16, [x1, #64]
; CHECK-NEXT: stp q1, q6, [x1, #32]
; CHECK-NEXT: sunpklo z1.d, z4.s
; CHECK-NEXT: stp q0, q2, [x1, #224]
; CHECK-NEXT: stp q3, q1, [x1, #96]
; CHECK-NEXT: stp q16, q5, [x1]
; CHECK-NEXT: sunpklo z5.d, z1.s
; CHECK-NEXT: ext z1.b, z1.b, z1.b, #8
; CHECK-NEXT: stp q7, q4, [x1, #128]
; CHECK-NEXT: sunpklo z4.d, z17.s
; CHECK-NEXT: ext z17.b, z17.b, z17.b, #8
; CHECK-NEXT: stp q18, q6, [x1, #192]
; CHECK-NEXT: sunpklo z6.d, z0.s
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: stp q19, q3, [x1, #160]
; CHECK-NEXT: sunpklo z3.d, z2.s
; CHECK-NEXT: ext z2.b, z2.b, z2.b, #8
; CHECK-NEXT: sunpklo z7.d, z17.s
; CHECK-NEXT: sunpklo z1.d, z1.s
; CHECK-NEXT: sunpklo z0.d, z0.s
; CHECK-NEXT: sunpklo z2.d, z2.s
; CHECK-NEXT: stp q5, q1, [x1, #32]
; CHECK-NEXT: stp q4, q7, [x1, #64]
; CHECK-NEXT: stp q3, q2, [x1, #96]
; CHECK-NEXT: stp q6, q0, [x1, #224]
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: sext_v32i8_v32i64:
Expand Down Expand Up @@ -3133,63 +3127,57 @@ define void @zext_v32i8_v32i64(ptr %in, ptr %out) {
; CHECK: // %bb.0:
; CHECK-NEXT: ldp q1, q0, [x0]
; CHECK-NEXT: add z0.b, z0.b, z0.b
; CHECK-NEXT: add z1.b, z1.b, z1.b
; CHECK-NEXT: mov z2.d, z0.d
; CHECK-NEXT: uunpklo z0.h, z0.b
; CHECK-NEXT: mov z3.d, z1.d
; CHECK-NEXT: uunpklo z1.h, z1.b
; CHECK-NEXT: add z2.b, z1.b, z1.b
; CHECK-NEXT: uunpklo z3.h, z0.b
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: uunpklo z1.h, z2.b
; CHECK-NEXT: ext z2.b, z2.b, z2.b, #8
; CHECK-NEXT: uunpklo z0.h, z0.b
; CHECK-NEXT: uunpklo z4.s, z3.h
; CHECK-NEXT: ext z3.b, z3.b, z3.b, #8
; CHECK-NEXT: uunpklo z4.s, z0.h
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: uunpklo z5.s, z1.h
; CHECK-NEXT: ext z1.b, z1.b, z1.b, #8
; CHECK-NEXT: uunpklo z2.h, z2.b
; CHECK-NEXT: uunpklo z3.h, z3.b
; CHECK-NEXT: uunpklo z0.s, z0.h
; CHECK-NEXT: uunpklo z16.d, z4.s
; CHECK-NEXT: ext z1.b, z1.b, z1.b, #8
; CHECK-NEXT: uunpklo z6.s, z0.h
; CHECK-NEXT: uunpklo z3.s, z3.h
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: uunpklo z7.d, z4.s
; CHECK-NEXT: ext z4.b, z4.b, z4.b, #8
; CHECK-NEXT: uunpklo z1.s, z1.h
; CHECK-NEXT: uunpklo z17.d, z5.s
; CHECK-NEXT: uunpklo z16.d, z5.s
; CHECK-NEXT: ext z5.b, z5.b, z5.b, #8
; CHECK-NEXT: uunpklo z6.s, z2.h
; CHECK-NEXT: uunpklo z7.s, z3.h
; CHECK-NEXT: uunpklo z17.s, z2.h
; CHECK-NEXT: ext z2.b, z2.b, z2.b, #8
; CHECK-NEXT: uunpklo z4.d, z4.s
; CHECK-NEXT: uunpklo z1.s, z1.h
; CHECK-NEXT: uunpklo z0.s, z0.h
; CHECK-NEXT: uunpklo z18.d, z6.s
; CHECK-NEXT: ext z6.b, z6.b, z6.b, #8
; CHECK-NEXT: uunpklo z19.d, z3.s
; CHECK-NEXT: ext z3.b, z3.b, z3.b, #8
; CHECK-NEXT: uunpklo z19.d, z0.s
; CHECK-NEXT: uunpklo z4.d, z4.s
; CHECK-NEXT: uunpklo z5.d, z5.s
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: uunpklo z2.s, z2.h
; CHECK-NEXT: uunpklo z18.d, z6.s
; CHECK-NEXT: ext z6.b, z6.b, z6.b, #8
; CHECK-NEXT: uunpklo z3.s, z3.h
; CHECK-NEXT: stp q16, q4, [x1, #128]
; CHECK-NEXT: mov z16.d, z7.d
; CHECK-NEXT: uunpklo z0.d, z0.s
; CHECK-NEXT: stp q17, q5, [x1]
; CHECK-NEXT: uunpklo z5.d, z7.s
; CHECK-NEXT: uunpklo z4.d, z6.s
; CHECK-NEXT: mov z6.d, z1.d
; CHECK-NEXT: ext z16.b, z16.b, z7.b, #8
; CHECK-NEXT: mov z7.d, z2.d
; CHECK-NEXT: stp q19, q0, [x1, #160]
; CHECK-NEXT: uunpklo z0.d, z2.s
; CHECK-NEXT: ext z6.b, z6.b, z1.b, #8
; CHECK-NEXT: uunpklo z1.d, z1.s
; CHECK-NEXT: stp q18, q4, [x1, #192]
; CHECK-NEXT: mov z4.d, z3.d
; CHECK-NEXT: ext z7.b, z7.b, z2.b, #8
; CHECK-NEXT: uunpklo z16.d, z16.s
; CHECK-NEXT: uunpklo z6.d, z6.s
; CHECK-NEXT: ext z4.b, z4.b, z3.b, #8
; CHECK-NEXT: uunpklo z2.d, z7.s
; CHECK-NEXT: uunpklo z3.d, z3.s
; CHECK-NEXT: stp q5, q16, [x1, #64]
; CHECK-NEXT: stp q1, q6, [x1, #32]
; CHECK-NEXT: uunpklo z1.d, z4.s
; CHECK-NEXT: stp q0, q2, [x1, #224]
; CHECK-NEXT: stp q3, q1, [x1, #96]
; CHECK-NEXT: stp q16, q5, [x1]
; CHECK-NEXT: uunpklo z5.d, z1.s
; CHECK-NEXT: ext z1.b, z1.b, z1.b, #8
; CHECK-NEXT: stp q7, q4, [x1, #128]
; CHECK-NEXT: uunpklo z4.d, z17.s
; CHECK-NEXT: ext z17.b, z17.b, z17.b, #8
; CHECK-NEXT: stp q18, q6, [x1, #192]
; CHECK-NEXT: uunpklo z6.d, z0.s
; CHECK-NEXT: ext z0.b, z0.b, z0.b, #8
; CHECK-NEXT: stp q19, q3, [x1, #160]
; CHECK-NEXT: uunpklo z3.d, z2.s
; CHECK-NEXT: ext z2.b, z2.b, z2.b, #8
; CHECK-NEXT: uunpklo z7.d, z17.s
; CHECK-NEXT: uunpklo z1.d, z1.s
; CHECK-NEXT: uunpklo z0.d, z0.s
; CHECK-NEXT: uunpklo z2.d, z2.s
; CHECK-NEXT: stp q5, q1, [x1, #32]
; CHECK-NEXT: stp q4, q7, [x1, #64]
; CHECK-NEXT: stp q3, q2, [x1, #96]
; CHECK-NEXT: stp q6, q0, [x1, #224]
; CHECK-NEXT: ret
;
; NONEON-NOSVE-LABEL: zext_v32i8_v32i64:
Expand Down
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