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[SLP][REVEC] Make Instruction::Select support vector instructions. #100507

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Merged
merged 2 commits into from
Jul 31, 2024
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[SLP][REVEC] Make Instruction::Select support vector instructions. #100507

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04a648b
[SLP][REVEC] Pre-commit test.
HanKuanChen Jun 28, 2024
b29ba15
[SLP][REVEC] Make Instruction::Select support vector instructions.
HanKuanChen Jun 28, 2024
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33 changes: 33 additions & 0 deletions llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -9713,6 +9713,23 @@ BoUpSLP::getEntryCost(const TreeEntry *E, ArrayRef<Value *> VectorizedVals,
}
VecCost = std::min(VecCost, IntrinsicCost);
}
if (auto *SI = dyn_cast<SelectInst>(VL0)) {
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Why this is specific only for selects?

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Only select has a special form.
For fcmp and icmp, it is either i1 = cmp <cond> <ty>, <ty> or <i1 x N> = cmp <cond> <ty x N>, <ty x N>.
For select, it can be select i1, <ty>, <ty>, select <i1 x N>, <ty x N>, <ty x N> or select i1, <ty x N>, <ty x N>.

auto *CondType =
getWidenedType(SI->getCondition()->getType(), VL.size());
unsigned CondNumElements = CondType->getNumElements();
unsigned VecTyNumElements = getNumElements(VecTy);
assert(VecTyNumElements >= CondNumElements &&
VecTyNumElements % CondNumElements == 0 &&
"Cannot vectorize Instruction::Select");
if (CondNumElements != VecTyNumElements) {
// When the return type is i1 but the source is fixed vector type, we
// need to duplicate the condition value.
VecCost += TTI->getShuffleCost(
TTI::SK_PermuteSingleSrc, CondType,
createReplicatedMask(VecTyNumElements / CondNumElements,
CondNumElements));
}
}
return VecCost + CommonCost;
};
return GetCostDiff(GetScalarCost, GetVectorCost);
Expand Down Expand Up @@ -13196,6 +13213,22 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E, bool PostponedPHIs) {
False = Builder.CreateIntCast(False, VecTy, GetOperandSignedness(2));
}

unsigned CondNumElements = getNumElements(Cond->getType());
unsigned TrueNumElements = getNumElements(True->getType());
assert(TrueNumElements >= CondNumElements &&
TrueNumElements % CondNumElements == 0 &&
"Cannot vectorize Instruction::Select");
assert(TrueNumElements == getNumElements(False->getType()) &&
"Cannot vectorize Instruction::Select");
if (CondNumElements != TrueNumElements) {
// When the return type is i1 but the source is fixed vector type, we
// need to duplicate the condition value.
Cond = Builder.CreateShuffleVector(
Cond, createReplicatedMask(TrueNumElements / CondNumElements,
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What if CondNumElements > TrueNumElements?

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Cannot. CondNumElements <= TrueNumElements.

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Add assertion

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Add in getEntryCost, including comments.

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Add here too

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Done.

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Can it be that TrueNumElements % CondNumElements != 0? Will you handle it correctly?

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Cannot. They are the operands of Instruction::Select. The number of elements must be the same.

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Add the assertions, please, in all branches

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Done

CondNumElements));
}
assert(getNumElements(Cond->getType()) == TrueNumElements &&
"Cannot vectorize Instruction::Select");
Value *V = Builder.CreateSelect(Cond, True, False);
V = FinalShuffle(V, E, VecTy);

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30 changes: 30 additions & 0 deletions llvm/test/Transforms/SLPVectorizer/revec.ll
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Expand Up @@ -58,3 +58,33 @@ entry:
store <8 x i16> %4, ptr %5, align 2
ret void
}

define void @test3(ptr %x, ptr %y, ptr %z) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x ptr> poison, ptr [[X:%.*]], i32 0
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x ptr> [[TMP0]], ptr [[Y:%.*]], i32 1
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x ptr> [[TMP1]], zeroinitializer
; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i32>, ptr [[X]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i32>, ptr [[Y]], align 4
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x i1> [[TMP2]], <2 x i1> poison, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1>
; CHECK-NEXT: [[TMP6:%.*]] = select <8 x i1> [[TMP5]], <8 x i32> [[TMP3]], <8 x i32> [[TMP4]]
; CHECK-NEXT: store <8 x i32> [[TMP6]], ptr [[Z:%.*]], align 4
; CHECK-NEXT: ret void
;
entry:
%0 = getelementptr inbounds i32, ptr %x, i64 4
%1 = getelementptr inbounds i32, ptr %y, i64 4
%2 = load <4 x i32>, ptr %x, align 4
%3 = load <4 x i32>, ptr %0, align 4
%4 = load <4 x i32>, ptr %y, align 4
%5 = load <4 x i32>, ptr %1, align 4
%6 = icmp eq ptr %x, null
%7 = icmp eq ptr %y, null
%8 = select i1 %6, <4 x i32> %2, <4 x i32> %4
%9 = select i1 %7, <4 x i32> %3, <4 x i32> %5
%10 = getelementptr inbounds i32, ptr %z, i64 4
store <4 x i32> %8, ptr %z, align 4
store <4 x i32> %9, ptr %10, align 4
ret void
}
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