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[RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P #100684

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Merged
merged 9 commits into from
Oct 1, 2024
Merged
5 changes: 5 additions & 0 deletions clang/include/clang/Basic/BuiltinsRISCV.td
Original file line number Diff line number Diff line change
Expand Up @@ -146,3 +146,8 @@ let Features = "zihintntl", Attributes = [CustomTypeChecking] in {
def ntl_load : RISCVBuiltin<"void(...)">;
def ntl_store : RISCVBuiltin<"void(...)">;
} // Features = "zihintntl", Attributes = [CustomTypeChecking]

//===----------------------------------------------------------------------===//
// XCV extensions.
//===----------------------------------------------------------------------===//
include "clang/Basic/BuiltinsRISCVXCV.td"
41 changes: 41 additions & 0 deletions clang/include/clang/Basic/BuiltinsRISCVXCV.td
Original file line number Diff line number Diff line change
@@ -0,0 +1,41 @@
//==- BuiltinsRISCVXCV.td - RISC-V CORE-V Builtin database ----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the CORE-V-specific builtin function database. Users of
// this file must define the BUILTIN macro to make use of this information.
//
//===----------------------------------------------------------------------===//

class RISCXCVBuiltin<string prototype, string features = ""> : TargetBuiltin {
let Spellings = ["__builtin_riscv_cv_" # NAME];
let Prototype = prototype;
let Features = features;
}

let Attributes = [NoThrow, Const] in {
//===----------------------------------------------------------------------===//
// XCValu extension.
//===----------------------------------------------------------------------===//
def alu_slet : RISCXCVBuiltin<"int(int, int)", "xcvalu">;
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Did the intrinsics keep the 't' in their name even though the instruction was renamed here openhwgroup/cv32e40p#833?

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@realqhc realqhc Sep 13, 2024

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I will update the intrinsics accordingly after the documentation is renamed.

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I would rather see them deleted. If it's possible to rename them then it's possible to remove them outright and require people to write the trivial standard C equivalent. They serve zero purpose that I can see.

def alu_sletu : RISCXCVBuiltin<"int(unsigned int, unsigned int)", "xcvalu">;
def alu_exths : RISCXCVBuiltin<"int(int)", "xcvalu">;
def alu_exthz : RISCXCVBuiltin<"unsigned int(unsigned int)", "xcvalu">;
def alu_extbs : RISCXCVBuiltin<"int(int)", "xcvalu">;
def alu_extbz : RISCXCVBuiltin<"unsigned int(unsigned int)", "xcvalu">;

def alu_clip : RISCXCVBuiltin<"int(int, int)", "xcvalu">;
def alu_clipu : RISCXCVBuiltin<"unsigned int(unsigned int, unsigned int)", "xcvalu">;
def alu_addN : RISCXCVBuiltin<"int(int, int, unsigned int)", "xcvalu">;
def alu_adduN : RISCXCVBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", "xcvalu">;
def alu_addRN : RISCXCVBuiltin<"int(int, int, unsigned int)", "xcvalu">;
def alu_adduRN : RISCXCVBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", "xcvalu">;
def alu_subN : RISCXCVBuiltin<"int(int, int, unsigned int)", "xcvalu">;
def alu_subuN : RISCXCVBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", "xcvalu">;
def alu_subRN : RISCXCVBuiltin<"int(int, int, unsigned int)", "xcvalu">;
def alu_subuRN : RISCXCVBuiltin<"unsigned int(unsigned int, unsigned int, unsigned int)", "xcvalu">;
} // Attributes = [NoThrow, Const]
54 changes: 52 additions & 2 deletions clang/lib/CodeGen/CGBuiltin.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -22340,10 +22340,60 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,

return Store;
}
// XCValu
case RISCV::BI__builtin_riscv_cv_alu_addN:
ID = Intrinsic::riscv_cv_alu_addN;
break;
case RISCV::BI__builtin_riscv_cv_alu_addRN:
ID = Intrinsic::riscv_cv_alu_addRN;
break;
case RISCV::BI__builtin_riscv_cv_alu_adduN:
ID = Intrinsic::riscv_cv_alu_adduN;
break;
case RISCV::BI__builtin_riscv_cv_alu_adduRN:
ID = Intrinsic::riscv_cv_alu_adduRN;
break;
case RISCV::BI__builtin_riscv_cv_alu_clip:
ID = Intrinsic::riscv_cv_alu_clip;
break;
case RISCV::BI__builtin_riscv_cv_alu_clipu:
ID = Intrinsic::riscv_cv_alu_clipu;
break;
case RISCV::BI__builtin_riscv_cv_alu_extbs:
return Builder.CreateSExt(Builder.CreateTrunc(Ops[0], Int8Ty), Int32Ty,
"extbs");
case RISCV::BI__builtin_riscv_cv_alu_extbz:
return Builder.CreateZExt(Builder.CreateTrunc(Ops[0], Int8Ty), Int32Ty,
"extbz");
case RISCV::BI__builtin_riscv_cv_alu_exths:
return Builder.CreateSExt(Builder.CreateTrunc(Ops[0], Int16Ty), Int32Ty,
"exths");
case RISCV::BI__builtin_riscv_cv_alu_exthz:
return Builder.CreateZExt(Builder.CreateTrunc(Ops[0], Int16Ty), Int32Ty,
"exthz");
case RISCV::BI__builtin_riscv_cv_alu_slet:
return Builder.CreateZExt(Builder.CreateICmpSLE(Ops[0], Ops[1]), Int32Ty,
"sle");
case RISCV::BI__builtin_riscv_cv_alu_sletu:
return Builder.CreateZExt(Builder.CreateICmpULE(Ops[0], Ops[1]), Int32Ty,
"sleu");
case RISCV::BI__builtin_riscv_cv_alu_subN:
ID = Intrinsic::riscv_cv_alu_subN;
break;
case RISCV::BI__builtin_riscv_cv_alu_subRN:
ID = Intrinsic::riscv_cv_alu_subRN;
break;
case RISCV::BI__builtin_riscv_cv_alu_subuN:
ID = Intrinsic::riscv_cv_alu_subuN;
break;
case RISCV::BI__builtin_riscv_cv_alu_subuRN:
ID = Intrinsic::riscv_cv_alu_subuRN;
break;

// Vector builtins are handled from here.
// Vector builtins are handled from here.
#include "clang/Basic/riscv_vector_builtin_cg.inc"
// SiFive Vector builtins are handled from here.

// SiFive Vector builtins are handled from here.
#include "clang/Basic/riscv_sifive_vector_builtin_cg.inc"
}

Expand Down
1 change: 1 addition & 0 deletions clang/lib/Headers/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -120,6 +120,7 @@ set(ppc_htm_files

set(riscv_files
riscv_bitmanip.h
riscv_corev_alu.h
riscv_crypto.h
riscv_ntlh.h
sifive_vector.h
Expand Down
128 changes: 128 additions & 0 deletions clang/lib/Headers/riscv_corev_alu.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,128 @@
/*===---- riscv_corev_alu.h - CORE-V ALU intrinsics ------------------------===
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*===-----------------------------------------------------------------------===
*/

#ifndef __RISCV_COREV_ALU_H
#define __RISCV_COREV_ALU_H

#include <stdint.h>

#if defined(__cplusplus)
extern "C" {
#endif

#if defined(__riscv_xcvalu)

#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_abs(long a) {
return __builtin_abs(a);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_slet(long a, long b) {
return __builtin_riscv_cv_alu_slet(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS
__riscv_cv_alu_sletu(unsigned long a, unsigned long b) {
return __builtin_riscv_cv_alu_sletu(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_min(long a, long b) {
return __builtin_elementwise_min(a, b);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_minu(unsigned long a, unsigned long b) {
return __builtin_elementwise_min(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_max(long a, long b) {
return __builtin_elementwise_max(a, b);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_maxu(unsigned long a, unsigned long b) {
return __builtin_elementwise_max(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_exths(int16_t a) {
return __builtin_riscv_cv_alu_exths(a);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_exthz(uint16_t a) {
return __builtin_riscv_cv_alu_exthz(a);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_extbs(int8_t a) {
return __builtin_riscv_cv_alu_extbs(a);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_extbz(uint8_t a) {
return __builtin_riscv_cv_alu_extbz(a);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_clip(long a,
unsigned long b) {
return __builtin_riscv_cv_alu_clip(a, b);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_clipu(unsigned long a, unsigned long b) {
return __builtin_riscv_cv_alu_clipu(a, b);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_addN(long a, long b,
uint8_t shft) {
return __builtin_riscv_cv_alu_addN(a, b, shft);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_adduN(unsigned long a, unsigned long b, uint8_t shft) {
return __builtin_riscv_cv_alu_adduN(a, b, shft);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_addRN(long a, long b,
uint8_t shft) {
return __builtin_riscv_cv_alu_addRN(a, b, shft);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_adduRN(unsigned long a, unsigned long b, uint8_t shft) {
return __builtin_riscv_cv_alu_adduRN(a, b, shft);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_subN(long a, long b,
uint8_t shft) {
return __builtin_riscv_cv_alu_subN(a, b, shft);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_subuN(unsigned long a, unsigned long b, uint8_t shft) {
return __builtin_riscv_cv_alu_subuN(a, b, shft);
}

static __inline__ long __DEFAULT_FN_ATTRS __riscv_cv_alu_subRN(long a, long b,
uint8_t shft) {
return __builtin_riscv_cv_alu_subRN(a, b, shft);
}

static __inline__ unsigned long __DEFAULT_FN_ATTRS
__riscv_cv_alu_subuRN(unsigned long a, unsigned long b, uint8_t shft) {
return __builtin_riscv_cv_alu_subuRN(a, b, shft);
}

#endif // defined(__riscv_xcvalu)

#if defined(__cplusplus)
}
#endif

#endif // define __RISCV_COREV_ALU_H
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