-
Notifications
You must be signed in to change notification settings - Fork 14.3k
[RISC-V][GISEL] Select G_BITCAST for scalable vectors #101486
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
base: main
Are you sure you want to change the base?
Changes from all commits
cea2c3e
7d9d4f2
907dbb3
96e23b4
057c06a
File filter
Filter by extension
Conversations
Jump to
Diff view
Diff view
There are no files selected for viewing
Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -559,6 +559,7 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) { | |
case TargetOpcode::G_INTTOPTR: | ||
case TargetOpcode::G_TRUNC: | ||
case TargetOpcode::G_FREEZE: | ||
case TargetOpcode::G_BITCAST: | ||
return selectCopy(MI, MRI); | ||
case TargetOpcode::G_CONSTANT: { | ||
Register DstReg = MI.getOperand(0).getReg(); | ||
|
@@ -757,13 +758,21 @@ bool RISCVInstructionSelector::replacePtrWithInt(MachineOperand &Op, | |
MachineIRBuilder &MIB, | ||
MachineRegisterInfo &MRI) { | ||
Register PtrReg = Op.getReg(); | ||
assert(MRI.getType(PtrReg).isPointer() && "Operand is not a pointer!"); | ||
|
||
const LLT PtrTy = MRI.getType(PtrReg); | ||
const LLT sXLen = LLT::scalar(STI.getXLen()); | ||
auto PtrToInt = MIB.buildPtrToInt(sXLen, PtrReg); | ||
MRI.setRegBank(PtrToInt.getReg(0), RBI.getRegBank(RISCV::GPRBRegBankID)); | ||
Op.setReg(PtrToInt.getReg(0)); | ||
return select(*PtrToInt); | ||
if (PtrTy.isPointer()) { | ||
auto PtrToInt = MIB.buildPtrToInt(sXLen, PtrReg); | ||
MRI.setRegBank(PtrToInt.getReg(0), RBI.getRegBank(RISCV::GPRBRegBankID)); | ||
Op.setReg(PtrToInt.getReg(0)); | ||
return select(*PtrToInt); | ||
} | ||
assert(PtrTy.isPointerVector() && | ||
"Operand must be a pointer of a vector of pointers"); | ||
assert(PtrTy.isScalableVector() && | ||
"Currently only working for scalable vector of pointers now"); | ||
MRI.setType(PtrReg, LLT::scalable_vector( | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more.
Not sure if makes sense to inplace update and return There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. It looks like AArch64 changes the type without building a PtrToInt. They say it works because all users have been selected already (bottom up selection) so the type does not matter for them. I think we can do the same thing, which is what you have done here. I wonder if we really needed to build the PtrToInt above for the same reason. I can take a look at that in a follow up patch. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. If the vector and non-vector code do something wildly different they should not be in the same function. |
||
PtrTy.getElementCount().getKnownMinValue(), sXLen)); | ||
return true; | ||
} | ||
|
||
void RISCVInstructionSelector::preISelLower(MachineInstr &MI, | ||
|
@@ -785,6 +794,29 @@ void RISCVInstructionSelector::preISelLower(MachineInstr &MI, | |
replacePtrWithInt(MI.getOperand(1), MIB, MRI); | ||
MI.setDesc(TII.get(TargetOpcode::G_AND)); | ||
MRI.setType(DstReg, sXLen); | ||
break; | ||
} | ||
case TargetOpcode::G_LOAD: { | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. We have a helper function called replacePtrWithInt. Maybe you can expand that to support vectors instead of doing it here in the code manually? |
||
Register DstReg = MI.getOperand(0).getReg(); | ||
const LLT DstTy = MRI.getType(DstReg); | ||
if (!DstTy.isPointerVector() && | ||
"Destination register that's not a vector of pointers doesn't need to " | ||
"go through preISelLower") | ||
break; | ||
replacePtrWithInt(MI.getOperand(0), MIB, MRI); | ||
break; | ||
} | ||
case TargetOpcode::G_STORE: { | ||
MachineOperand &SrcOp = MI.getOperand(0); | ||
const LLT SrcTy = MRI.getType(SrcOp.getReg()); | ||
if (!SrcTy.isPointerVector() && | ||
"Source register that's not a vector of pointers doesn't need to go " | ||
"through preISelLower") | ||
break; | ||
const LLT sXLen = LLT::scalar(STI.getXLen()); | ||
auto Copy = MIB.buildCopy(LLT::scalable_vector(SrcTy.getElementCount().getKnownMinValue(), sXLen), SrcOp); | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Why do we do a copy instead of changing the store's vector pointer element type to vector of sXLen type? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. the pointer has p0 type. we need to change the type of the data to store, but that type is owned by the instruction that produces the data. so you can't change it. if you were to change it that instruction would fail instruction selection when we visit it. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. nit: clang format |
||
Register NewSrc = Copy.getReg(0); | ||
SrcOp.setReg(NewSrc); | ||
} | ||
} | ||
} | ||
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
We're going to need G_BITCAST instruction-select tests due to this line