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AMDGPU: Permit more frame index operands in verifier #101691

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Merged
merged 1 commit into from
Aug 5, 2024
Merged

AMDGPU: Permit more frame index operands in verifier #101691

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8 changes: 6 additions & 2 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4599,6 +4599,10 @@ static bool shouldReadExec(const MachineInstr &MI) {
return true;
}

static bool isRegOrFI(const MachineOperand &MO) {
return MO.isReg() || MO.isFI();
}

static bool isSubRegOf(const SIRegisterInfo &TRI,
const MachineOperand &SuperVec,
const MachineOperand &SubReg) {
Expand Down Expand Up @@ -4933,7 +4937,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
++ConstantBusCount;
SGPRsUsed.push_back(SGPRUsed);
}
} else {
} else if (!MO.isFI()) { // Treat FI like a register.
if (!UsesLiteral) {
++ConstantBusCount;
UsesLiteral = true;
Expand Down Expand Up @@ -5026,7 +5030,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
const MachineOperand &Src0 = MI.getOperand(Src0Idx);
const MachineOperand &Src1 = MI.getOperand(Src1Idx);

if (!Src0.isReg() && !Src1.isReg() &&
if (!isRegOrFI(Src0) && !isRegOrFI(Src1) &&
!isInlineConstant(Src0, Desc.operands()[Src0Idx]) &&
!isInlineConstant(Src1, Desc.operands()[Src1Idx]) &&
!Src0.isIdenticalTo(Src1)) {
Expand Down
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