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[WebAssembly] Fix assertion in LowerBUILD_VECTOR #101961

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Aug 5, 2024
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4 changes: 2 additions & 2 deletions llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2276,9 +2276,9 @@ SDValue WebAssemblyTargetLowering::LowerBUILD_VECTOR(SDValue Op,
};
} else {
size_t DestLaneSize = VecT.getVectorElementType().getFixedSizeInBits();
if (NumSplatLanes == 1 && (DestLaneSize == 32 || DestLaneSize == 64)) {
if (NumSplatLanes == 1 && Op->getOperand(0) == SplatValue &&
(DestLaneSize == 32 || DestLaneSize == 64)) {
// Could be selected to load_zero.
assert(SplatValue == Op->getOperand(0));
Result = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecT, SplatValue);
} else {
// Use a splat (which might be selected as a load splat)
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14 changes: 14 additions & 0 deletions llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
Original file line number Diff line number Diff line change
Expand Up @@ -495,6 +495,20 @@ define <4 x float> @load_zero_lane_f32x4(ptr %addr.a, ptr %addr.b, ptr %addr.c,
ret <4 x float> %v.3
}

define <4 x float> @load_zero_undef_lane_f32x4(ptr %addr.a, ptr %addr.b) {
; CHECK-LABEL: load_zero_undef_lane_f32x4:
; CHECK: .functype load_zero_undef_lane_f32x4 (i32, i32) -> (v128)
; CHECK-NEXT: # %bb.0:
; CHECK-NEXT: v128.load32_splat $push0=, 0($0)
; CHECK-NEXT: v128.load32_lane $push1=, 0($1), $pop0, 3
; CHECK-NEXT: return $pop1
%a = load float, ptr %addr.a
%b = load float, ptr %addr.b
%v = insertelement <4 x float> undef, float %a, i32 1
%v.1 = insertelement <4 x float> %v, float %b, i32 3
ret <4 x float> %v.1
}

define <2 x double> @load_zero_lane_f64x2(ptr %addr.a, ptr %addr.b) {
; CHECK-LABEL: load_zero_lane_f64x2:
; CHECK: .functype load_zero_lane_f64x2 (i32, i32) -> (v128)
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