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Merged
merged 1 commit into from
Aug 6, 2024
Merged

AMDGPU: Fix using wrong alloca address space in test #102108

merged 1 commit into from
Aug 6, 2024

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@arsenm arsenm commented Aug 6, 2024

value-simplify-gpu.ll seems to lose a noalias deduction on the
call argument.

There are more violations in OpenMP tests, but those are also
shared with nvptx run lines.

@arsenm
AMDGPU: Fix using wrong alloca address space in test
f2365a3 
value-simplify-gpu.ll seems to lose a noalias deduction on the
call argument.

There are more violations in OpenMP tests, but those are also
shared with nvptx run lines.
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arsenm commented Aug 6, 2024

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@arsenm arsenm marked this pull request as ready for review August 6, 2024 08:15
@llvmbot llvmbot added llvm:transforms clang:openmp OpenMP related changes to Clang labels Aug 6, 2024
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llvmbot commented Aug 6, 2024

@llvm/pr-subscribers-llvm-transforms

Author: Matt Arsenault (arsenm)

Changes

value-simplify-gpu.ll seems to lose a noalias deduction on the
call argument.

There are more violations in OpenMP tests, but those are also
shared with nvptx run lines.

Full diff: https://github.com/llvm/llvm-project/pull/102108.diff

4 Files Affected:

  • (modified) llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll (+11-11)
  • (modified) llvm/test/Transforms/Attributor/value-simplify-gpu.ll (+17-12)
  • (modified) llvm/test/Transforms/OpenMP/barrier_removal.ll (+6-6)
  • (modified) llvm/test/Transforms/PhaseOrdering/varargs.ll (+2-1)
diff --git a/llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll b/llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
index 2a5b3e94291a2..9143d44a3c178 100644
--- a/llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
+++ b/llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll
@@ -451,15 +451,15 @@ define i32 @malloc_in_loop(i32 %arg) {
 ; CHECK-LABEL: define {{[^@]+}}@malloc_in_loop
 ; CHECK-SAME: (i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:  bb:
-; CHECK-NEXT:    [[I:%.*]] = alloca i32, align 4
-; CHECK-NEXT:    [[I1:%.*]] = alloca ptr, align 8
-; CHECK-NEXT:    [[I11:%.*]] = alloca i8, i32 0, align 8
-; CHECK-NEXT:    store i32 [[ARG]], ptr [[I]], align 4
+; CHECK-NEXT:    [[I:%.*]] = alloca i32, align 4, addrspace(5)
+; CHECK-NEXT:    [[I1:%.*]] = alloca ptr, align 8, addrspace(5)
+; CHECK-NEXT:    [[I11:%.*]] = alloca i8, i32 0, align 8, addrspace(5)
+; CHECK-NEXT:    store i32 [[ARG]], ptr addrspace(5) [[I]], align 4
 ; CHECK-NEXT:    br label [[BB2:%.*]]
 ; CHECK:       bb2:
-; CHECK-NEXT:    [[I3:%.*]] = load i32, ptr [[I]], align 4
+; CHECK-NEXT:    [[I3:%.*]] = load i32, ptr addrspace(5) [[I]], align 4
 ; CHECK-NEXT:    [[I4:%.*]] = add nsw i32 [[I3]], -1
-; CHECK-NEXT:    store i32 [[I4]], ptr [[I]], align 4
+; CHECK-NEXT:    store i32 [[I4]], ptr addrspace(5) [[I]], align 4
 ; CHECK-NEXT:    [[I5:%.*]] = icmp sgt i32 [[I4]], 0
 ; CHECK-NEXT:    br i1 [[I5]], label [[BB6:%.*]], label [[BB9:%.*]]
 ; CHECK:       bb6:
@@ -469,15 +469,15 @@ define i32 @malloc_in_loop(i32 %arg) {
 ; CHECK-NEXT:    ret i32 5
 ;
 bb:
-  %i = alloca i32, align 4
-  %i1 = alloca ptr, align 8
-  store i32 %arg, ptr %i, align 4
+  %i = alloca i32, align 4, addrspace(5)
+  %i1 = alloca ptr, align 8, addrspace(5)
+  store i32 %arg, ptr addrspace(5) %i, align 4
   br label %bb2
 
 bb2:
-  %i3 = load i32, ptr %i, align 4
+  %i3 = load i32, ptr addrspace(5) %i, align 4
   %i4 = add nsw i32 %i3, -1
-  store i32 %i4, ptr %i, align 4
+  store i32 %i4, ptr addrspace(5) %i, align 4
   %i5 = icmp sgt i32 %i4, 0
   br i1 %i5, label %bb6, label %bb9
 
diff --git a/llvm/test/Transforms/Attributor/value-simplify-gpu.ll b/llvm/test/Transforms/Attributor/value-simplify-gpu.ll
index 04ba6e2dc5f90..dc2d92facf8a3 100644
--- a/llvm/test/Transforms/Attributor/value-simplify-gpu.ll
+++ b/llvm/test/Transforms/Attributor/value-simplify-gpu.ll
@@ -205,8 +205,9 @@ define internal void @level1(i32 %C) {
 ; TUNIT-LABEL: define {{[^@]+}}@level1
 ; TUNIT-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
 ; TUNIT-NEXT:  entry:
-; TUNIT-NEXT:    [[LOCAL:%.*]] = alloca i32, align 4
-; TUNIT-NEXT:    call void @level2all_early(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
+; TUNIT-NEXT:    [[LOCAL_ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; TUNIT-NEXT:    [[LOCAL:%.*]] = addrspacecast ptr addrspace(5) [[LOCAL_ALLOCA]] to ptr
+; TUNIT-NEXT:    call void @level2all_early(ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
 ; TUNIT-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0
 ; TUNIT-NEXT:    br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
 ; TUNIT:       if.then:
@@ -216,29 +217,31 @@ define internal void @level1(i32 %C) {
 ; TUNIT-NEXT:    call void @level2b() #[[ATTR5]]
 ; TUNIT-NEXT:    br label [[IF_END]]
 ; TUNIT:       if.end:
-; TUNIT-NEXT:    call void @level2all_late(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR6]]
+; TUNIT-NEXT:    call void @level2all_late(ptr nocapture nofree noundef writeonly align 4 dereferenceable_or_null(4) [[LOCAL]]) #[[ATTR6]]
 ; TUNIT-NEXT:    ret void
 ;
 ; CGSCC: Function Attrs: norecurse nosync nounwind
 ; CGSCC-LABEL: define {{[^@]+}}@level1
 ; CGSCC-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
 ; CGSCC-NEXT:  entry:
-; CGSCC-NEXT:    [[LOCAL:%.*]] = alloca i32, align 4
-; CGSCC-NEXT:    call void @level2all_early(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR5]]
+; CGSCC-NEXT:    [[LOCAL_ALLOCA:%.*]] = alloca i32, align 4, addrspace(5)
+; CGSCC-NEXT:    [[LOCAL:%.*]] = addrspacecast ptr addrspace(5) [[LOCAL_ALLOCA]] to ptr
+; CGSCC-NEXT:    call void @level2all_early(ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR5]]
 ; CGSCC-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0
 ; CGSCC-NEXT:    br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
 ; CGSCC:       if.then:
-; CGSCC-NEXT:    call void @level2a(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
+; CGSCC-NEXT:    call void @level2a(ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
 ; CGSCC-NEXT:    br label [[IF_END:%.*]]
 ; CGSCC:       if.else:
-; CGSCC-NEXT:    call void @level2b(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
+; CGSCC-NEXT:    call void @level2b(ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]]
 ; CGSCC-NEXT:    br label [[IF_END]]
 ; CGSCC:       if.end:
-; CGSCC-NEXT:    call void @level2all_late(ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR6]]
+; CGSCC-NEXT:    call void @level2all_late(ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR6]]
 ; CGSCC-NEXT:    ret void
 ;
 entry:
-  %local = alloca i32
+  %local.alloca = alloca i32, addrspace(5)
+  %local = addrspacecast ptr addrspace(5) %local.alloca to ptr
   call void @level2all_early(ptr %local)
   %tobool = icmp ne i32 %C, 0
   br i1 %tobool, label %if.then, label %if.else
@@ -259,9 +262,10 @@ if.end:                                           ; preds = %if.else, %if.then
 define internal void @level2all_early(ptr %addr) {
 ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
 ; TUNIT-LABEL: define {{[^@]+}}@level2all_early
-; TUNIT-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
+; TUNIT-SAME: (ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
 ; TUNIT-NEXT:  entry:
 ; TUNIT-NEXT:    store i32 1, ptr addrspace(3) @ReachableNonKernel, align 4
+; TUNIT-NEXT:    [[TMP0:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
 ; TUNIT-NEXT:    ret void
 ;
 ; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
@@ -337,14 +341,15 @@ entry:
 define internal void @level2all_late(ptr %addr) {
 ; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
 ; TUNIT-LABEL: define {{[^@]+}}@level2all_late
-; TUNIT-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
+; TUNIT-SAME: (ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
 ; TUNIT-NEXT:  entry:
 ; TUNIT-NEXT:    store i32 1, ptr addrspace(3) @UnreachableNonKernel, align 4
+; TUNIT-NEXT:    [[TMP0:%.*]] = addrspacecast ptr [[ADDR]] to ptr addrspace(5)
 ; TUNIT-NEXT:    ret void
 ;
 ; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write)
 ; CGSCC-LABEL: define {{[^@]+}}@level2all_late
-; CGSCC-SAME: (ptr noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
+; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] {
 ; CGSCC-NEXT:  entry:
 ; CGSCC-NEXT:    store i32 1, ptr addrspace(3) @UnreachableNonKernel, align 4
 ; CGSCC-NEXT:    store i32 5, ptr [[ADDR]], align 4
diff --git a/llvm/test/Transforms/OpenMP/barrier_removal.ll b/llvm/test/Transforms/OpenMP/barrier_removal.ll
index 5bfdb6fe284a0..0925418cf54c7 100644
--- a/llvm/test/Transforms/OpenMP/barrier_removal.ll
+++ b/llvm/test/Transforms/OpenMP/barrier_removal.ll
@@ -332,28 +332,28 @@ define void @pos_priv_mem() "kernel" {
 ; CHECK-LABEL: define {{[^@]+}}@pos_priv_mem
 ; CHECK-SAME: () #[[ATTR4]] {
 ; CHECK-NEXT:    [[ARG:%.*]] = load ptr addrspace(5), ptr @GPtr5, align 4
-; CHECK-NEXT:    [[LOC:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    [[LOC:%.*]] = alloca i32, align 4, addrspace(5)
 ; CHECK-NEXT:    [[A:%.*]] = load i32, ptr @PG1, align 4
-; CHECK-NEXT:    store i32 [[A]], ptr [[LOC]], align 4
+; CHECK-NEXT:    store i32 [[A]], ptr addrspace(5) [[LOC]], align 4
 ; CHECK-NEXT:    [[B:%.*]] = load i32, ptr addrspacecast (ptr addrspace(5) @PG2 to ptr), align 4
 ; CHECK-NEXT:    [[ARGC:%.*]] = addrspacecast ptr addrspace(5) [[ARG]] to ptr
 ; CHECK-NEXT:    store i32 [[B]], ptr [[ARGC]], align 4
-; CHECK-NEXT:    [[V:%.*]] = load i32, ptr [[LOC]], align 4
+; CHECK-NEXT:    [[V:%.*]] = load i32, ptr addrspace(5) [[LOC]], align 4
 ; CHECK-NEXT:    store i32 [[V]], ptr @PG1, align 4
 ; CHECK-NEXT:    ret void
 ;
   %arg = load ptr addrspace(5), ptr @GPtr5
-  %loc = alloca i32
+  %loc = alloca i32, addrspace(5)
   %a = load i32, ptr @PG1
   call void @aligned_barrier()
-  store i32 %a, ptr %loc
+  store i32 %a, ptr addrspace(5) %loc
   %PG2c = addrspacecast ptr addrspace(5) @PG2 to ptr
   %b = load i32, ptr %PG2c
   call void @aligned_barrier()
   %argc = addrspacecast ptr addrspace(5) %arg to ptr
   store i32 %b, ptr %argc
   call void @aligned_barrier()
-  %v = load i32, ptr %loc
+  %v = load i32, ptr addrspace(5) %loc
   store i32 %v, ptr @PG1
   call void @aligned_barrier()
   ret void
diff --git a/llvm/test/Transforms/PhaseOrdering/varargs.ll b/llvm/test/Transforms/PhaseOrdering/varargs.ll
index c66a982a06a6d..70c63a800e111 100644
--- a/llvm/test/Transforms/PhaseOrdering/varargs.ll
+++ b/llvm/test/Transforms/PhaseOrdering/varargs.ll
@@ -20,7 +20,8 @@ entry:
 
 define internal i32 @vararg(i32 %first, ...) {
 entry:
-  %vlist = alloca ptr, align 8
+  %vlist.alloca = alloca ptr, align 8, addrspace(5)
+  %vlist = addrspacecast ptr addrspace(5) %vlist.alloca to ptr
   call void @llvm.va_start.p0(ptr %vlist)
   %vlist.promoted = load ptr, ptr %vlist, align 8
   %argp.a = getelementptr inbounds i8, ptr %vlist.promoted, i64 4

@arsenm arsenm merged commit f9060f1 into main Aug 6, 2024
12 checks passed
@arsenm arsenm deleted the users/arsenm/amdgpu-fix-wrong-alloca-addrspace-in-test branch August 6, 2024 20:19
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@jdoerfert jdoerfert jdoerfert approved these changes

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