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[PowerPC][AIX] Update the initial CPU type for AIX. #102277

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3 changes: 3 additions & 0 deletions llvm/lib/Target/PowerPC/PPCSubtarget.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/TargetParser/PPCTargetParser.h"
#include <cstdlib>

using namespace llvm;
Expand Down Expand Up @@ -84,6 +85,8 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef TuneCPU,
CPUName = "ppc64le";
else if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
CPUName = "e500";
else if (TargetTriple.isOSAIX() && CPUName.empty())
CPUName = std::string(PPC::getNormalizedPPCTargetCPU(TargetTriple));
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For triple ppc64le, getNormalizedPPCTargetCPU() returns expected CPUName, ppc64le.

Will there be any issues if we just use: (We should use same CPU for clang and llc on all targets. )

if (CPUName.empty() || CPU == "generic") {
  if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
    CPUName = "e500";
  else
    CPUName = std::string(PPC::getNormalizedPPCTargetCPU(TargetTriple));
}

else
CPUName = "generic";
}
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ target triple = "powerpc-ibm-aix7.2.0.0"
; Check IndexedReference::computeRefCost can handle type differences between
; CacheLineSize and Numerator

; CHECK: Loop '_loop_1_do_' has cost = 2
; CHECK: Loop '_loop_1_do_' has cost = 1

%_elem_type_of_v = type <{ i32 }>

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | \
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It does not make sense to me to set -mcpu=generic with this patch for all LIT cases. Unless the test point is broken with the CPU change, otherwise we should update the cases.

; RUN: FileCheck --check-prefix=32BIT %s

; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: FileCheck --check-prefix=64BIT %s

define void @call_test_chars() {
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-dwarf.ll
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@

; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t.o < %s
; RUN: llvm-readobj --section-headers %t.o | FileCheck %s --check-prefixes=SEC,SEC32
; RUN: llvm-objdump -r %t.o | FileCheck %s --check-prefix=RELO

; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t64.o < %s
; RUN: llvm-readobj --section-headers %t64.o | FileCheck %s --check-prefixes=SEC,SEC64
; RUN: llvm-objdump -r %t64.o | FileCheck %s --check-prefix=RELO64

Expand Down
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -verify-machineinstrs < %s | FileCheck %s

@llvm.global_ctors = appending global [5 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 0, ptr @cf1, ptr null }, { i32, ptr, ptr } { i32 21, ptr @cf2, ptr null }, { i32, ptr, ptr } { i32 81, ptr @cf3, ptr null }, { i32, ptr, ptr } { i32 1125, ptr @cf4, ptr null }, { i32, ptr, ptr } { i32 64512, ptr @cf5, ptr null }]
@llvm.global_dtors = appending global [5 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 20, ptr @df1, ptr null }, { i32, ptr, ptr } { i32 80, ptr @df2, ptr null }, { i32, ptr, ptr } { i32 1124, ptr @df3, ptr null }, { i32, ptr, ptr } { i32 64511, ptr @df4, ptr null }, { i32, ptr, ptr } { i32 65535, ptr @df5, ptr null }]
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -dr %t.o | FileCheck --check-prefix=OBJ32 %s

; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t.o < %s
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t.o < %s
; RUN: llvm-objdump -dr %t.o | FileCheck --check-prefix=OBJ64 %s

; Function Attrs: noinline nounwind optnone
Expand Down
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
; This file contains exception section testing for when debug information is present.
; The 32-bit test should not print exception auxilliary entries because they are a 64-bit only feature.
; Exception auxilliary entries are present in the 64-bit tests because 64-bit && debug enabled are the requirements.
; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -filetype=obj -o %t_32.o < %s
; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t_32.o < %s
; RUN: llvm-readobj --syms %t_32.o | FileCheck %s --check-prefix=SYMS32
; RUN: llc -mtriple=powerpc64-unknown-aix -filetype=obj -o %t_32.o < %s
; RUN: llc -mtriple=powerpc64-unknown-aix -mcpu=generic -filetype=obj -o %t_32.o < %s
; RUN: llvm-readobj --syms %t_32.o | FileCheck %s --check-prefix=SYMS64

; If any debug information is included in a module and is XCOFF64, exception auxilliary entries are emitted
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
; Testing 32-bit and 64-bit exception section entries, no exception auxilliary
; entries should be produced as no debug information is specified.
; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -filetype=obj -o %t_32.o < %s
; RUN: llc -mtriple=powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj -o %t_32.o < %s
; RUN: llvm-readobj --exception-section %t_32.o | FileCheck %s --check-prefix=EXCEPT
; RUN: llvm-readobj --section-headers %t_32.o | FileCheck %s --check-prefix=READ
; RUN: llvm-readobj --syms %t_32.o | FileCheck %s --check-prefix=SYMS

; RUN: llc -mtriple=powerpc64-unknown-aix -filetype=obj -o %t_64.o < %s
; RUN: llc -mtriple=powerpc64-unknown-aix -mcpu=generic -filetype=obj -o %t_64.o < %s
; RUN: llvm-readobj --exception-section %t_64.o | FileCheck %s --check-prefix=EXCEPT64
; RUN: llvm-readobj --section-headers %t_64.o | FileCheck %s --check-prefix=READ64
; RUN: llvm-readobj --syms %t_64.o | FileCheck %s --check-prefix=SYMS64
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec -data-sections=false < %s |\
; RUN: FileCheck %s

; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj %s -o %t.o
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -filetype=obj %s -o %t.o
; RUN: llvm-readobj --syms --auxiliary-header %t.o | FileCheck %s --check-prefixes=SYM,AUX32

; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj %s -o %t64.o
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -filetype=obj %s -o %t64.o
; RUN: llvm-readobj --syms --auxiliary-header %t64.o | FileCheck %s --check-prefixes=SYM,AUX64

@b = global i32 0, align 4
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=ASM32 %s
; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s
; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | FileCheck --check-prefix=32BIT %s

define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
; ASM32-LABEL: int_va_arg:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: llc -O2 -mtriple powerpc64-ibm-aix-xcoff -mcpu=generic -stop-after=machine-cp -verify-machineinstrs < %s | \
; RUN: FileCheck --check-prefix=64BIT %s

; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
# REQUIRES: asserts
# RUN: llc -verify-machineinstrs -simplify-mir -mtriple=powerpc64-ibm-aix-xcoff \
# RUN: -debug-only=regalloc %s -o - 2>&1 | FileCheck %s
# RUN: -mcpu=generic -debug-only=regalloc %s -o - 2>&1 | FileCheck %s

---
name: i64
Expand All @@ -19,4 +19,4 @@ body: |
# CHECK-DAG: AllocationOrder(VFRC) = [ $vf2 $vf3 $vf4 $vf5 $vf0 $vf1 $vf6 $vf7 $vf8 $vf9 $vf10 $vf11 $vf12 $vf13 $vf14 $vf15 $vf16 $vf17 $vf18 $vf19 $vf31 $vf30 $vf29 $vf28 $vf27 $vf26 $vf25 $vf24 $vf23 $vf22 $vf21 $vf20 ]
# CHECK-DAG: AllocationOrder(G8RC_and_G8RC_NOX0) = [ $x3 $x4 $x5 $x6 $x7 $x8 $x9 $x10 $x11 $x12 $x31 $x30 $x29 $x28 $x27 $x26 $x25 $x24 $x23 $x22 $x21 $x20 $x19 $x18 $x17 $x16 $x15 $x1
# CHECK-DAG: 4 ]
# CHECK-DAG: AllocationOrder(F8RC) = [ $f0 $f1 $f2 $f3 $f4 $f5 $f6 $f7 $f8 $f9 $f10 $f11 $f12 $f13 $f31 $f30 $f29 $f28 $f27 $f26 $f25 $f24 $f23 $f22 $f21 $f20 $f19 $f18 $f17 $f16 $f15 $f14 ]
# CHECK-DAG: AllocationOrder(F8RC) = [ $f0 $f1 $f2 $f3 $f4 $f5 $f6 $f7 $f8 $f9 $f10 $f11 $f12 $f13 $f31 $f30 $f29 $f28 $f27 $f26 $f25 $f24 $f23 $f22 $f21 $f20 $f19 $f18 $f17 $f16 $f15 $f14 ]
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/alloca-oversized.ll
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; RUN: llc < %s -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s
; RUN: llc < %s -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s
define void @test_oversized(ptr %dst, i32 %cond) {
; CHECK-LABEL: test_oversized:
; CHECK: # %bb.0: # %entry
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/atomic-float.ll
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-unknown-unknown \
; RUN: < %s | FileCheck --check-prefix=CHECK-64 %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-unknown \
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc-unknown-unknown \
; RUN: < %s | FileCheck --check-prefix=CHECK-32 %s

define float @test_add(ptr %ptr, float %incr) {
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/fma-assoc.ll
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -fp-contract=fast \
; RUN: -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
; RUN: -mcpu=generic -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff -fp-contract=fast \
; RUN: -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
; RUN: -mcpu=generic -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -fp-contract=fast -mattr=+vsx -disable-ppc-vsx-fma-mutation=false \
; RUN: -mcpu=pwr7 | FileCheck -check-prefix=CHECK-VSX %s
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/hoist-logic.ll
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
; RUN: llc < %s -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
; RUN: llc < %s -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s

; This is good - eliminate an op by hoisting logic.

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/huge-frame-call.ll
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-linux-gnu < %s \
; RUN: 2>&1 | FileCheck --check-prefix=CHECK-LE %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s \
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -mcpu=generic < %s \
; RUN: 2>&1 | FileCheck --check-prefix=CHECK-BE %s

%0 = type <{ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, [8 x i8] }>
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/inc-of-add.ll
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=ppc32-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC32
; RUN: llc < %s -mtriple=powerpc64-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE,AIX-PPC64
; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64LE
; RUN: llc < %s -mcpu=generic -mtriple=ppc32-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC32
; RUN: llc < %s -mcpu=generic -mtriple=powerpc64-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE
; RUN: llc < %s -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s --check-prefixes=ALL,PPC64,PPC64BE,AIX-PPC64
; RUN: llc < %s -mcpu=generic -mtriple=powerpc64le-unknown-unknown | FileCheck %s --check-prefixes=ALL,PPC64,PPC64LE

; These two forms are equivalent:
; sub %y, (xor %x, -1)
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -simplify-mir -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
# RUN: llc -simplify-mir -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff \
# RUN: -stop-after=postrapseudos %s -o - | FileCheck %s

---
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/licm-tocReg.ll
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -check-prefixes=CHECKLX %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX32 %s
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX %s
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX32 %s

; The instructions ADDIStocHA8/LDtocL are used to calculate the address of
; globals. The ones that are in bb.3.if.end could not be hoisted by Machine
Expand Down
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s

define void @cos_f64(ptr %arg) {
; CHECK-LNX-LABEL: cos_f64:
Expand Down
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
; RUN: llc -enable-ppc-gen-scalar-mass -O3 -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s

define void @cos_f64(ptr %arg) {
; CHECK-LNX-LABEL: cos_f64:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix < %s | FileCheck %s

target datalayout = "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/popcnt-zext.ll
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mattr=+popcntd < %s | FileCheck %s --check-prefix=FAST
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mattr=+slow-popcntd < %s | FileCheck %s --check-prefix=SLOW
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -mattr=+popcntd < %s | FileCheck %s --check-prefix=FAST
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff -mattr=+slow-popcntd < %s | FileCheck %s --check-prefix=SLOW
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-- -mattr=+popcntd < %s | FileCheck %s --check-prefix=FAST
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-- -mattr=+slow-popcntd < %s | FileCheck %s --check-prefix=SLOW
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff -mattr=+popcntd < %s | FileCheck %s --check-prefix=FAST
; RUN: llc -verify-machineinstrs -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff -mattr=+slow-popcntd < %s | FileCheck %s --check-prefix=SLOW

define i16 @zpop_i8_i16(i8 %x) {
; FAST-LABEL: zpop_i8_i16:
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-ppc-gen-scalar-mass -verify-machineinstrs -O3 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefix=CHECK-LNX %s
; RUN: llc -enable-ppc-gen-scalar-mass -verify-machineinstrs -O3 -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s
; RUN: llc -enable-ppc-gen-scalar-mass -verify-machineinstrs -O3 -mcpu=generic -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck --check-prefix=CHECK-AIX %s

declare float @llvm.pow.f32 (float, float);
declare double @llvm.pow.f64 (double, double);
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/pr74951.ll
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc < %s -start-before=codegenprepare -verify-machineinstrs -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s
; RUN: -mcpu=generic -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s

%struct.anon = type { i32 }

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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/store-forward-be32.ll
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mcpu=generic -verify-machineinstrs < %s | FileCheck %s

target datalayout = "E-m:a-p:32:32-i64:64-n32"
target triple = "powerpc-ibm-aix7.2.0.0"
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/store-forward-be64.ll
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mcpu=generic -verify-machineinstrs < %s | FileCheck %s

target datalayout = "E-m:a-i64:64-n32:64-S128-v256:256:256-v512:512:512"
target triple = "powerpc64-ibm-aix7.2.0.0"
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8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/toc-data-common.ll
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-64
; RUN: llc -mcpu=generic -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
; RUN: llc -mcpu=generic -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-64

; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
; RUN: llc -filetype=obj -mcpu=generic -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
; RUN: llvm-objdump -t --symbol-description %t32.o | FileCheck %s --check-prefix=OBJ32

; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
; RUN: llc -filetype=obj -mcpu=generic -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
; RUN: llvm-objdump -t --symbol-description %t64.o | FileCheck %s --check-prefix=OBJ64

@a1 = common global i32 0, align 4 #0
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8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/toc-data-const.ll
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
; RUN: llc -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK
; RUN: llc -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK
; RUN: llc -mcpu=generic -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK
; RUN: llc -mcpu=generic -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s --check-prefix CHECK

; RUN: llc -filetype=obj -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
; RUN: llc -filetype=obj -mcpu=generic -mtriple powerpc-ibm-aix-xcoff -verify-machineinstrs < %s -o %t32.o
; RUN: llvm-readobj %t32.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ32
; RUN: llvm-objdump %t32.o -dr | FileCheck %s --check-prefix=DIS32

; RUN: llc -filetype=obj -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
; RUN: llc -filetype=obj -mcpu=generic -mtriple powerpc64-ibm-aix-xcoff -verify-machineinstrs < %s -o %t64.o
; RUN: llvm-readobj %t64.o --syms --relocs | FileCheck %s -D#NFA=2 --check-prefix=OBJ64
; RUN: llvm-objdump %t64.o -dr | FileCheck %s --check-prefix=DIS64

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