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[AMDGPU][True16] fix a bug in codeGen causing e64 with wrong vgpr type to shrink #102942

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Merged
merged 4 commits into from
Aug 12, 2024
Merged

[AMDGPU][True16] fix a bug in codeGen causing e64 with wrong vgpr type to shrink #102942

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b1ee138
[AMDGPU][CodeGen] support v_mov_b16 and v_swap_b16 in true16 format
broxigarchen Aug 6, 2024
b01863a
added back the missing imm pattern for mov_b16
broxigarchen Aug 8, 2024
acfb65a
[AMDGPU][True16] fix a bug in codeGen causing e64 with wrong vgpr type
broxigarchen Aug 12, 2024
6fb5015
added a mir test for shrinking Lo128 register type
broxigarchen Aug 12, 2024
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2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1048,7 +1048,7 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
MachineFunctionProperties::Property::NoVRegs))
continue;

if (ST->useRealTrue16Insts() && AMDGPU::isTrue16Inst(MI.getOpcode()) &&
if (ST->hasTrue16BitInsts() && AMDGPU::isTrue16Inst(MI.getOpcode()) &&
!shouldShrinkTrue16(MI))
continue;

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28 changes: 28 additions & 0 deletions llvm/test/CodeGen/AMDGPU/shrink-true16.mir
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Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=si-shrink-instructions -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1100 %s

---
name: 16bit_lo128_shrink
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr127
; GFX1100-LABEL: name: 16bit_lo128_shrink
; GFX1100: liveins: $vgpr127
; GFX1100-NEXT: {{ $}}
; GFX1100-NEXT: V_CMP_EQ_U16_t16_e32 0, $vgpr127, implicit-def $vcc, implicit $exec, implicit $exec
$vcc_lo = V_CMP_EQ_U16_t16_e64 0, $vgpr127, implicit-def $vcc, implicit $exec
...

---
name: 16bit_lo128_no_shrink
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr128
; GFX1100-LABEL: name: 16bit_lo128_no_shrink
; GFX1100: liveins: $vgpr128
; GFX1100-NEXT: {{ $}}
; GFX1100-NEXT: $vcc_lo = V_CMP_EQ_U16_t16_e64 0, $vgpr128, implicit-def $vcc_lo, implicit $exec
$vcc_lo = V_CMP_EQ_U16_t16_e64 0, $vgpr128, implicit-def $vcc, implicit $exec
...
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