Skip to content

[AMDGPU][R600] Move R600CodeGenPassBuilder into R600TargetMachine(NFC). #103721

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Aug 19, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
8 changes: 0 additions & 8 deletions llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,6 @@
#include "GCNSchedStrategy.h"
#include "GCNVOPDUtils.h"
#include "R600.h"
#include "R600MachineFunctionInfo.h"
#include "R600TargetMachine.h"
#include "SIFixSGPRCopies.h"
#include "SIMachineFunctionInfo.h"
Expand Down Expand Up @@ -1214,13 +1213,6 @@ AMDGPUPassConfig::createMachineScheduler(MachineSchedContext *C) const {
return DAG;
}

MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
BumpPtrAllocator &Allocator, const Function &F,
const TargetSubtargetInfo *STI) const {
return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(
Allocator, F, static_cast<const R600Subtarget *>(STI));
}

//===----------------------------------------------------------------------===//
// GCN Legacy Pass Setup
//===----------------------------------------------------------------------===//
Expand Down
1 change: 0 additions & 1 deletion llvm/lib/Target/AMDGPU/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -121,7 +121,6 @@ add_llvm_target(AMDGPUCodeGen
GCNVOPDUtils.cpp
R600AsmPrinter.cpp
R600ClauseMergePass.cpp
R600CodeGenPassBuilder.cpp
R600ControlFlowFinalizer.cpp
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
Expand Down
33 changes: 0 additions & 33 deletions llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp

This file was deleted.

32 changes: 0 additions & 32 deletions llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h

This file was deleted.

1 change: 0 additions & 1 deletion llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,6 @@
#include "AMDGPU.h"
#include "MCTargetDesc/R600MCTargetDesc.h"
#include "R600Defines.h"
#include "R600InstrInfo.h"
#include "R600MachineFunctionInfo.h"
#include "R600Subtarget.h"
#include "R600TargetMachine.h"
Expand Down
40 changes: 37 additions & 3 deletions llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7,14 +7,16 @@
//===----------------------------------------------------------------------===//
//
/// \file
/// The AMDGPU-R600 target machine contains all of the hardware specific
/// information needed to emit code for R600 GPUs.
/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
/// builder. The target machine contains all of the hardware specific
/// information needed to emit code for R600 GPUs and the CodeGen pass builder
/// handles the pass pipeline for new pass manager.
//
//===----------------------------------------------------------------------===//

#include "R600TargetMachine.h"
#include "R600.h"
#include "R600CodeGenPassBuilder.h"
#include "R600MachineFunctionInfo.h"
#include "R600MachineScheduler.h"
#include "R600TargetTransformInfo.h"
#include "llvm/Transforms/Scalar.h"
Expand Down Expand Up @@ -152,3 +154,35 @@ Error R600TargetMachine::buildCodeGenPipeline(
R600CodeGenPassBuilder CGPB(*this, Opts, PIC);
return CGPB.buildPipeline(MPM, Out, DwoOut, FileType);
}

MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
BumpPtrAllocator &Allocator, const Function &F,
const TargetSubtargetInfo *STI) const {
return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(
Allocator, F, static_cast<const R600Subtarget *>(STI));
}

//===----------------------------------------------------------------------===//
// R600 CodeGen Pass Builder interface.
//===----------------------------------------------------------------------===//

R600CodeGenPassBuilder::R600CodeGenPassBuilder(
R600TargetMachine &TM, const CGPassBuilderOption &Opts,
PassInstrumentationCallbacks *PIC)
: CodeGenPassBuilder(TM, Opts, PIC) {
Opt.RequiresCodeGenSCCOrder = true;
}

void R600CodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
// TODO: Add passes pre instruction selection.
}

void R600CodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
CreateMCStreamer) const {
// TODO: Add AsmPrinter.
}

Error R600CodeGenPassBuilder::addInstSelector(AddMachinePass &) const {
// TODO: Add instruction selector.
return Error::success();
}
15 changes: 15 additions & 0 deletions llvm/lib/Target/AMDGPU/R600TargetMachine.h
Original file line number Diff line number Diff line change
Expand Up @@ -55,6 +55,21 @@ class R600TargetMachine final : public AMDGPUTargetMachine {
const TargetSubtargetInfo *STI) const override;
};

//===----------------------------------------------------------------------===//
// R600 CodeGen Pass Builder interface.
//===----------------------------------------------------------------------===//

class R600CodeGenPassBuilder
: public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
public:
R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption &Opts,
PassInstrumentationCallbacks *PIC);

void addPreISel(AddIRPass &addPass) const;
void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
Error addInstSelector(AddMachinePass &) const;
};

} // end namespace llvm

#endif // LLVM_LIB_TARGET_AMDGPU_R600TARGETMACHINE_H
Loading