[mlir][vector] Refactor vector-transfer-to-vector-load-store.mlir (NFC) #105509
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Overview of changes: - All memref input arguments are re-named to %mem. - All vector input arguments are re-named to %vec. - All index input arguments are re-named to %idx. - All vector input arguments are re-named to %arg. - LIT variables are update to be consistent with input arguments. - Renamed all output arguments as %res. - Remove unused argument in `transfer_write_broadcast_unit_dim`. - Unified identation of `FileCheck` commands.
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@llvm/pr-subscribers-mlir-vector @llvm/pr-subscribers-mlir Author: Pablo Antonio Martinez (pabloantoniom) ChangesFollowing @banach-space initiative of refactoring vector tests, this patch refactors
Patch is 31.49 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/105509.diff 1 Files Affected:
diff --git a/mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir b/mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
index 2b7906d4dd40cb..d376c61b611569 100644
--- a/mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
+++ b/mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
@@ -2,33 +2,33 @@
// CHECK-LABEL: func @vector_transfer_ops_0d_memref(
// CHECK-SAME: %[[MEM:.*]]: memref<f32>
-// CHECK-SAME: %[[VV:.*]]: vector<1x1x1xf32>
-func.func @vector_transfer_ops_0d_memref(%M: memref<f32>, %v: vector<1x1x1xf32>) {
+// CHECK-SAME: %[[VEC:.*]]: vector<1x1x1xf32>
+func.func @vector_transfer_ops_0d_memref(%mem: memref<f32>, %vec: vector<1x1x1xf32>) {
%f0 = arith.constant 0.0 : f32
// CHECK-NEXT: %[[s:.*]] = memref.load %[[MEM]][] : memref<f32>
// CHECK-NEXT: %[[V:.*]] = vector.broadcast %[[s]] : f32 to vector<f32>
- %0 = vector.transfer_read %M[], %f0 : memref<f32>, vector<f32>
+ %0 = vector.transfer_read %mem[], %f0 : memref<f32>, vector<f32>
// CHECK-NEXT: %[[ss:.*]] = vector.extractelement %[[V]][] : vector<f32>
// CHECK-NEXT: memref.store %[[ss]], %[[MEM]][] : memref<f32>
- vector.transfer_write %0, %M[] : vector<f32>, memref<f32>
+ vector.transfer_write %0, %mem[] : vector<f32>, memref<f32>
// CHECK-NEXT: %[[VV:.*]] = vector.extract %arg1[0, 0, 0] : f32 from vector<1x1x1xf32>
// CHECK-NEXT: memref.store %[[VV]], %[[MEM]][] : memref<f32>
- vector.store %v, %M[] : memref<f32>, vector<1x1x1xf32>
+ vector.store %vec, %mem[] : memref<f32>, vector<1x1x1xf32>
return
}
// CHECK-LABEL: func @vector_transfer_ops_0d_tensor(
-// CHECK-SAME: %[[SOURCE:.*]]: tensor<f32>
-func.func @vector_transfer_ops_0d_tensor(%M: tensor<f32>) -> vector<1xf32> {
+// CHECK-SAME: %[[ARG0:.*]]: tensor<f32>
+func.func @vector_transfer_ops_0d_tensor(%arg0: tensor<f32>) -> vector<1xf32> {
%f0 = arith.constant 0.0 : f32
-// CHECK-NEXT: %[[S:.*]] = tensor.extract %[[SOURCE]][] : tensor<f32>
+// CHECK-NEXT: %[[S:.*]] = tensor.extract %[[ARG0]][] : tensor<f32>
// CHECK-NEXT: %[[V:.*]] = vector.broadcast %[[S]] : f32 to vector<1xf32>
- %0 = vector.transfer_read %M[], %f0 {in_bounds = [true], permutation_map = affine_map<()->(0)>} :
+ %0 = vector.transfer_read %arg0[], %f0 {in_bounds = [true], permutation_map = affine_map<()->(0)>} :
tensor<f32>, vector<1xf32>
// CHECK-NEXT: return %[[V]]
@@ -37,200 +37,200 @@ func.func @vector_transfer_ops_0d_tensor(%M: tensor<f32>) -> vector<1xf32> {
// transfer_read/write are lowered to vector.load/store
// CHECK-LABEL: func @transfer_to_load(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
// CHECK-NEXT: %[[RES:.*]] = vector.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32>, vector<4xf32>
// CHECK-NEXT: vector.store %[[RES:.*]], %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32>, vector<4xf32>
// CHECK-NEXT: return %[[RES]] : vector<4xf32>
// CHECK-NEXT: }
-func.func @transfer_to_load(%mem : memref<8x8xf32>, %i : index) -> vector<4xf32> {
+func.func @transfer_to_load(%mem : memref<8x8xf32>, %idx : index) -> vector<4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true]} : memref<8x8xf32>, vector<4xf32>
- vector.transfer_write %res, %mem[%i, %i] {in_bounds = [true]} : vector<4xf32>, memref<8x8xf32>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true]} : memref<8x8xf32>, vector<4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] {in_bounds = [true]} : vector<4xf32>, memref<8x8xf32>
return %res : vector<4xf32>
}
// Masked transfer_read/write inside are NOT lowered to vector.load/store
// CHECK-LABEL: func @masked_transfer_to_load(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index,
-// CHECK-SAME: %[[MASK:.*]]: vector<4xi1>) -> memref<8x8xf32>
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index,
+// CHECK-SAME: %[[MASK:.*]]: vector<4xi1>) -> memref<8x8xf32>
// CHECK-NOT: vector.load
// CHECK-NOT: vector.store
// CHECK: %[[READ:.*]] = vector.mask %[[MASK]] { vector.transfer_read %arg0[%[[IDX]], %[[IDX]]]{{.*}} : memref<8x8xf32>, vector<4xf32> } : vector<4xi1> -> vector<4xf32>
// CHECK: vector.mask %[[MASK]] { vector.transfer_write %[[READ]], %[[MEM]][%[[IDX]], %[[IDX]]]{{.*}} : vector<4xf32>, memref<8x8xf32> } : vector<4xi1>
-func.func @masked_transfer_to_load(%mem : memref<8x8xf32>, %i : index, %mask : vector<4xi1>) -> memref<8x8xf32> {
+func.func @masked_transfer_to_load(%mem : memref<8x8xf32>, %idx : index, %mask : vector<4xi1>) -> memref<8x8xf32> {
%cf0 = arith.constant 0.0 : f32
- %read = vector.mask %mask {vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true]} : memref<8x8xf32>, vector<4xf32>} : vector<4xi1> -> vector<4xf32>
- vector.mask %mask {vector.transfer_write %read, %mem[%i, %i] {in_bounds = [true]} : vector<4xf32>, memref<8x8xf32> } : vector<4xi1>
+ %read = vector.mask %mask {vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true]} : memref<8x8xf32>, vector<4xf32>} : vector<4xi1> -> vector<4xf32>
+ vector.mask %mask {vector.transfer_write %read, %mem[%idx, %idx] {in_bounds = [true]} : vector<4xf32>, memref<8x8xf32> } : vector<4xi1>
return %mem : memref<8x8xf32>
}
// n-D results are also supported.
// CHECK-LABEL: func @transfer_2D(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<2x4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<2x4xf32> {
// CHECK-NEXT: %[[RES:.*]] = vector.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32>, vector<2x4xf32>
// CHECK-NEXT: vector.store %[[RES:.*]], %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32>, vector<2x4xf32>
// CHECK-NEXT: return %[[RES]] : vector<2x4xf32>
// CHECK-NEXT: }
-func.func @transfer_2D(%mem : memref<8x8xf32>, %i : index) -> vector<2x4xf32> {
+func.func @transfer_2D(%mem : memref<8x8xf32>, %idx : index) -> vector<2x4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true, true]} : memref<8x8xf32>, vector<2x4xf32>
- vector.transfer_write %res, %mem[%i, %i] {in_bounds = [true, true]} : vector<2x4xf32>, memref<8x8xf32>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true, true]} : memref<8x8xf32>, vector<2x4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] {in_bounds = [true, true]} : vector<2x4xf32>, memref<8x8xf32>
return %res : vector<2x4xf32>
}
// Vector element types are supported when the result has the same type.
// CHECK-LABEL: func @transfer_vector_element(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xvector<2x4xf32>>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<2x4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xvector<2x4xf32>>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<2x4xf32> {
// CHECK-NEXT: %[[RES:.*]] = vector.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xvector<2x4xf32>>, vector<2x4xf32>
// CHECK-NEXT: vector.store %[[RES:.*]], %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xvector<2x4xf32>>, vector<2x4xf32>
// CHECK-NEXT: return %[[RES]] : vector<2x4xf32>
// CHECK-NEXT: }
-func.func @transfer_vector_element(%mem : memref<8x8xvector<2x4xf32>>, %i : index) -> vector<2x4xf32> {
+func.func @transfer_vector_element(%mem : memref<8x8xvector<2x4xf32>>, %idx : index) -> vector<2x4xf32> {
%cf0 = arith.constant dense<0.0> : vector<2x4xf32>
- %res = vector.transfer_read %mem[%i, %i], %cf0 : memref<8x8xvector<2x4xf32>>, vector<2x4xf32>
- vector.transfer_write %res, %mem[%i, %i] : vector<2x4xf32>, memref<8x8xvector<2x4xf32>>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 : memref<8x8xvector<2x4xf32>>, vector<2x4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] : vector<2x4xf32>, memref<8x8xvector<2x4xf32>>
return %res : vector<2x4xf32>
}
// TODO: Vector element types are not supported yet when the result has a
// different type.
// CHECK-LABEL: func @transfer_vector_element_different_types(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xvector<2x4xf32>>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<1x2x4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xvector<2x4xf32>>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<1x2x4xf32> {
// CHECK-NEXT: %[[CF0:.*]] = arith.constant dense<0.000000e+00> : vector<2x4xf32>
// CHECK-NEXT: %[[RES:.*]] = vector.transfer_read %[[MEM]][%[[IDX]], %[[IDX]]], %[[CF0]] {in_bounds = [true]} : memref<8x8xvector<2x4xf32>>, vector<1x2x4xf32>
// CHECK-NEXT: vector.transfer_write %[[RES:.*]], %[[MEM]][%[[IDX]], %[[IDX]]] {in_bounds = [true]} : vector<1x2x4xf32>, memref<8x8xvector<2x4xf32>>
// CHECK-NEXT: return %[[RES]] : vector<1x2x4xf32>
// CHECK-NEXT: }
-func.func @transfer_vector_element_different_types(%mem : memref<8x8xvector<2x4xf32>>, %i : index) -> vector<1x2x4xf32> {
+func.func @transfer_vector_element_different_types(%mem : memref<8x8xvector<2x4xf32>>, %idx : index) -> vector<1x2x4xf32> {
%cf0 = arith.constant dense<0.0> : vector<2x4xf32>
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true]} : memref<8x8xvector<2x4xf32>>, vector<1x2x4xf32>
- vector.transfer_write %res, %mem[%i, %i] {in_bounds = [true]} : vector<1x2x4xf32>, memref<8x8xvector<2x4xf32>>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true]} : memref<8x8xvector<2x4xf32>>, vector<1x2x4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] {in_bounds = [true]} : vector<1x2x4xf32>, memref<8x8xvector<2x4xf32>>
return %res : vector<1x2x4xf32>
}
// TODO: transfer_read/write cannot be lowered because there is a dimension
// that is not guaranteed to be in-bounds.
// CHECK-LABEL: func @transfer_2D_not_inbounds(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<2x4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<2x4xf32> {
// CHECK-NEXT: %[[CF0:.*]] = arith.constant 0.000000e+00 : f32
// CHECK-NEXT: %[[RES:.*]] = vector.transfer_read %[[MEM]][%[[IDX]], %[[IDX]]], %[[CF0]] {in_bounds = [true, false]} : memref<8x8xf32>, vector<2x4xf32>
// CHECK-NEXT: vector.transfer_write %[[RES]], %[[MEM]][%[[IDX]], %[[IDX]]] {in_bounds = [false, true]} : vector<2x4xf32>, memref<8x8xf32>
// CHECK-NEXT: return %[[RES]] : vector<2x4xf32>
// CHECK-NEXT: }
-func.func @transfer_2D_not_inbounds(%mem : memref<8x8xf32>, %i : index) -> vector<2x4xf32> {
+func.func @transfer_2D_not_inbounds(%mem : memref<8x8xf32>, %idx : index) -> vector<2x4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true, false]} : memref<8x8xf32>, vector<2x4xf32>
- vector.transfer_write %res, %mem[%i, %i] {in_bounds = [false, true]} : vector<2x4xf32>, memref<8x8xf32>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true, false]} : memref<8x8xf32>, vector<2x4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] {in_bounds = [false, true]} : vector<2x4xf32>, memref<8x8xf32>
return %res : vector<2x4xf32>
}
// TODO: transfer_read/write cannot be lowered because they are not guaranteed
// to be in-bounds.
// CHECK-LABEL: func @transfer_not_inbounds(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
// CHECK-NEXT: %[[CF0:.*]] = arith.constant 0.000000e+00 : f32
// CHECK-NEXT: %[[RES:.*]] = vector.transfer_read %[[MEM]][%[[IDX]], %[[IDX]]], %[[CF0]] : memref<8x8xf32>, vector<4xf32>
// CHECK-NEXT: vector.transfer_write %[[RES]], %[[MEM]][%[[IDX]], %[[IDX]]] : vector<4xf32>, memref<8x8xf32>
// CHECK-NEXT: return %[[RES]] : vector<4xf32>
// CHECK-NEXT: }
-func.func @transfer_not_inbounds(%mem : memref<8x8xf32>, %i : index) -> vector<4xf32> {
+func.func @transfer_not_inbounds(%mem : memref<8x8xf32>, %idx : index) -> vector<4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 : memref<8x8xf32>, vector<4xf32>
- vector.transfer_write %res, %mem[%i, %i] : vector<4xf32>, memref<8x8xf32>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 : memref<8x8xf32>, vector<4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] : vector<4xf32>, memref<8x8xf32>
return %res : vector<4xf32>
}
// CHECK-LABEL: func @transfer_nondefault_layout(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32, #{{.*}}>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32, #{{.*}}>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
// CHECK-NEXT: %[[RES:.*]] = vector.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32, #{{.*}}>, vector<4xf32>
// CHECK-NEXT: vector.store %[[RES]], %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32, #{{.*}}>, vector<4xf32>
// CHECK-NEXT: return %[[RES]] : vector<4xf32>
// CHECK-NEXT: }
#layout = affine_map<(d0, d1) -> (d0*16 + d1)>
-func.func @transfer_nondefault_layout(%mem : memref<8x8xf32, #layout>, %i : index) -> vector<4xf32> {
+func.func @transfer_nondefault_layout(%mem : memref<8x8xf32, #layout>, %idx : index) -> vector<4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true]} : memref<8x8xf32, #layout>, vector<4xf32>
- vector.transfer_write %res, %mem[%i, %i] {in_bounds = [true]} : vector<4xf32>, memref<8x8xf32, #layout>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true]} : memref<8x8xf32, #layout>, vector<4xf32>
+ vector.transfer_write %res, %mem[%idx, %idx] {in_bounds = [true]} : vector<4xf32>, memref<8x8xf32, #layout>
return %res : vector<4xf32>
}
// TODO: transfer_read/write cannot be lowered to vector.load/store yet when the
// permutation map is not the minor identity map (up to broadcasting).
// CHECK-LABEL: func @transfer_perm_map(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
// CHECK-NEXT: %[[CF0:.*]] = arith.constant 0.000000e+00 : f32
// CHECK-NEXT: %[[RES:.*]] = vector.transfer_read %[[MEM]][%[[IDX]], %[[IDX]]], %[[CF0]] {in_bounds = [true], permutation_map = #{{.*}}} : memref<8x8xf32>, vector<4xf32>
// CHECK-NEXT: return %[[RES]] : vector<4xf32>
// CHECK-NEXT: }
-func.func @transfer_perm_map(%mem : memref<8x8xf32>, %i : index) -> vector<4xf32> {
+func.func @transfer_perm_map(%mem : memref<8x8xf32>, %idx : index) -> vector<4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true], permutation_map = affine_map<(d0, d1) -> (d0)>} : memref<8x8xf32>, vector<4xf32>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true], permutation_map = affine_map<(d0, d1) -> (d0)>} : memref<8x8xf32>, vector<4xf32>
return %res : vector<4xf32>
}
// Lowering of transfer_read with broadcasting is supported (note that a `load`
// is generated instead of a `vector.load`).
// CHECK-LABEL: func @transfer_broadcasting(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4xf32> {
// CHECK-NEXT: %[[LOAD:.*]] = memref.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32>
// CHECK-NEXT: %[[RES:.*]] = vector.broadcast %[[LOAD]] : f32 to vector<4xf32>
// CHECK-NEXT: return %[[RES]] : vector<4xf32>
// CHECK-NEXT: }
#broadcast_1d = affine_map<(d0, d1) -> (0)>
-func.func @transfer_broadcasting(%mem : memref<8x8xf32>, %i : index) -> vector<4xf32> {
+func.func @transfer_broadcasting(%mem : memref<8x8xf32>, %idx : index) -> vector<4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0
{in_bounds = [true], permutation_map = #broadcast_1d}
: memref<8x8xf32>, vector<4xf32>
return %res : vector<4xf32>
}
// CHECK-LABEL: func @transfer_scalar(
-// CHECK-SAME: %[[MEM:.*]]: memref<?x?xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<1xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<1xf32> {
// CHECK-NEXT: %[[LOAD:.*]] = memref.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<?x?xf32>
// CHECK-NEXT: %[[RES:.*]] = vector.broadcast %[[LOAD]] : f32 to vector<1xf32>
// CHECK-NEXT: return %[[RES]] : vector<1xf32>
// CHECK-NEXT: }
-func.func @transfer_scalar(%mem : memref<?x?xf32>, %i : index) -> vector<1xf32> {
+func.func @transfer_scalar(%mem : memref<?x?xf32>, %idx : index) -> vector<1xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0 {in_bounds = [true]} : memref<?x?xf32>, vector<1xf32>
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0 {in_bounds = [true]} : memref<?x?xf32>, vector<1xf32>
return %res : vector<1xf32>
}
// An example with two broadcasted dimensions.
// CHECK-LABEL: func @transfer_broadcasting_2D(
-// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4x4xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<4x4xf32> {
// CHECK-NEXT: %[[LOAD:.*]] = memref.load %[[MEM]][%[[IDX]], %[[IDX]]] : memref<8x8xf32>
// CHECK-NEXT: %[[RES:.*]] = vector.broadcast %[[LOAD]] : f32 to vector<4x4xf32>
// CHECK-NEXT: return %[[RES]] : vector<4x4xf32>
// CHECK-NEXT: }
#broadcast_2d = affine_map<(d0, d1) -> (0, 0)>
-func.func @transfer_broadcasting_2D(%mem : memref<8x8xf32>, %i : index) -> vector<4x4xf32> {
+func.func @transfer_broadcasting_2D(%mem : memref<8x8xf32>, %idx : index) -> vector<4x4xf32> {
%cf0 = arith.constant 0.0 : f32
- %res = vector.transfer_read %mem[%i, %i], %cf0
+ %res = vector.transfer_read %mem[%idx, %idx], %cf0
{in_bounds = [true, true], permutation_map = #broadcast_2d}
: memref<8x8xf32>, vector<4x4xf32>
return %res : vector<4x4xf32>
@@ -238,17 +238,17 @@ func.func @transfer_broadcasting_2D(%mem : memref<8x8xf32>, %i : index) -> vecto
// More complex broadcasting case (here a `vector.load` is generated).
// CHECK-LABEL: func @transfer_broadcasting_complex(
-// CHECK-SAME: %[[MEM:.*]]: memref<10x20x30x8x8xf32>,
-// CHECK-SAME: %[[IDX:.*]]: index) -> vector<3x2x4x5xf32> {
+// CHECK-SAME: %[[MEM:.*]]: memref<10x20x30x8x8xf32>,
+// CHECK-SAME: %[[IDX:.*]]: index) -> vector<3x2x4x5xf32> {
// CHECK-NEXT: %[[LOAD:.*]] = vector.load %[[MEM]][%[[IDX]], %[[IDX]], %[[IDX]], %[[IDX]], %[[IDX]]] : memref<10x20x30x8x8xf32>, vector<3x1x1x5xf32>
// CHECK-NEXT: %[[RES:.*]] = vector.broadcast %[[LOAD]] : vector<3x1x1x5xf32> to vector<3x2x4x5xf32>
// CHECK-NEXT: return %[[RES]] : vector<3x2x4x5xf32>
// CHECK-NEXT: }
#broadcast_2d_in_4d = affine_map<(d0, d1, d2, d3, d4) -> (d1, 0, 0, d4)>
-func.func @transfer_broadcasting_complex(%mem : memref<10x20x30x8x8xf32>, %i : index) -> vector<3x2x4x5xf32>...
[truncated]
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nujaa
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mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
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| func.func @transfer_write_permutations( | ||
| %arg0 : memref<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?xf32>, | ||
| %v1 : vector<7x14x8x16xf32>, %v2 : vector<8x16xf32>, %m: i1) -> tensor<?x?x?x?xf32> { | ||
| %mem_0 : memref<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?xf32>, |
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Suggested change
| %mem_0 : memref<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?xf32>, | |
| %mem : memref<?x?x?x?xf32>, %arg1 : tensor<?x?x?x?xf32>, |
I find it weird to have the tensor as arg1 among mem|vec styled args.
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With Tensors I would normally use %dest or %src. Not sure what else could be a good match for %vec and %mem that we use for Vector and MemRef, respectively.
But, IMHO, there's a more confusing thing here ... mixing Tensor and MemRef semantics in one test. My suggestion would be to split into two tests.
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I also found weird the %arg1 and %mem mix. I have renamed vector arguments as %src as suggested.
Regarding the test, I have split it into two different tests, transfer_write_permutations_tensor and transfer_write_permutations_memref. I took extra care not to miss anything but please have a careful look when reviewing as well to make sure the split is correct. Thanks 👍
|
Do you mind waiting for a few folks I added as reviewers to take a look |
MaheshRavishankar
approved these changes
Aug 21, 2024
…nsor and transfer_write_permutations_memref (suggested by banach-space)
nujaa
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mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
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mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
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…ggested by reviewers)
…r to differenciate with transfer_write_permutations_memref
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Following @banach-space initiative of refactoring vector tests, this patch refactors
vector-transfer-to-vector-load-store.mlir:transfer_write_broadcast_unit_dim.transfer_write_permutationsintotransfer_write_permutations_tensorandtransfer_write_permutations_memref.FileCheckcommands.