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[CodeGen] Use MachineInstr::{all_uses,all_defs} (NFC) #106404

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4 changes: 1 addition & 3 deletions llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -51,9 +51,7 @@ GenericConvergenceVerifier<MachineSSAContext>::findAndCheckConvergenceTokenUsed(
const MachineRegisterInfo &MRI = Context.getFunction()->getRegInfo();
const MachineInstr *TokenDef = nullptr;

for (const MachineOperand &MO : MI.operands()) {
if (!MO.isReg() || !MO.isUse())
continue;
for (const MachineOperand &MO : MI.all_uses()) {
Register OpReg = MO.getReg();
if (!OpReg.isVirtual())
continue;
Expand Down
20 changes: 7 additions & 13 deletions llvm/lib/CodeGen/MachineInstr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1041,10 +1041,9 @@ unsigned MachineInstr::getBundleSize() const {
/// Returns true if the MachineInstr has an implicit-use operand of exactly
/// the given register (not considering sub/super-registers).
bool MachineInstr::hasRegisterImplicitUseOperand(Register Reg) const {
for (const MachineOperand &MO : operands()) {
if (MO.isReg() && MO.isUse() && MO.isImplicit() && MO.getReg() == Reg)
for (const MachineOperand &MO : all_uses())
if (MO.isImplicit() && MO.getReg() == Reg)
return true;
}
return false;
}

Expand Down Expand Up @@ -1264,10 +1263,8 @@ unsigned MachineInstr::findTiedOperandIdx(unsigned OpIdx) const {
/// clearKillInfo - Clears kill flags on all operands.
///
void MachineInstr::clearKillInfo() {
for (MachineOperand &MO : operands()) {
if (MO.isReg() && MO.isUse())
MO.setIsKill(false);
}
for (MachineOperand &MO : all_uses())
MO.setIsKill(false);
}

void MachineInstr::substituteRegister(Register FromReg, Register ToReg,
Expand Down Expand Up @@ -1549,12 +1546,9 @@ bool MachineInstr::isLoadFoldBarrier() const {
/// allDefsAreDead - Return true if all the defs of this instruction are dead.
///
bool MachineInstr::allDefsAreDead() const {
for (const MachineOperand &MO : operands()) {
if (!MO.isReg() || MO.isUse())
continue;
for (const MachineOperand &MO : all_defs())
if (!MO.isDead())
return false;
}
return true;
}

Expand Down Expand Up @@ -2063,8 +2057,8 @@ void MachineInstr::clearRegisterKills(Register Reg,
const TargetRegisterInfo *RegInfo) {
if (!Reg.isPhysical())
RegInfo = nullptr;
for (MachineOperand &MO : operands()) {
if (!MO.isReg() || !MO.isUse() || !MO.isKill())
for (MachineOperand &MO : all_uses()) {
if (!MO.isKill())
continue;
Register OpReg = MO.getReg();
if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg)
Expand Down
4 changes: 1 addition & 3 deletions llvm/lib/CodeGen/RegAllocFast.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1563,9 +1563,7 @@ void RegAllocFastImpl::allocateInstruction(MachineInstr &MI) {
bool ReArrangedImplicitMOs = true;
while (ReArrangedImplicitMOs) {
ReArrangedImplicitMOs = false;
for (MachineOperand &MO : MI.operands()) {
if (!MO.isReg() || !MO.isUse())
continue;
for (MachineOperand &MO : MI.all_uses()) {
Register Reg = MO.getReg();
if (!Reg.isVirtual() || !shouldAllocateRegister(Reg))
continue;
Expand Down
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