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[mlir][Vector] Verify that masked ops implement MaskableOpInterface #108123

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Merged
merged 1 commit into from
Sep 19, 2024
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[mlir][Vector] Verify that masked ops implement MaskableOpInterface #108123

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11 changes: 8 additions & 3 deletions mlir/lib/Dialect/Vector/IR/VectorOps.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -6124,7 +6124,9 @@ LogicalResult MaskOp::verify() {
Block &block = getMaskRegion().getBlocks().front();
if (block.getOperations().empty())
return emitOpError("expects a terminator within the mask region");
if (block.getOperations().size() > 2)

unsigned numMaskRegionOps = block.getOperations().size();
if (numMaskRegionOps > 2)
return emitOpError("expects only one operation to mask");
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Seems like MaskOp::getMaskableOp() is redundantly testing for this condition unnecessarily, and the MaskOpRewritePattern is then using cast_or_null where cast could be used?

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MaskOp can be empty so that's why getMaskableOp() is checking for something similar to return nullptr. That's also the reason to use cast_or_null

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Oh right!

The code is confusing, and not the most efficient: if (block->getOperations().size() < 2) (size() on a linked list is O(N)).

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Yep, that's why I introduced numMaskRegionOps instead of calling size() again. However, a valid vector mask would always have 2 ops at most so I thought it would be acceptable. I could implement similar logic with block.getOperations().empty() + compare block.getOperations().begin() and block.getOperations().end() but I think it would make it more confusing... WDYT?

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LG


// Terminator checks.
Expand All @@ -6136,11 +6138,14 @@ LogicalResult MaskOp::verify() {
return emitOpError(
"expects number of results to match mask region yielded values");

auto maskableOp = dyn_cast<MaskableOpInterface>(block.front());
// Empty vector.mask. Nothing else to check.
if (!maskableOp)
if (numMaskRegionOps == 1)
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Shouldn't this be comparing against 0?

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There is a terminator/

return success();

auto maskableOp = dyn_cast<MaskableOpInterface>(block.front());
if (!maskableOp)
return emitOpError("expects a MaskableOpInterface within the mask region");

// Result checks.
if (maskableOp->getNumResults() != getNumResults())
return emitOpError("expects number of results to match maskable operation "
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12 changes: 7 additions & 5 deletions mlir/test/Dialect/Vector/canonicalize.mlir
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Expand Up @@ -2471,13 +2471,15 @@ func.func @empty_vector_mask_with_return(%a : vector<8xf32>, %mask : vector<8xi1
// -----

// CHECK-LABEL: func @all_true_vector_mask
// CHECK-SAME: %[[IN:.*]]: vector<3x4xf32>
func.func @all_true_vector_mask(%a : vector<3x4xf32>) -> vector<3x4xf32> {
// CHECK-SAME: %[[IN:.*]]: tensor<3x4xf32>
func.func @all_true_vector_mask(%ta : tensor<3x4xf32>) -> vector<3x4xf32> {
// CHECK-NOT: vector.mask
// CHECK: %[[ADD:.*]] = arith.addf %[[IN]], %[[IN]] : vector<3x4xf32>
// CHECK: return %[[ADD]] : vector<3x4xf32>
// CHECK: %[[LD:.*]] = vector.transfer_read %[[IN]]
// CHECK: return %[[LD]] : vector<3x4xf32>
%c0 = arith.constant 0 : index
%cf0 = arith.constant 0.0 : f32
%all_true = vector.constant_mask [3, 4] : vector<3x4xi1>
%0 = vector.mask %all_true { arith.addf %a, %a : vector<3x4xf32> } : vector<3x4xi1> -> vector<3x4xf32>
%0 = vector.mask %all_true { vector.transfer_read %ta[%c0, %c0], %cf0 : tensor<3x4xf32>, vector<3x4xf32> } : vector<3x4xi1> -> vector<3x4xf32>
return %0 : vector<3x4xf32>
}

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8 changes: 8 additions & 0 deletions mlir/test/Dialect/Vector/invalid.mlir
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Expand Up @@ -1724,6 +1724,14 @@ func.func @vector_mask_passthru_no_return(%val: vector<16xf32>, %t0: tensor<?xf3
vector.mask %m0, %pt0 { vector.transfer_write %val, %t0[%idx] : vector<16xf32>, tensor<?xf32> } : vector<16xi1> -> vector<16xf32>
return
}
// -----

func.func @vector_mask_non_maskable_op(%a : vector<3x4xf32>) -> vector<3x4xf32> {
%m0 = vector.constant_mask [2, 2] : vector<3x4xi1>
// expected-error@+1 {{'vector.mask' op expects a MaskableOpInterface within the mask region}}
%0 = vector.mask %m0 { arith.addf %a, %a : vector<3x4xf32> } : vector<3x4xi1> -> vector<3x4xf32>
return %0 : vector<3x4xf32>
}

// -----

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