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[RISCV] Add fixed length vector patterns for vfwmaccbf16.vv #108204

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Merged
merged 2 commits into from
Sep 12, 2024
Merged

[RISCV] Add fixed length vector patterns for vfwmaccbf16.vv #108204

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Precommit tests
lukel97 Sep 11, 2024
cf21ba4
[RISCV] Add fixed length vector patterns for vfwmaccbf16.vv
lukel97 Sep 11, 2024
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9 changes: 8 additions & 1 deletion llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -14454,6 +14454,13 @@ struct NodeExtensionHelper {
if (Source.getValueType() == NarrowVT)
return Source;

// vfmadd_vl -> vfwmadd_vl can take bf16 operands
if (Source.getValueType().getVectorElementType() == MVT::bf16) {
assert(Root->getSimpleValueType(0).getVectorElementType() == MVT::f32 &&
Root->getOpcode() == RISCVISD::VFMADD_VL);
return Source;
}

unsigned ExtOpc = getExtOpc(*SupportsExt);

// If we need an extension, we should be changing the type.
Expand Down Expand Up @@ -15705,7 +15712,7 @@ static SDValue performVFMADD_VLCombine(SDNode *N,
return V;

if (N->getValueType(0).getVectorElementType() == MVT::f32 &&
!Subtarget.hasVInstructionsF16())
!Subtarget.hasVInstructionsF16() && !Subtarget.hasStdExtZvfbfwma())
return SDValue();

// FIXME: Ignore strict opcodes for now.
Expand Down
13 changes: 10 additions & 3 deletions llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
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Expand Up @@ -2009,13 +2009,18 @@ multiclass VPatWidenFPMulAccVL_VV_VF<SDNode vop, string instruction_name> {
}
}

multiclass VPatWidenFPMulAccVL_VV_VF_RM<SDNode vop, string instruction_name> {
foreach vtiToWti = AllWidenableFloatVectors in {
multiclass VPatWidenFPMulAccVL_VV_VF_RM<SDNode vop, string instruction_name,
list<VTypeInfoToWide> vtiToWtis =
AllWidenableFloatVectors> {
foreach vtiToWti = vtiToWtis in {
defvar vti = vtiToWti.Vti;
defvar wti = vtiToWti.Wti;
defvar suffix = vti.LMul.MX # "_E" # vti.SEW;
let Predicates = !listconcat(GetVTypePredicates<vti>.Predicates,
GetVTypePredicates<wti>.Predicates) in {
GetVTypePredicates<wti>.Predicates,
!if(!eq(vti.Scalar, bf16),
[HasStdExtZvfbfwma],
[])) in {
def : Pat<(vop (vti.Vector vti.RegClass:$rs1),
(vti.Vector vti.RegClass:$rs2),
(wti.Vector wti.RegClass:$rd), (vti.Mask V0),
Expand Down Expand Up @@ -2451,6 +2456,8 @@ defm : VPatFPMulAccVL_VV_VF_RM<riscv_vfnmsub_vl_oneuse, "PseudoVFNMSAC">;

// 13.7. Vector Widening Floating-Point Fused Multiply-Add Instructions
defm : VPatWidenFPMulAccVL_VV_VF_RM<riscv_vfwmadd_vl, "PseudoVFWMACC">;
defm : VPatWidenFPMulAccVL_VV_VF_RM<riscv_vfwmadd_vl, "PseudoVFWMACCBF16",
AllWidenableBFloatToFloatVectors>;
defm : VPatWidenFPMulAccVL_VV_VF_RM<riscv_vfwnmadd_vl, "PseudoVFWNMACC">;
defm : VPatWidenFPMulAccVL_VV_VF_RM<riscv_vfwmsub_vl, "PseudoVFWMSAC">;
defm : VPatWidenFPMulAccVL_VV_VF_RM<riscv_vfwnmsub_vl, "PseudoVFWNMSAC">;
Expand Down
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