[RISCV] Change Zvbb and Zvkb from 'Assembly Support' to Supported.

[topperc]

We have generic isel support for Zvkb and Zvbb.

[llvmbot]

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

Changes

We have generic isel support for Zvkb and Zvbb.

---

Full diff: https://github.com/llvm/llvm-project/pull/108572.diff

1 Files Affected:

• (modified) llvm/docs/RISCVUsage.rst (+2-2)

diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index a15af9adfa945a..cf52cd15228477 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -207,7 +207,7 @@ on support follow.
      ``Zkt``           Supported
      ``Zmmul``         Supported
      ``Ztso``          Supported
-     ``Zvbb``          Assembly Support
+     ``Zvbb``          Supported
      ``Zvbc``          Assembly Support
      ``Zve32x``        (`Partially <#riscv-vlen-32-note>`__) Supported
      ``Zve32f``        (`Partially <#riscv-vlen-32-note>`__) Supported
@@ -217,7 +217,7 @@ on support follow.
      ``Zvfbfmin``      Supported
      ``Zvfbfwma``      Supported
      ``Zvfh``          Supported
-     ``Zvkb``          Assembly Support
+     ``Zvkb``          Suppported
      ``Zvkg``          Assembly Support
      ``Zvkn``          Assembly Support
      ``Zvknc``         Assembly Support

[preames]

LGTM

Last I checked we only used these in a subset of cases we could, but yes, we have some codegen support.

[4vtomat]

LGTM~