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[VirtRegMap] Store MCRegister in Virt2PhysMap. #108775

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Merged
merged 1 commit into from
Sep 15, 2024
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[VirtRegMap] Store MCRegister in Virt2PhysMap. #108775

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1 change: 0 additions & 1 deletion llvm/include/llvm/CodeGen/Register.h
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Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,6 @@ class Register {
/// Comparisons against register constants. E.g.
/// * R == AArch64::WZR
/// * R == 0
/// * R == VirtRegMap::NO_PHYS_REG
constexpr bool operator==(unsigned Other) const { return Reg == Other; }
constexpr bool operator!=(unsigned Other) const { return Reg != Other; }
constexpr bool operator==(int Other) const { return Reg == unsigned(Other); }
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20 changes: 7 additions & 13 deletions llvm/include/llvm/CodeGen/VirtRegMap.h
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Expand Up @@ -33,7 +33,6 @@ class TargetInstrInfo;
class VirtRegMap : public MachineFunctionPass {
public:
enum {
NO_PHYS_REG = 0,
NO_STACK_SLOT = (1L << 30)-1,
MAX_STACK_SLOT = (1L << 18)-1
};
Expand All @@ -49,7 +48,7 @@ class TargetInstrInfo;
/// it; even spilled virtual registers (the register mapped to a
/// spilled register is the temporary used to load it from the
/// stack).
IndexedMap<Register, VirtReg2IndexFunctor> Virt2PhysMap;
IndexedMap<MCRegister, VirtReg2IndexFunctor> Virt2PhysMap;
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If the key is a virtual register, this should still be Register

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@topperc topperc Sep 15, 2024 •
edited
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The Key type is determined by the argument_type field in VirtReg2IndexFunctor.


/// Virt2StackSlotMap - This is virtual register to stack slot
/// mapping. Each spilled virtual register has an entry in it
Expand All @@ -71,9 +70,7 @@ class TargetInstrInfo;
public:
static char ID;

VirtRegMap()
: MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
Virt2StackSlotMap(NO_STACK_SLOT) {}
VirtRegMap() : MachineFunctionPass(ID), Virt2StackSlotMap(NO_STACK_SLOT) {}
VirtRegMap(const VirtRegMap &) = delete;
VirtRegMap &operator=(const VirtRegMap &) = delete;

Expand All @@ -96,15 +93,13 @@ class TargetInstrInfo;

/// returns true if the specified virtual register is
/// mapped to a physical register
bool hasPhys(Register virtReg) const {
return getPhys(virtReg) != NO_PHYS_REG;
}
bool hasPhys(Register virtReg) const { return getPhys(virtReg).isValid(); }

/// returns the physical register mapped to the specified
/// virtual register
MCRegister getPhys(Register virtReg) const {
assert(virtReg.isVirtual());
return MCRegister::from(Virt2PhysMap[virtReg]);
return Virt2PhysMap[virtReg];
}

/// creates a mapping for the specified virtual register to
Expand All @@ -130,9 +125,9 @@ class TargetInstrInfo;
/// register mapping
void clearVirt(Register virtReg) {
assert(virtReg.isVirtual());
assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
assert(Virt2PhysMap[virtReg] &&
"attempt to clear a not assigned virtual register");
Virt2PhysMap[virtReg] = NO_PHYS_REG;
Virt2PhysMap[virtReg] = MCRegister();
}

/// clears all virtual to physical register mappings
Expand Down Expand Up @@ -178,8 +173,7 @@ class TargetInstrInfo;
return true;
// Split register can be assigned a physical register as well as a
// stack slot or remat id.
return (Virt2SplitMap[virtReg] &&
Virt2PhysMap[virtReg] != NO_PHYS_REG);
return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg]);
}

/// returns the stack slot mapped to the specified virtual
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1 change: 0 additions & 1 deletion llvm/include/llvm/MC/MCRegister.h
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Expand Up @@ -91,7 +91,6 @@ class MCRegister {
/// Comparisons against register constants. E.g.
/// * R == AArch64::WZR
/// * R == 0
/// * R == VirtRegMap::NO_PHYS_REG
constexpr bool operator==(unsigned Other) const { return Reg == Other; }
constexpr bool operator!=(unsigned Other) const { return Reg != Other; }
constexpr bool operator==(int Other) const { return Reg == unsigned(Other); }
Expand Down
10 changes: 5 additions & 5 deletions llvm/lib/CodeGen/VirtRegMap.cpp
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Expand Up @@ -84,7 +84,7 @@ void VirtRegMap::grow() {

void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) {
assert(virtReg.isVirtual() && Register::isPhysicalRegister(physReg));
assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
assert(!Virt2PhysMap[virtReg] &&
"attempt to assign physical register to already mapped "
"virtual register");
assert(!getRegInfo().isReserved(physReg) &&
Expand Down Expand Up @@ -146,7 +146,7 @@ void VirtRegMap::print(raw_ostream &OS, const Module*) const {
OS << "********** REGISTER MAP **********\n";
for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
Register Reg = Register::index2VirtReg(i);
if (Virt2PhysMap[Reg] != (unsigned)VirtRegMap::NO_PHYS_REG) {
if (Virt2PhysMap[Reg]) {
OS << '[' << printReg(Reg, TRI) << " -> "
<< printReg(Virt2PhysMap[Reg], TRI) << "] "
<< TRI->getRegClassName(MRI->getRegClass(Reg)) << "\n";
Expand Down Expand Up @@ -347,8 +347,8 @@ void VirtRegRewriter::addMBBLiveIns() {
continue;
// This is a virtual register that is live across basic blocks. Its
// assigned PhysReg must be marked as live-in to those blocks.
Register PhysReg = VRM->getPhys(VirtReg);
if (PhysReg == VirtRegMap::NO_PHYS_REG) {
MCRegister PhysReg = VRM->getPhys(VirtReg);
if (!PhysReg) {
// There may be no physical register assigned if only some register
// classes were already allocated.
assert(!ClearVirtRegs && "Unmapped virtual register");
Expand Down Expand Up @@ -551,7 +551,7 @@ void VirtRegRewriter::rewrite() {
continue;
Register VirtReg = MO.getReg();
MCRegister PhysReg = VRM->getPhys(VirtReg);
if (PhysReg == VirtRegMap::NO_PHYS_REG)
if (!PhysReg)
continue;

assert(Register(PhysReg).isPhysical());
Expand Down
5 changes: 2 additions & 3 deletions llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
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Expand Up @@ -90,9 +90,8 @@ void SILowerWWMCopies::addToWWMSpills(MachineFunction &MF, Register Reg) {
if (Reg.isPhysical())
return;

Register PhysReg = VRM->getPhys(Reg);
assert(PhysReg != VirtRegMap::NO_PHYS_REG &&
"should have allocated a physical register");
MCRegister PhysReg = VRM->getPhys(Reg);
assert(PhysReg && "should have allocated a physical register");

MFI->allocateWWMSpill(MF, PhysReg);
}
Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/Target/X86/X86TileConfig.cpp
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Expand Up @@ -128,9 +128,10 @@ bool X86TileConfig::runOnMachineFunction(MachineFunction &MF) {
continue;
if (MRI.getRegClass(VirtReg)->getID() != X86::TILERegClassID)
continue;
if (VRM.getPhys(VirtReg) == VirtRegMap::NO_PHYS_REG)
MCRegister PhysReg = VRM.getPhys(VirtReg);
if (!PhysReg)
continue;
unsigned Index = VRM.getPhys(VirtReg) - X86::TMM0;
unsigned Index = PhysReg - X86::TMM0;
if (!Phys2Virt[Index])
Phys2Virt[Index] = VirtReg;
}
Expand Down
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