Fix performance bug in buildLocationList #108886
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@llvm/pr-subscribers-debuginfo Author: Sriraman Tallam (tmsri) ChangesIn buildLocationList, with basic block sections, we iterate over This patch uses the set of sections already stored in MBBSectionRanges When detecting if loclists can be merged, the end label of an entry is For example: .Lfunc_begin0: The debug loc uses ".LBB_END0_0" for the end of the section whereas It is alright to skip this as we already check the section corresponding Full diff: https://github.com/llvm/llvm-project/pull/108886.diff 3 Files Affected:
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index db7adfd3b21e5f..36e51a7e4639ad 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1737,6 +1737,12 @@ void AsmPrinter::emitFunctionBody() {
bool IsEHa = MMI->getModule()->getModuleFlag("eh-asynch");
bool CanDoExtraAnalysis = ORE->allowExtraAnalysis(DEBUG_TYPE);
+ /* Create a slot for the entry basic block section so that the section
+ order is preserved when iterating over MBBSectionRanges. */
+ if (!MF->empty()) {
+ MBBSectionRanges[MF->front().getSectionID()] = MBBSectionRange{CurrentFnBegin, nullptr};
+ }
+
for (auto &MBB : *MF) {
// Print a label for the basic block.
emitBasicBlockStart(MBB);
@@ -2000,11 +2006,8 @@ void AsmPrinter::emitFunctionBody() {
}
for (auto &Handler : Handlers)
Handler->markFunctionEnd();
-
- assert(!MBBSectionRanges.contains(MF->front().getSectionID()) &&
- "Overwrite section range");
- MBBSectionRanges[MF->front().getSectionID()] =
- MBBSectionRange{CurrentFnBegin, CurrentFnEnd};
+ // Update the end label of the entry block's section.
+ MBBSectionRanges[MF->front().getSectionID()].EndLabel = CurrentFnEnd;
// Print out jump tables referenced by the function.
emitJumpTableInfo();
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 148b620c2b62b7..1765e9c5038523 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -33,6 +33,7 @@
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
#include "llvm/DebugInfo/DWARF/DWARFExpression.h"
+#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalVariable.h"
@@ -1772,18 +1773,14 @@ bool DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc,
// span each individual section in the range from StartLabel to EndLabel.
if (Asm->MF->hasBBSections() && StartLabel == Asm->getFunctionBegin() &&
!Instr->getParent()->sameSection(&Asm->MF->front())) {
- const MCSymbol *BeginSectionLabel = StartLabel;
-
- for (const MachineBasicBlock &MBB : *Asm->MF) {
- if (MBB.isBeginSection() && &MBB != &Asm->MF->front())
- BeginSectionLabel = MBB.getSymbol();
-
- if (MBB.sameSection(Instr->getParent())) {
- DebugLoc.emplace_back(BeginSectionLabel, EndLabel, Values);
+ for (const auto &[MBBSectionId, MBBSectionRange] :
+ Asm->MBBSectionRanges) {
+ if (Instr->getParent()->getSectionID() == MBBSectionId) {
+ DebugLoc.emplace_back(MBBSectionRange.BeginLabel, EndLabel, Values);
break;
}
- if (MBB.isEndSection())
- DebugLoc.emplace_back(BeginSectionLabel, MBB.getEndSymbol(), Values);
+ DebugLoc.emplace_back(MBBSectionRange.BeginLabel,
+ MBBSectionRange.EndLabel, Values);
}
} else {
DebugLoc.emplace_back(StartLabel, EndLabel, Values);
@@ -1824,22 +1821,27 @@ bool DwarfDebug::buildLocationList(SmallVectorImpl<DebugLocEntry> &DebugLoc,
RangeMBB = &Asm->MF->front();
else
RangeMBB = Entries.begin()->getInstr()->getParent();
+ auto RangeIt = Asm->MBBSectionRanges.find(RangeMBB->getSectionID());
+ assert(RangeIt != Asm->MBBSectionRanges.end() &&
+ "Range MBB not found in MBBSectionRanges!");
auto *CurEntry = DebugLoc.begin();
auto *NextEntry = std::next(CurEntry);
+ auto NextRangeIt = std::next(RangeIt);
while (NextEntry != DebugLoc.end()) {
- // Get the last machine basic block of this section.
- while (!RangeMBB->isEndSection())
- RangeMBB = RangeMBB->getNextNode();
- if (!RangeMBB->getNextNode())
+ if (NextRangeIt == Asm->MBBSectionRanges.end())
return false;
// CurEntry should end the current section and NextEntry should start
// the next section and the Values must match for these two ranges to be
- // merged.
- if (CurEntry->getEndSym() != RangeMBB->getEndSymbol() ||
- NextEntry->getBeginSym() != RangeMBB->getNextNode()->getSymbol() ||
+ // merged. Do not match the section label end if it is the entry block
+ // section. This is because the end label for the Debug Loc and the
+ // Function end label could be different.
+ if ((RangeIt->second.EndLabel != Asm->getFunctionEnd()
+ && CurEntry->getEndSym() != RangeIt->second.EndLabel) ||
+ NextEntry->getBeginSym() != NextRangeIt->second.BeginLabel ||
CurEntry->getValues() != NextEntry->getValues())
return false;
- RangeMBB = RangeMBB->getNextNode();
+ RangeIt = NextRangeIt;
+ NextRangeIt = std::next(RangeIt);
CurEntry = NextEntry;
NextEntry = std::next(CurEntry);
}
diff --git a/llvm/test/DebugInfo/X86/basic-block-sections_1.ll b/llvm/test/DebugInfo/X86/basic-block-sections_1.ll
index 12b60c4dc321bd..c90d715142ec8b 100644
--- a/llvm/test/DebugInfo/X86/basic-block-sections_1.ll
+++ b/llvm/test/DebugInfo/X86/basic-block-sections_1.ll
@@ -16,10 +16,10 @@
; NO-SECTIONS: DW_AT_high_pc [DW_FORM_data4] ({{.*}})
; BB-SECTIONS: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000)
; BB-SECTIONS-NEXT: DW_AT_ranges [DW_FORM_sec_offset]
+; BB-SECTIONS-NEXT: [{{.*}}) ".text.hot._Z3fooi"
; BB-SECTIONS-NEXT: [{{.*}}) ".text.hot._Z3fooi._Z3fooi.__part.1"
; BB-SECTIONS-NEXT: [{{.*}}) ".text.hot._Z3fooi._Z3fooi.__part.2"
; BB-SECTIONS-NEXT: [{{.*}}) ".text.hot._Z3fooi._Z3fooi.__part.3"
-; BB-SECTIONS-NEXT: [{{.*}}) ".text.hot._Z3fooi"
; BB-SECTIONS-ASM: _Z3fooi:
; BB-SECTIONS-ASM: .Ltmp{{[0-9]+}}:
; BB-SECTIONS-ASM-NEXT: .loc 1 2 9 prologue_end
@@ -36,14 +36,14 @@
; BB-SECTIONS-ASM: .size _Z3fooi.__part.3, .LBB_END0_{{[0-9]+}}-_Z3fooi.__part.3
; BB-SECTIONS-ASM: .Lfunc_end0:
; BB-SECTIONS-ASM: .Ldebug_ranges0:
+; BB-SECTIONS-ASM-NEXT: .quad .Lfunc_begin0
+; BB-SECTIONS-ASM-NEXT: .quad .Lfunc_end0
; BB-SECTIONS-ASM-NEXT: .quad _Z3fooi.__part.1
; BB-SECTIONS-ASM-NEXT: .quad .LBB_END0_{{[0-9]+}}
; BB-SECTIONS-ASM-NEXT: .quad _Z3fooi.__part.2
; BB-SECTIONS-ASM-NEXT: .quad .LBB_END0_{{[0-9]+}}
; BB-SECTIONS-ASM-NEXT: .quad _Z3fooi.__part.3
; BB-SECTIONS-ASM-NEXT: .quad .LBB_END0_{{[0-9]+}}
-; BB-SECTIONS-ASM-NEXT: .quad .Lfunc_begin0
-; BB-SECTIONS-ASM-NEXT: .quad .Lfunc_end0
; BB-SECTIONS-ASM-NEXT: .quad 0
; BB-SECTIONS-ASM-NEXT: .quad 0
; BB-SECTIONS-LINE-TABLE: 0x0000000000000000 1 0 1 0 0 0 is_stmt
|
| @@ -16,10 +16,10 @@ | |||
| ; NO-SECTIONS: DW_AT_high_pc [DW_FORM_data4] ({{.*}}) | |||
| ; BB-SECTIONS: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) | |||
| ; BB-SECTIONS-NEXT: DW_AT_ranges [DW_FORM_sec_offset] | |||
| ; BB-SECTIONS-NEXT: [{{.*}}) ".text.hot._Z3fooi" | |||
There was a problem hiding this comment.
Why did the order change here?
There was a problem hiding this comment.
In here,
MBBSectionRanges is used to populate DW_AT_ranges. MBBSectionRanges is a MapVector with deterministic order and I just changed that order to have the entry block's section as the first section in AsmPrinter.cpp.
You can test this locally with the following command:git-clang-format --diff 7e56a092781b094307155457f129df7deda411ae e4bfea0ba62edaa5946afb17845c037f648c446c --extensions ,cppm,inc,cpp,h,hpp,c -- clang-tools-extra/include-cleaner/test/tool-ignores-warnings.cpp clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics-c11.c clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics.c clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-c++20.cpp clang-tools-extra/test/clang-tidy/checkers/performance/unnecessary-value-param-crash.cpp clang/lib/Driver/ToolChains/UEFI.cpp clang/lib/Driver/ToolChains/UEFI.h clang/lib/Headers/avx10_2copyintrin.h clang/test/AST/ByteCode/extern.cpp clang/test/Analysis/cstring-uninitread-notes.c clang/test/Analysis/z3-unarysymexpr.c clang/test/C/C23/n3030.c clang/test/CodeGen/SystemZ/builtins-systemz-i128.c clang/test/CodeGen/X86/avx512copy-builtins.c clang/test/CodeGen/X86/uefi-data-layout.c clang/test/Driver/uefi-constructed-args.c clang/test/Modules/pr108732.cppm clang/test/OpenMP/scope_codegen.cpp clang/test/PCH/race-condition.cpp clang/test/Parser/cxx-bad-cast-diagnose-broken-template.cpp compiler-rt/lib/builtins/truncxfbf2.c compiler-rt/test/rtsan/sanity_check_pure_c.c flang/include/flang/Common/float80.h flang/include/flang/Runtime/CUDA/allocatable.h flang/include/flang/Runtime/CUDA/common.h flang/include/flang/Runtime/complex.h flang/runtime/CUDA/allocatable.cpp flang/unittests/Runtime/CUDA/Allocatable.cpp libc/src/stdio/printf_core/strerror_converter.h libcxx/test/libcxx/atomics/atomics.syn/compatible_with_stdatomic.compile.pass.cpp lldb/test/API/lang/cpp/fpnan/main.cpp lldb/test/API/tools/lldb-dap/locations/main.c lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl-callback-user-leaf.cpp lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl-callback.cpp lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl-max-depth.cpp lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl-nested.cpp lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl.cpp llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Region.h llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerLowering.cpp llvm/lib/Target/RISCV/RISCVZacasABIFix.cpp llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp llvm/lib/Transforms/Vectorize/SandboxVectorizer/Region.cpp llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp llvm/unittests/Transforms/Vectorize/SandboxVectorizer/RegionTest.cpp mlir/include/mlir/Conversion/VectorToXeGPU/VectorToXeGPU.h mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp clang-tools-extra/clang-tidy/bugprone/ForwardingReferenceOverloadCheck.cpp clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.h clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp clang-tools-extra/clang-tidy/modernize/AvoidCArraysCheck.cpp clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp clang-tools-extra/clang-tidy/modernize/MinMaxUseInitializerListCheck.cpp clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.cpp clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.h clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp clang-tools-extra/clangd/FS.cpp clang-tools-extra/clangd/Preamble.cpp clang-tools-extra/clangd/SemanticSelection.cpp clang-tools-extra/clangd/support/ThreadsafeFS.cpp clang-tools-extra/clangd/unittests/ClangdTests.cpp clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp clang-tools-extra/test/clang-tidy/checkers/bugprone/forwarding-reference-overload.cpp clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer.cpp clang-tools-extra/test/clang-tidy/checkers/misc/definitions-in-headers.hpp clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-main.cpp clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-strings.cpp clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays-ignores-three-arg-main.cpp clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-arrays.cpp clang-tools-extra/test/clang-tidy/checkers/modernize/min-max-use-initializer-list.cpp clang-tools-extra/test/clang-tidy/checkers/readability/container-contains.cpp clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.cpp clang-tools-extra/test/clang-tidy/infrastructure/nolint.cpp clang-tools-extra/test/clang-tidy/infrastructure/nolintbeginend.cpp clang-tools-extra/test/clang-tidy/infrastructure/nolintnextline.cpp clang/include/clang/AST/ASTContext.h clang/include/clang/AST/Type.h clang/include/clang/Analysis/Analyses/ExprMutationAnalyzer.h clang/include/clang/Basic/Diagnostic.h clang/include/clang/Basic/DiagnosticIDs.h clang/include/clang/Basic/FileManager.h clang/include/clang/Basic/PartialDiagnostic.h clang/include/clang/CodeGen/CGFunctionInfo.h clang/include/clang/Sema/Sema.h clang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporterVisitors.h clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h clang/lib/AST/ASTContext.cpp clang/lib/AST/ASTStructuralEquivalence.cpp clang/lib/AST/ByteCode/Interp.cpp clang/lib/AST/ByteCode/Interp.h clang/lib/AST/ByteCode/Pointer.cpp clang/lib/AST/ByteCode/Program.cpp clang/lib/AST/ExprConstant.cpp clang/lib/AST/TypePrinter.cpp clang/lib/ASTMatchers/ASTMatchFinder.cpp clang/lib/Analysis/UnsafeBufferUsage.cpp clang/lib/Basic/Diagnostic.cpp clang/lib/Basic/DiagnosticIDs.cpp clang/lib/Basic/FileManager.cpp clang/lib/Basic/LangStandards.cpp clang/lib/Basic/SourceManager.cpp clang/lib/Basic/Targets.cpp clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/OSTargets.h clang/lib/Basic/Targets/X86.h clang/lib/CodeGen/CGBuiltin.cpp clang/lib/CodeGen/CGCall.cpp clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/CodeGen/CGExprComplex.cpp clang/lib/CodeGen/CGHLSLRuntime.cpp clang/lib/CodeGen/CGStmt.cpp clang/lib/CodeGen/CGStmtOpenMP.cpp clang/lib/CodeGen/CodeGenFunction.h clang/lib/CodeGen/CodeGenModule.cpp clang/lib/CodeGen/CodeGenTypes.cpp clang/lib/CodeGen/Targets/SystemZ.cpp clang/lib/Driver/Driver.cpp clang/lib/Driver/ToolChains/AIX.cpp clang/lib/Driver/ToolChains/AMDGPU.cpp clang/lib/Driver/ToolChains/Clang.cpp clang/lib/Driver/ToolChains/CommonArgs.cpp clang/lib/Driver/ToolChains/CommonArgs.h clang/lib/Driver/ToolChains/Cuda.cpp clang/lib/Driver/ToolChains/Darwin.cpp clang/lib/Driver/ToolChains/DragonFly.cpp clang/lib/Driver/ToolChains/FreeBSD.cpp clang/lib/Driver/ToolChains/Gnu.cpp clang/lib/Driver/ToolChains/Haiku.cpp clang/lib/Driver/ToolChains/MSVC.cpp clang/lib/Driver/ToolChains/MinGW.cpp clang/lib/Driver/ToolChains/NetBSD.cpp clang/lib/Driver/ToolChains/OpenBSD.cpp clang/lib/Driver/ToolChains/PS4CPU.cpp clang/lib/Driver/ToolChains/PS4CPU.h clang/lib/Driver/ToolChains/Solaris.cpp clang/lib/ExtractAPI/DeclarationFragments.cpp clang/lib/Format/ContinuationIndenter.cpp clang/lib/Format/FormatTokenLexer.cpp clang/lib/Format/TokenAnnotator.cpp clang/lib/Frontend/ASTConsumers.cpp clang/lib/Frontend/ChainedIncludesSource.cpp clang/lib/Frontend/CompilerInstance.cpp clang/lib/Frontend/CompilerInvocation.cpp clang/lib/Frontend/Rewrite/FixItRewriter.cpp clang/lib/Frontend/Rewrite/RewriteObjC.cpp clang/lib/Frontend/TextDiagnosticPrinter.cpp clang/lib/Headers/altivec.h clang/lib/Headers/avx512bitalgintrin.h clang/lib/Headers/avx512vlbitalgintrin.h clang/lib/Headers/avx512vpopcntdqintrin.h clang/lib/Headers/avx512vpopcntdqvlintrin.h clang/lib/Headers/hlsl/hlsl_intrinsics.h clang/lib/Headers/immintrin.h clang/lib/Headers/vecintrin.h clang/lib/Headers/wasm_simd128.h clang/lib/Parse/ParseDecl.cpp clang/lib/Sema/HLSLExternalSemaSource.cpp clang/lib/Sema/Sema.cpp clang/lib/Sema/SemaAttr.cpp clang/lib/Sema/SemaBase.cpp clang/lib/Sema/SemaCast.cpp clang/lib/Sema/SemaChecking.cpp clang/lib/Sema/SemaCoroutine.cpp clang/lib/Sema/SemaDecl.cpp clang/lib/Sema/SemaExpr.cpp clang/lib/Sema/SemaHLSL.cpp clang/lib/Sema/SemaOpenMP.cpp clang/lib/Sema/SemaTemplate.cpp clang/lib/Sema/SemaTemplateDeduction.cpp clang/lib/Sema/SemaTemplateInstantiate.cpp clang/lib/Sema/SemaTemplateInstantiateDecl.cpp clang/lib/Sema/SemaType.cpp clang/lib/Serialization/ASTReader.cpp clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp clang/lib/StaticAnalyzer/Checkers/ObjCSuperDeallocChecker.cpp clang/lib/StaticAnalyzer/Checkers/PointerIterationChecker.cpp clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp clang/lib/StaticAnalyzer/Core/BugReporter.cpp clang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp clang/lib/StaticAnalyzer/Core/PlistDiagnostics.cpp clang/lib/StaticAnalyzer/Core/SVals.cpp clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp clang/test/AST/ByteCode/codegen.c clang/test/AST/ByteCode/cxx20.cpp clang/test/AST/ByteCode/shifts.cpp clang/test/AST/ByteCode/weak.cpp clang/test/AST/ast-dump-concepts.cpp clang/test/Analysis/Checkers/WebKit/ref-cntbl-crtp-base-no-virtual-dtor.cpp clang/test/Analysis/stream-error.c clang/test/Analysis/stream-note.c clang/test/Analysis/stream.c clang/test/CXX/drs/cwg29xx.cpp clang/test/CodeGen/SystemZ/builtins-systemz-vector.c clang/test/CodeGen/SystemZ/systemz-abi-vector.c clang/test/CodeGen/SystemZ/systemz-abi.c clang/test/CodeGen/SystemZ/systemz-abi.cpp clang/test/CodeGen/X86/avx512bitalg-builtins.c clang/test/CodeGen/X86/avx512vlbitalg-builtins.c clang/test/CodeGen/X86/avx512vpopcntdq-builtins.c clang/test/CodeGen/X86/avx512vpopcntdqvl-builtins.c clang/test/CodeGen/builtins-elementwise-math.c clang/test/CodeGen/builtins-wasm.c clang/test/CodeGenCoroutines/coro-await-elidable.cpp clang/test/Driver/clang_f_opts.c clang/test/Driver/openmp-offload-gpu.c clang/test/Driver/ps4-linker.c clang/test/Driver/ps4-ps5-header-search.c clang/test/Driver/ps4-sdk-root.c clang/test/Driver/ps5-linker.c clang/test/Driver/ps5-sdk-root.c clang/test/Preprocessor/aarch64-target-features.c clang/test/Preprocessor/init-aarch64.c clang/test/Sema/builtins-elementwise-math.c clang/test/Sema/complex-arithmetic.c clang/test/Sema/fixed-enum.c clang/test/SemaCXX/builtins-elementwise-math.cpp clang/test/SemaCXX/constant-expression-cxx11.cpp clang/test/SemaCXX/cxx2a-consteval.cpp clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp clang/test/SemaCXX/weak-init.cpp clang/test/SemaTemplate/GH18291.cpp clang/test/SemaTemplate/concepts-out-of-line-def.cpp clang/tools/clang-scan-deps/ClangScanDeps.cpp clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp clang/unittests/Basic/DiagnosticTest.cpp clang/unittests/Driver/DXCModeTest.cpp clang/unittests/Driver/DistroTest.cpp clang/unittests/Driver/ToolChainTest.cpp clang/unittests/Format/FormatTest.cpp clang/unittests/Format/FormatTestBase.h clang/unittests/Format/FormatTestJS.cpp clang/unittests/Format/FormatTestProto.cpp clang/unittests/Format/FormatTestTextProto.cpp clang/unittests/Format/TokenAnnotatorTest.cpp clang/unittests/Frontend/PCHPreambleTest.cpp clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp compiler-rt/lib/asan/asan_linux.cpp compiler-rt/lib/asan/asan_malloc_win_thunk.cpp compiler-rt/lib/asan/asan_rtl.cpp compiler-rt/lib/asan/asan_win_common_runtime_thunk.cpp compiler-rt/lib/asan/asan_win_common_runtime_thunk.h compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp compiler-rt/lib/builtins/fp_trunc.h compiler-rt/lib/dfsan/dfsan.cpp compiler-rt/lib/hwasan/hwasan.cpp compiler-rt/lib/interception/interception_win.cpp compiler-rt/lib/lsan/lsan.cpp compiler-rt/lib/memprof/memprof_rtl.cpp compiler-rt/lib/msan/msan.cpp compiler-rt/lib/rtsan/rtsan_context.cpp compiler-rt/lib/rtsan/rtsan_flags.cpp compiler-rt/lib/rtsan/tests/rtsan_test_main.cpp compiler-rt/lib/rtsan/tests/rtsan_test_utilities.h compiler-rt/lib/sanitizer_common/sanitizer_common_libcdep.cpp compiler-rt/lib/sanitizer_common/sanitizer_common_nolibc.cpp compiler-rt/lib/sanitizer_common/sanitizer_fuchsia.cpp compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp compiler-rt/lib/sanitizer_common/sanitizer_win.cpp compiler-rt/lib/sanitizer_common/sanitizer_win_interception.cpp compiler-rt/lib/sanitizer_common/sanitizer_win_interception.h compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.cpp compiler-rt/lib/sanitizer_common/tests/sanitizer_common_test.cpp compiler-rt/lib/sanitizer_common/tests/sanitizer_linux_test.cpp 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llvm/unittests/SandboxIR/TrackerTest.cpp llvm/unittests/Support/FormatVariadicTest.cpp llvm/unittests/Support/VirtualFileSystemTest.cpp llvm/unittests/Support/raw_ostream_test.cpp llvm/unittests/Target/AArch64/AArch64SVESchedPseudoTest.cpp llvm/unittests/TargetParser/Host.cpp llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp llvm/unittests/Transforms/Vectorize/VPlanTestBase.h llvm/unittests/tools/llvm-mca/MCATestBase.h llvm/utils/TableGen/ARMTargetDefEmitter.cpp llvm/utils/TableGen/AsmMatcherEmitter.cpp llvm/utils/TableGen/AsmWriterEmitter.cpp llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp llvm/utils/TableGen/Basic/CodeGenIntrinsics.h llvm/utils/TableGen/CallingConvEmitter.cpp llvm/utils/TableGen/CodeEmitterGen.cpp llvm/utils/TableGen/CodeGenMapTable.cpp llvm/utils/TableGen/Common/CodeGenInstruction.cpp llvm/utils/TableGen/Common/CodeGenInstruction.h llvm/utils/TableGen/Common/CodeGenSchedule.cpp llvm/utils/TableGen/Common/CodeGenSchedule.h llvm/utils/TableGen/Common/CodeGenTarget.cpp llvm/utils/TableGen/Common/CodeGenTarget.h llvm/utils/TableGen/Common/DAGISelMatcher.cpp llvm/utils/TableGen/Common/DAGISelMatcher.h llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp llvm/utils/TableGen/Common/VarLenCodeEmitterGen.h llvm/utils/TableGen/CompressInstEmitter.cpp llvm/utils/TableGen/DAGISelEmitter.cpp llvm/utils/TableGen/DAGISelMatcherGen.cpp llvm/utils/TableGen/DFAEmitter.cpp llvm/utils/TableGen/DFAPacketizerEmitter.cpp llvm/utils/TableGen/DXILEmitter.cpp llvm/utils/TableGen/DecoderEmitter.cpp llvm/utils/TableGen/DirectiveEmitter.cpp llvm/utils/TableGen/FastISelEmitter.cpp llvm/utils/TableGen/GlobalISelEmitter.cpp llvm/utils/TableGen/InstrDocsEmitter.cpp llvm/utils/TableGen/InstrInfoEmitter.cpp llvm/utils/TableGen/IntrinsicEmitter.cpp llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp llvm/utils/TableGen/PseudoLoweringEmitter.cpp llvm/utils/TableGen/RegisterBankEmitter.cpp llvm/utils/TableGen/RegisterInfoEmitter.cpp llvm/utils/TableGen/SubtargetEmitter.cpp llvm/utils/TableGen/TableGen.cpp llvm/utils/TableGen/TableGenBackends.h llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.h llvm/utils/TableGen/X86FoldTablesEmitter.cpp llvm/utils/TableGen/X86InstrMappingEmitter.cpp llvm/utils/TableGen/X86MnemonicTables.cpp llvm/utils/TableGen/X86RecognizableInstr.cpp llvm/utils/yaml-bench/YAMLBench.cpp mlir/include/mlir-c/Pass.h mlir/include/mlir/Conversion/Passes.h mlir/include/mlir/Dialect/GPU/Transforms/Passes.h mlir/include/mlir/Dialect/Vector/IR/VectorOps.h mlir/lib/Bindings/Python/Pass.cpp mlir/lib/CAPI/IR/Pass.cpp mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp mlir/lib/Debug/Observers/ActionProfiler.cpp mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp mlir/lib/Dialect/Linalg/TransformOps/LinalgMatchOps.cpp mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp mlir/lib/Dialect/PDL/IR/PDL.cpp mlir/lib/Dialect/SCF/Transforms/ForallToFor.cpp mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp mlir/lib/Dialect/SparseTensor/IR/Detail/Var.cpp mlir/lib/Dialect/Traits.cpp mlir/lib/Dialect/Transform/DebugExtension/DebugExtensionOps.cpp mlir/lib/Dialect/Transform/IR/TransformOps.cpp mlir/lib/Dialect/Vector/IR/VectorOps.cpp mlir/lib/ExecutionEngine/ExecutionEngine.cpp mlir/lib/IR/AsmPrinter.cpp mlir/lib/IR/Diagnostics.cpp mlir/lib/Interfaces/DataLayoutInterfaces.cpp mlir/lib/Interfaces/RuntimeVerifiableOpInterface.cpp mlir/lib/Pass/Pass.cpp mlir/lib/Pass/PassCrashRecovery.cpp mlir/lib/Query/Matcher/RegistryManager.cpp mlir/lib/Query/QueryParser.cpp mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp polly/lib/Analysis/ScopDetectionDiagnostic.cpp polly/lib/Analysis/ScopInfo.cpp polly/lib/CodeGen/BlockGenerators.cpp polly/lib/Exchange/JSONExporter.cpp utils/bazel/llvm-project-overlay/llvm/include/llvm/Config/config.h clang-tools-extra/clangd/support/Bracket.cpp clang-tools-extra/clangd/support/Bracket.h clang-tools-extra/clangd/support/DirectiveTree.cpp clang-tools-extra/clangd/support/DirectiveTree.h clang-tools-extra/clangd/support/Lex.cpp clang-tools-extra/clangd/support/Token.cpp clang-tools-extra/clangd/support/Token.h clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cView the diff from clang-format here.diff --git a/clang-tools-extra/clangd/SemanticSelection.cpp b/clang-tools-extra/clangd/SemanticSelection.cpp
index dd7116e619..5afac55fe0 100644
--- a/clang-tools-extra/clangd/SemanticSelection.cpp
+++ b/clang-tools-extra/clangd/SemanticSelection.cpp
@@ -11,6 +11,9 @@
#include "Protocol.h"
#include "Selection.h"
#include "SourceCode.h"
+#include "support/Bracket.h"
+#include "support/DirectiveTree.h"
+#include "support/Token.h"
#include "clang/AST/DeclBase.h"
#include "clang/Basic/SourceLocation.h"
#include "clang/Basic/SourceManager.h"
@@ -22,9 +25,6 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Error.h"
-#include "support/Bracket.h"
-#include "support/DirectiveTree.h"
-#include "support/Token.h"
#include <optional>
#include <queue>
#include <vector>
diff --git a/clang-tools-extra/clangd/support/DirectiveTree.cpp b/clang-tools-extra/clangd/support/DirectiveTree.cpp
index d25da11168..fe9fa34834 100644
--- a/clang-tools-extra/clangd/support/DirectiveTree.cpp
+++ b/clang-tools-extra/clangd/support/DirectiveTree.cpp
@@ -148,9 +148,9 @@ struct Dumper {
llvm::raw_ostream &OS;
unsigned Indent = 0;
- Dumper(llvm::raw_ostream& OS) : OS(OS) {}
- void operator()(const DirectiveTree& Tree) {
- for (const auto& Chunk : Tree.Chunks)
+ Dumper(llvm::raw_ostream &OS) : OS(OS) {}
+ void operator()(const DirectiveTree &Tree) {
+ for (const auto &Chunk : Tree.Chunks)
std::visit(*this, Chunk);
}
void operator()(const DirectiveTree::Conditional &Conditional) {
@@ -185,7 +185,7 @@ DirectiveTree DirectiveTree::parse(const TokenStream &Code) {
// Define operator<< in terms of dump() functions above.
#define OSTREAM_DUMP(Type) \
llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, const Type &T) { \
- Dumper{OS}(T); \
+ Dumper{OS}(T); \
return OS; \
}
OSTREAM_DUMP(DirectiveTree)
diff --git a/clang/include/clang/CodeGen/CGFunctionInfo.h b/clang/include/clang/CodeGen/CGFunctionInfo.h
index d19f84d198..503e638fce 100644
--- a/clang/include/clang/CodeGen/CGFunctionInfo.h
+++ b/clang/include/clang/CodeGen/CGFunctionInfo.h
@@ -135,10 +135,9 @@ private:
public:
ABIArgInfo(Kind K = Direct)
: TypeData(nullptr), PaddingType(nullptr), DirectAttr{0, 0}, TheKind(K),
- PaddingInReg(false), InAllocaSRet(false),
- InAllocaIndirect(false), IndirectByVal(false), IndirectRealign(false),
- SRetAfterThis(false), InReg(false), CanBeFlattened(false),
- SignExt(false), ZeroExt(false) {}
+ PaddingInReg(false), InAllocaSRet(false), InAllocaIndirect(false),
+ IndirectByVal(false), IndirectRealign(false), SRetAfterThis(false),
+ InReg(false), CanBeFlattened(false), SignExt(false), ZeroExt(false) {}
static ABIArgInfo getDirect(llvm::Type *T = nullptr, unsigned Offset = 0,
llvm::Type *Padding = nullptr,
diff --git a/clang/lib/Headers/vecintrin.h b/clang/lib/Headers/vecintrin.h
index c842edd675..b2059fb884 100644
--- a/clang/lib/Headers/vecintrin.h
+++ b/clang/lib/Headers/vecintrin.h
@@ -8359,9 +8359,8 @@ vec_min(__vector double __a, __vector double __b) {
static inline __ATTRS_ai __vector unsigned char
vec_add_u128(__vector unsigned char __a, __vector unsigned char __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- ((__int128)__a + (__int128)__b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))((__int128)__a + (__int128)__b);
}
/*-- vec_addc ---------------------------------------------------------------*/
@@ -8390,9 +8389,9 @@ vec_addc(__vector unsigned long long __a, __vector unsigned long long __b) {
static inline __ATTRS_ai __vector unsigned char
vec_addc_u128(__vector unsigned char __a, __vector unsigned char __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vaccq((unsigned __int128)__a, (unsigned __int128)__b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vaccq((unsigned __int128)__a,
+ (unsigned __int128)__b);
}
/*-- vec_adde_u128 ----------------------------------------------------------*/
@@ -8400,10 +8399,10 @@ vec_addc_u128(__vector unsigned char __a, __vector unsigned char __b) {
static inline __ATTRS_ai __vector unsigned char
vec_adde_u128(__vector unsigned char __a, __vector unsigned char __b,
__vector unsigned char __c) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vacq((unsigned __int128)__a, (unsigned __int128)__b,
- (unsigned __int128)__c);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vacq((unsigned __int128)__a,
+ (unsigned __int128)__b,
+ (unsigned __int128)__c);
}
/*-- vec_addec_u128 ---------------------------------------------------------*/
@@ -8411,10 +8410,10 @@ vec_adde_u128(__vector unsigned char __a, __vector unsigned char __b,
static inline __ATTRS_ai __vector unsigned char
vec_addec_u128(__vector unsigned char __a, __vector unsigned char __b,
__vector unsigned char __c) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vacccq((unsigned __int128)__a, (unsigned __int128)__b,
- (unsigned __int128)__c);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vacccq((unsigned __int128)__a,
+ (unsigned __int128)__b,
+ (unsigned __int128)__c);
}
/*-- vec_avg ----------------------------------------------------------------*/
@@ -8488,9 +8487,8 @@ vec_gfmsum(__vector unsigned int __a, __vector unsigned int __b) {
static inline __ATTRS_o_ai __vector unsigned char
vec_gfmsum_128(__vector unsigned long long __a,
__vector unsigned long long __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vgfmg(__a, __b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vgfmg(__a, __b);
}
/*-- vec_gfmsum_accum -------------------------------------------------------*/
@@ -8519,9 +8517,9 @@ static inline __ATTRS_o_ai __vector unsigned char
vec_gfmsum_accum_128(__vector unsigned long long __a,
__vector unsigned long long __b,
__vector unsigned char __c) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vgfmag(__a, __b, (unsigned __int128)__c);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vgfmag(__a, __b,
+ (unsigned __int128)__c);
}
/*-- vec_mladd --------------------------------------------------------------*/
@@ -8816,19 +8814,19 @@ vec_msum_u128(__vector unsigned long long __a, __vector unsigned long long __b,
__vector unsigned char __c, int __d)
__constant_range(__d, 0, 15);
-#define vec_msum_u128(X, Y, Z, W) \
- ((__typeof__((vec_msum_u128)((X), (Y), (Z), (W)))) \
- (unsigned __int128 __attribute__((__vector_size__(16)))) \
- __builtin_s390_vmslg((X), (Y), (unsigned __int128)(Z), (W)))
+#define vec_msum_u128(X, Y, Z, W) \
+ ((__typeof__((vec_msum_u128)((X), (Y), (Z), \
+ (W))))(unsigned __int128 \
+ __attribute__((__vector_size__(16)))) \
+ __builtin_s390_vmslg((X), (Y), (unsigned __int128)(Z), (W)))
#endif
/*-- vec_sub_u128 -----------------------------------------------------------*/
static inline __ATTRS_ai __vector unsigned char
vec_sub_u128(__vector unsigned char __a, __vector unsigned char __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- ((__int128)__a - (__int128)__b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))((__int128)__a - (__int128)__b);
}
/*-- vec_subc ---------------------------------------------------------------*/
@@ -8857,9 +8855,9 @@ vec_subc(__vector unsigned long long __a, __vector unsigned long long __b) {
static inline __ATTRS_ai __vector unsigned char
vec_subc_u128(__vector unsigned char __a, __vector unsigned char __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vscbiq((unsigned __int128)__a, (unsigned __int128)__b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vscbiq((unsigned __int128)__a,
+ (unsigned __int128)__b);
}
/*-- vec_sube_u128 ----------------------------------------------------------*/
@@ -8867,10 +8865,10 @@ vec_subc_u128(__vector unsigned char __a, __vector unsigned char __b) {
static inline __ATTRS_ai __vector unsigned char
vec_sube_u128(__vector unsigned char __a, __vector unsigned char __b,
__vector unsigned char __c) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vsbiq((unsigned __int128)__a, (unsigned __int128)__b,
- (unsigned __int128)__c);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vsbiq((unsigned __int128)__a,
+ (unsigned __int128)__b,
+ (unsigned __int128)__c);
}
/*-- vec_subec_u128 ---------------------------------------------------------*/
@@ -8878,10 +8876,10 @@ vec_sube_u128(__vector unsigned char __a, __vector unsigned char __b,
static inline __ATTRS_ai __vector unsigned char
vec_subec_u128(__vector unsigned char __a, __vector unsigned char __b,
__vector unsigned char __c) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vsbcbiq((unsigned __int128)__a, (unsigned __int128)__b,
- (unsigned __int128)__c);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vsbcbiq((unsigned __int128)__a,
+ (unsigned __int128)__b,
+ (unsigned __int128)__c);
}
/*-- vec_sum2 ---------------------------------------------------------------*/
@@ -8900,16 +8898,14 @@ vec_sum2(__vector unsigned int __a, __vector unsigned int __b) {
static inline __ATTRS_o_ai __vector unsigned char
vec_sum_u128(__vector unsigned int __a, __vector unsigned int __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vsumqf(__a, __b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vsumqf(__a, __b);
}
static inline __ATTRS_o_ai __vector unsigned char
vec_sum_u128(__vector unsigned long long __a, __vector unsigned long long __b) {
- return (__vector unsigned char)
- (unsigned __int128 __attribute__((__vector_size__(16))))
- __builtin_s390_vsumqg(__a, __b);
+ return (__vector unsigned char)(unsigned __int128 __attribute__((
+ __vector_size__(16))))__builtin_s390_vsumqg(__a, __b);
}
/*-- vec_sum4 ---------------------------------------------------------------*/
diff --git a/clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp b/clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
index 6bc2ce6686..08869fa9ce 100644
--- a/clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp
@@ -63,14 +63,12 @@ static void emitDiagnostics(const BoundNodes &Nodes,
<< RD->getNameAsString() << "', or 'OSDynamicCast' followed by "
<< "a null check if unsure",
- BR.EmitBasicReport(
- ADC->getDecl(),
- Checker,
- /*Name=*/"OSObject C-Style Cast",
- categories::SecurityError,
- Diagnostics,
- PathDiagnosticLocation::createBegin(CE, BR.getSourceManager(), ADC),
- CE->getSourceRange());
+ BR.EmitBasicReport(
+ ADC->getDecl(), Checker,
+ /*Name=*/"OSObject C-Style Cast", categories::SecurityError,
+ Diagnostics,
+ PathDiagnosticLocation::createBegin(CE, BR.getSourceManager(), ADC),
+ CE->getSourceRange());
}
static decltype(auto) hasTypePointingTo(DeclarationMatcher DeclM) {
diff --git a/compiler-rt/lib/interception/interception_win.cpp b/compiler-rt/lib/interception/interception_win.cpp
index 4a6ff6656e..75ce8eb0ad 100644
--- a/compiler-rt/lib/interception/interception_win.cpp
+++ b/compiler-rt/lib/interception/interception_win.cpp
@@ -129,8 +129,8 @@
#if SANITIZER_WINDOWS
#include "sanitizer_common/sanitizer_platform.h"
#define WIN32_LEAN_AND_MEAN
-#include <windows.h>
-#include <psapi.h>
+# include <psapi.h>
+# include <windows.h>
namespace __interception {
@@ -389,7 +389,7 @@ void TestOnlyReleaseTrampolineRegions() {
static uptr AllocateMemoryForTrampoline(uptr func_address, size_t size) {
uptr image_address = func_address;
-#if SANITIZER_WINDOWS64
+# if SANITIZER_WINDOWS64
// Allocate memory after the module (DLL or EXE file), but within 2GB
// of the start of the module so that any address within the module can be
// referenced with PC-relative operands.
@@ -400,15 +400,15 @@ static uptr AllocateMemoryForTrampoline(uptr func_address, size_t size) {
// use func_address as is.
HMODULE module;
if (::GetModuleHandleExW(GET_MODULE_HANDLE_EX_FLAG_FROM_ADDRESS |
- GET_MODULE_HANDLE_EX_FLAG_UNCHANGED_REFCOUNT,
+ GET_MODULE_HANDLE_EX_FLAG_UNCHANGED_REFCOUNT,
(LPCWSTR)func_address, &module)) {
MODULEINFO module_info;
- if (::GetModuleInformation(::GetCurrentProcess(), module,
- &module_info, sizeof(module_info))) {
+ if (::GetModuleInformation(::GetCurrentProcess(), module, &module_info,
+ sizeof(module_info))) {
image_address = (uptr)module_info.lpBaseOfDll;
}
}
-#endif
+# endif
// Find a region within 2G with enough space to allocate |size| bytes.
TrampolineMemoryRegion *region = nullptr;
@@ -593,17 +593,17 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
return 9;
case 0xF2:
switch (*(u32 *)(address + 1)) {
- case 0x2444110f: // f2 0f 11 44 24 XX movsd QWORD PTR
- // [rsp + XX], xmm0
- case 0x244c110f: // f2 0f 11 4c 24 XX movsd QWORD PTR
- // [rsp + XX], xmm1
- case 0x2454110f: // f2 0f 11 54 24 XX movsd QWORD PTR
- // [rsp + XX], xmm2
- case 0x245c110f: // f2 0f 11 5c 24 XX movsd QWORD PTR
- // [rsp + XX], xmm3
- case 0x2464110f: // f2 0f 11 64 24 XX movsd QWORD PTR
- // [rsp + XX], xmm4
- return 6;
+ case 0x2444110f: // f2 0f 11 44 24 XX movsd QWORD PTR
+ // [rsp + XX], xmm0
+ case 0x244c110f: // f2 0f 11 4c 24 XX movsd QWORD PTR
+ // [rsp + XX], xmm1
+ case 0x2454110f: // f2 0f 11 54 24 XX movsd QWORD PTR
+ // [rsp + XX], xmm2
+ case 0x245c110f: // f2 0f 11 5c 24 XX movsd QWORD PTR
+ // [rsp + XX], xmm3
+ case 0x2464110f: // f2 0f 11 64 24 XX movsd QWORD PTR
+ // [rsp + XX], xmm4
+ return 6;
}
break;
@@ -657,7 +657,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
return 7;
}
- switch (0x00FFFFFF & *(u32*)address) {
+ switch (0x00FFFFFF & *(u32 *)address) {
case 0x07c1f6: // f6 c1 07 : test cl, 0x7
case 0x10b70f: // 0f b7 10 : movzx edx, WORD PTR [rax]
case 0xc00b4d: // 4d 0b c0 : or r8, r8
@@ -737,7 +737,7 @@ static size_t GetInstructionSize(uptr address, size_t* rel_offset = nullptr) {
case 0xec8148: // 48 81 EC XX XX XX XX : sub rsp, XXXXXXXX
return 7;
- // clang-format off
+ // clang-format off
case 0x788141: // 41 81 78 XX YY YY YY YY : cmp DWORD PTR [r8+YY], XX XX XX XX
case 0x798141: // 41 81 79 XX YY YY YY YY : cmp DWORD PTR [r9+YY], XX XX XX XX
case 0x7a8141: // 41 81 7a XX YY YY YY YY : cmp DWORD PTR [r10+YY], XX XX XX XX
diff --git a/compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp b/compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
index 53c876f4f9..65938b9ba0 100644
--- a/compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
+++ b/compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
@@ -12,6 +12,9 @@
// sanitizer_common/sanitizer_common_interceptors.inc
//===----------------------------------------------------------------------===//
+#include <stdarg.h>
+
+#include "interception/interception.h"
#include "sanitizer_common/sanitizer_allocator_dlsym.h"
#include "sanitizer_common/sanitizer_atomic.h"
#include "sanitizer_common/sanitizer_errno.h"
@@ -24,16 +27,13 @@
#include "sanitizer_common/sanitizer_posix.h"
#include "sanitizer_common/sanitizer_stacktrace.h"
#include "sanitizer_common/sanitizer_tls_get_addr.h"
-#include "interception/interception.h"
+#include "tsan_fd.h"
#include "tsan_interceptors.h"
#include "tsan_interface.h"
+#include "tsan_mman.h"
#include "tsan_platform.h"
-#include "tsan_suppressions.h"
#include "tsan_rtl.h"
-#include "tsan_mman.h"
-#include "tsan_fd.h"
-
-#include <stdarg.h>
+#include "tsan_suppressions.h"
using namespace __tsan;
diff --git a/lldb/tools/debugserver/source/MacOSX/x86_64/DNBArchImplX86_64.cpp b/lldb/tools/debugserver/source/MacOSX/x86_64/DNBArchImplX86_64.cpp
index 3b3f1f02a2..106514f7cf 100644
--- a/lldb/tools/debugserver/source/MacOSX/x86_64/DNBArchImplX86_64.cpp
+++ b/lldb/tools/debugserver/source/MacOSX/x86_64/DNBArchImplX86_64.cpp
@@ -184,10 +184,10 @@ kern_return_t DNBArchImplX86_64::GetGPRState(bool force) {
#else
mach_msg_type_number_t count = e_regSetWordSizeGPRFull;
int flavor = __x86_64_THREAD_FULL_STATE;
- m_state.SetError(
- e_regSetGPR, Read,
- ::thread_get_state(m_thread->MachPortNumber(), flavor,
- (thread_state_t)&m_state.context.gpr, &count));
+ m_state.SetError(e_regSetGPR, Read,
+ ::thread_get_state(m_thread->MachPortNumber(), flavor,
+ (thread_state_t)&m_state.context.gpr,
+ &count));
if (!m_state.GetError(e_regSetGPR, Read)) {
m_state.hasFullGPRState = true;
@@ -195,10 +195,10 @@ kern_return_t DNBArchImplX86_64::GetGPRState(bool force) {
m_state.hasFullGPRState = false;
count = e_regSetWordSizeGPR;
flavor = __x86_64_THREAD_STATE;
- m_state.SetError(
- e_regSetGPR, Read,
- ::thread_get_state(m_thread->MachPortNumber(), flavor,
- (thread_state_t)&m_state.context.gpr, &count));
+ m_state.SetError(e_regSetGPR, Read,
+ ::thread_get_state(m_thread->MachPortNumber(), flavor,
+ (thread_state_t)&m_state.context.gpr,
+ &count));
}
DNBLogThreadedIf(
LOG_THREAD,
@@ -212,22 +212,20 @@ kern_return_t DNBArchImplX86_64::GetGPRState(bool force) {
"\n\t ds = %16.16llx es = %16.16llx ss = %16.16llx gsB = %16.16llx",
m_thread->MachPortNumber(), flavor,
m_state.hasFullGPRState ? "full" : "non-full",
- m_state.hasFullGPRState ? e_regSetWordSizeGPRFull
- : e_regSetWordSizeGPR,
- m_state.GetError(e_regSetGPR, Read),
- m_state.context.gpr.__rax, m_state.context.gpr.__rbx,
- m_state.context.gpr.__rcx, m_state.context.gpr.__rdx,
- m_state.context.gpr.__rdi, m_state.context.gpr.__rsi,
- m_state.context.gpr.__rbp, m_state.context.gpr.__rsp,
- m_state.context.gpr.__r8, m_state.context.gpr.__r9,
- m_state.context.gpr.__r10, m_state.context.gpr.__r11,
- m_state.context.gpr.__r12, m_state.context.gpr.__r13,
- m_state.context.gpr.__r14, m_state.context.gpr.__r15,
- m_state.context.gpr.__rip, m_state.context.gpr.__rflags,
- m_state.context.gpr.__cs, m_state.context.gpr.__fs,
- m_state.context.gpr.__gs, m_state.context.gpr.__ds,
- m_state.context.gpr.__es, m_state.context.gpr.__ss,
- m_state.context.gpr.__gsbase );
+ m_state.hasFullGPRState ? e_regSetWordSizeGPRFull : e_regSetWordSizeGPR,
+ m_state.GetError(e_regSetGPR, Read), m_state.context.gpr.__rax,
+ m_state.context.gpr.__rbx, m_state.context.gpr.__rcx,
+ m_state.context.gpr.__rdx, m_state.context.gpr.__rdi,
+ m_state.context.gpr.__rsi, m_state.context.gpr.__rbp,
+ m_state.context.gpr.__rsp, m_state.context.gpr.__r8,
+ m_state.context.gpr.__r9, m_state.context.gpr.__r10,
+ m_state.context.gpr.__r11, m_state.context.gpr.__r12,
+ m_state.context.gpr.__r13, m_state.context.gpr.__r14,
+ m_state.context.gpr.__r15, m_state.context.gpr.__rip,
+ m_state.context.gpr.__rflags, m_state.context.gpr.__cs,
+ m_state.context.gpr.__fs, m_state.context.gpr.__gs,
+ m_state.context.gpr.__ds, m_state.context.gpr.__es,
+ m_state.context.gpr.__ss, m_state.context.gpr.__gsbase);
// DNBLogThreadedIf (LOG_THREAD, "thread_get_state(0x%4.4x, %u, &gpr, %u)
// => 0x%8.8x"
diff --git a/llvm/include/llvm/CodeGen/VirtRegMap.h b/llvm/include/llvm/CodeGen/VirtRegMap.h
index 52221762fe..28a30e7150 100644
--- a/llvm/include/llvm/CodeGen/VirtRegMap.h
+++ b/llvm/include/llvm/CodeGen/VirtRegMap.h
@@ -30,165 +30,165 @@ class MachineRegisterInfo;
class raw_ostream;
class TargetInstrInfo;
- class VirtRegMap : public MachineFunctionPass {
- MachineRegisterInfo *MRI = nullptr;
- const TargetInstrInfo *TII = nullptr;
- const TargetRegisterInfo *TRI = nullptr;
- MachineFunction *MF = nullptr;
-
- /// Virt2PhysMap - This is a virtual to physical register
- /// mapping. Each virtual register is required to have an entry in
- /// it; even spilled virtual registers (the register mapped to a
- /// spilled register is the temporary used to load it from the
- /// stack).
- IndexedMap<MCRegister, VirtReg2IndexFunctor> Virt2PhysMap;
-
- /// Virt2StackSlotMap - This is virtual register to stack slot
- /// mapping. Each spilled virtual register has an entry in it
- /// which corresponds to the stack slot this register is spilled
- /// at.
- IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
-
- /// Virt2SplitMap - This is virtual register to splitted virtual register
- /// mapping.
- IndexedMap<Register, VirtReg2IndexFunctor> Virt2SplitMap;
-
- /// Virt2ShapeMap - For X86 AMX register whose register is bound shape
- /// information.
- DenseMap<Register, ShapeT> Virt2ShapeMap;
-
- /// createSpillSlot - Allocate a spill slot for RC from MFI.
- unsigned createSpillSlot(const TargetRegisterClass *RC);
-
- public:
- static char ID;
-
- static constexpr int NO_STACK_SLOT = INT_MAX;
-
- VirtRegMap() : MachineFunctionPass(ID), Virt2StackSlotMap(NO_STACK_SLOT) {}
- VirtRegMap(const VirtRegMap &) = delete;
- VirtRegMap &operator=(const VirtRegMap &) = delete;
-
- bool runOnMachineFunction(MachineFunction &MF) override;
-
- void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.setPreservesAll();
- MachineFunctionPass::getAnalysisUsage(AU);
- }
+class VirtRegMap : public MachineFunctionPass {
+ MachineRegisterInfo *MRI = nullptr;
+ const TargetInstrInfo *TII = nullptr;
+ const TargetRegisterInfo *TRI = nullptr;
+ MachineFunction *MF = nullptr;
+
+ /// Virt2PhysMap - This is a virtual to physical register
+ /// mapping. Each virtual register is required to have an entry in
+ /// it; even spilled virtual registers (the register mapped to a
+ /// spilled register is the temporary used to load it from the
+ /// stack).
+ IndexedMap<MCRegister, VirtReg2IndexFunctor> Virt2PhysMap;
+
+ /// Virt2StackSlotMap - This is virtual register to stack slot
+ /// mapping. Each spilled virtual register has an entry in it
+ /// which corresponds to the stack slot this register is spilled
+ /// at.
+ IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
+
+ /// Virt2SplitMap - This is virtual register to splitted virtual register
+ /// mapping.
+ IndexedMap<Register, VirtReg2IndexFunctor> Virt2SplitMap;
+
+ /// Virt2ShapeMap - For X86 AMX register whose register is bound shape
+ /// information.
+ DenseMap<Register, ShapeT> Virt2ShapeMap;
+
+ /// createSpillSlot - Allocate a spill slot for RC from MFI.
+ unsigned createSpillSlot(const TargetRegisterClass *RC);
+
+public:
+ static char ID;
+
+ static constexpr int NO_STACK_SLOT = INT_MAX;
+
+ VirtRegMap() : MachineFunctionPass(ID), Virt2StackSlotMap(NO_STACK_SLOT) {}
+ VirtRegMap(const VirtRegMap &) = delete;
+ VirtRegMap &operator=(const VirtRegMap &) = delete;
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
- MachineFunction &getMachineFunction() const {
- assert(MF && "getMachineFunction called before runOnMachineFunction");
- return *MF;
- }
+ MachineFunction &getMachineFunction() const {
+ assert(MF && "getMachineFunction called before runOnMachineFunction");
+ return *MF;
+ }
- MachineRegisterInfo &getRegInfo() const { return *MRI; }
- const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
+ MachineRegisterInfo &getRegInfo() const { return *MRI; }
+ const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
- void grow();
+ void grow();
- /// returns true if the specified virtual register is
- /// mapped to a physical register
- bool hasPhys(Register virtReg) const { return getPhys(virtReg).isValid(); }
+ /// returns true if the specified virtual register is
+ /// mapped to a physical register
+ bool hasPhys(Register virtReg) const { return getPhys(virtReg).isValid(); }
- /// returns the physical register mapped to the specified
- /// virtual register
- MCRegister getPhys(Register virtReg) const {
- assert(virtReg.isVirtual());
- return Virt2PhysMap[virtReg];
- }
+ /// returns the physical register mapped to the specified
+ /// virtual register
+ MCRegister getPhys(Register virtReg) const {
+ assert(virtReg.isVirtual());
+ return Virt2PhysMap[virtReg];
+ }
- /// creates a mapping for the specified virtual register to
- /// the specified physical register
- void assignVirt2Phys(Register virtReg, MCPhysReg physReg);
+ /// creates a mapping for the specified virtual register to
+ /// the specified physical register
+ void assignVirt2Phys(Register virtReg, MCPhysReg physReg);
- bool isShapeMapEmpty() const { return Virt2ShapeMap.empty(); }
+ bool isShapeMapEmpty() const { return Virt2ShapeMap.empty(); }
- bool hasShape(Register virtReg) const {
- return Virt2ShapeMap.contains(virtReg);
- }
+ bool hasShape(Register virtReg) const {
+ return Virt2ShapeMap.contains(virtReg);
+ }
- ShapeT getShape(Register virtReg) const {
- assert(virtReg.isVirtual());
- return Virt2ShapeMap.lookup(virtReg);
- }
+ ShapeT getShape(Register virtReg) const {
+ assert(virtReg.isVirtual());
+ return Virt2ShapeMap.lookup(virtReg);
+ }
- void assignVirt2Shape(Register virtReg, ShapeT shape) {
- Virt2ShapeMap[virtReg] = shape;
- }
+ void assignVirt2Shape(Register virtReg, ShapeT shape) {
+ Virt2ShapeMap[virtReg] = shape;
+ }
- /// clears the specified virtual register's, physical
- /// register mapping
- void clearVirt(Register virtReg) {
- assert(virtReg.isVirtual());
- assert(Virt2PhysMap[virtReg] &&
- "attempt to clear a not assigned virtual register");
- Virt2PhysMap[virtReg] = MCRegister();
- }
+ /// clears the specified virtual register's, physical
+ /// register mapping
+ void clearVirt(Register virtReg) {
+ assert(virtReg.isVirtual());
+ assert(Virt2PhysMap[virtReg] &&
+ "attempt to clear a not assigned virtual register");
+ Virt2PhysMap[virtReg] = MCRegister();
+ }
- /// clears all virtual to physical register mappings
- void clearAllVirt() {
- Virt2PhysMap.clear();
- grow();
- }
+ /// clears all virtual to physical register mappings
+ void clearAllVirt() {
+ Virt2PhysMap.clear();
+ grow();
+ }
- /// returns true if VirtReg is assigned to its preferred physreg.
- bool hasPreferredPhys(Register VirtReg) const;
+ /// returns true if VirtReg is assigned to its preferred physreg.
+ bool hasPreferredPhys(Register VirtReg) const;
- /// returns true if VirtReg has a known preferred register.
- /// This returns false if VirtReg has a preference that is a virtual
- /// register that hasn't been assigned yet.
- bool hasKnownPreference(Register VirtReg) const;
+ /// returns true if VirtReg has a known preferred register.
+ /// This returns false if VirtReg has a preference that is a virtual
+ /// register that hasn't been assigned yet.
+ bool hasKnownPreference(Register VirtReg) const;
- /// records virtReg is a split live interval from SReg.
- void setIsSplitFromReg(Register virtReg, Register SReg) {
- Virt2SplitMap[virtReg] = SReg;
- if (hasShape(SReg)) {
- Virt2ShapeMap[virtReg] = getShape(SReg);
- }
+ /// records virtReg is a split live interval from SReg.
+ void setIsSplitFromReg(Register virtReg, Register SReg) {
+ Virt2SplitMap[virtReg] = SReg;
+ if (hasShape(SReg)) {
+ Virt2ShapeMap[virtReg] = getShape(SReg);
}
+ }
- /// returns the live interval virtReg is split from.
- Register getPreSplitReg(Register virtReg) const {
- return Virt2SplitMap[virtReg];
- }
+ /// returns the live interval virtReg is split from.
+ Register getPreSplitReg(Register virtReg) const {
+ return Virt2SplitMap[virtReg];
+ }
- /// getOriginal - Return the original virtual register that VirtReg descends
- /// from through splitting.
- /// A register that was not created by splitting is its own original.
- /// This operation is idempotent.
- Register getOriginal(Register VirtReg) const {
- Register Orig = getPreSplitReg(VirtReg);
- return Orig ? Orig : VirtReg;
- }
+ /// getOriginal - Return the original virtual register that VirtReg descends
+ /// from through splitting.
+ /// A register that was not created by splitting is its own original.
+ /// This operation is idempotent.
+ Register getOriginal(Register VirtReg) const {
+ Register Orig = getPreSplitReg(VirtReg);
+ return Orig ? Orig : VirtReg;
+ }
- /// returns true if the specified virtual register is not
- /// mapped to a stack slot or rematerialized.
- bool isAssignedReg(Register virtReg) const {
- if (getStackSlot(virtReg) == NO_STACK_SLOT)
- return true;
- // Split register can be assigned a physical register as well as a
- // stack slot or remat id.
- return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg]);
- }
+ /// returns true if the specified virtual register is not
+ /// mapped to a stack slot or rematerialized.
+ bool isAssignedReg(Register virtReg) const {
+ if (getStackSlot(virtReg) == NO_STACK_SLOT)
+ return true;
+ // Split register can be assigned a physical register as well as a
+ // stack slot or remat id.
+ return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg]);
+ }
- /// returns the stack slot mapped to the specified virtual
- /// register
- int getStackSlot(Register virtReg) const {
- assert(virtReg.isVirtual());
- return Virt2StackSlotMap[virtReg];
- }
+ /// returns the stack slot mapped to the specified virtual
+ /// register
+ int getStackSlot(Register virtReg) const {
+ assert(virtReg.isVirtual());
+ return Virt2StackSlotMap[virtReg];
+ }
- /// create a mapping for the specifed virtual register to
- /// the next available stack slot
- int assignVirt2StackSlot(Register virtReg);
+ /// create a mapping for the specifed virtual register to
+ /// the next available stack slot
+ int assignVirt2StackSlot(Register virtReg);
- /// create a mapping for the specified virtual register to
- /// the specified stack slot
- void assignVirt2StackSlot(Register virtReg, int SS);
+ /// create a mapping for the specified virtual register to
+ /// the specified stack slot
+ void assignVirt2StackSlot(Register virtReg, int SS);
- void print(raw_ostream &OS, const Module* M = nullptr) const override;
- void dump() const;
- };
+ void print(raw_ostream &OS, const Module *M = nullptr) const override;
+ void dump() const;
+};
inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
VRM.print(OS);
diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp
index 957ac88349..12b245287b 100644
--- a/llvm/lib/Analysis/Loads.cpp
+++ b/llvm/lib/Analysis/Loads.cpp
@@ -95,14 +95,13 @@ static bool isDereferenceableAndAlignedPointer(
auto IsKnownDeref = [&]() {
bool CheckForNonNull, CheckForFreed;
- APInt KnownDerefBytes(Size.getBitWidth(),
- V->getPointerDereferenceableBytes(DL, CheckForNonNull,
- CheckForFreed));
+ APInt KnownDerefBytes(
+ Size.getBitWidth(),
+ V->getPointerDereferenceableBytes(DL, CheckForNonNull, CheckForFreed));
if (!KnownDerefBytes.getBoolValue() || !KnownDerefBytes.uge(Size) ||
CheckForFreed)
return false;
- if (CheckForNonNull &&
- !isKnownNonZero(V, SimplifyQuery(DL, DT, AC, CtxI)))
+ if (CheckForNonNull && !isKnownNonZero(V, SimplifyQuery(DL, DT, AC, CtxI)))
return false;
return true;
};
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index 5d433204d5..d30cf589ef 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -1806,7 +1806,8 @@ SDValue VectorLegalizer::ExpandFNEG(SDNode *Node) {
// FIXME: The FSUB check is here to force unrolling v1f64 vectors on AArch64.
if (!TLI.isOperationLegalOrCustom(ISD::XOR, IntVT) ||
- !(TLI.isOperationLegalOrCustomOrPromote(ISD::FSUB, VT) || VT.isScalableVector()))
+ !(TLI.isOperationLegalOrCustomOrPromote(ISD::FSUB, VT) ||
+ VT.isScalableVector()))
return SDValue();
SDLoc DL(Node);
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 3dabc5ef54..5c210cc9cd 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -9835,9 +9835,8 @@ bool SystemZTargetLowering::isFullyInternal(const Function *Fn) const {
}
// Verify that narrow integer arguments are extended as required by the ABI.
-void SystemZTargetLowering::
-verifyNarrowIntegerArgs(const SmallVectorImpl<ISD::OutputArg> &Outs,
- bool IsInternal) const {
+void SystemZTargetLowering::verifyNarrowIntegerArgs(
+ const SmallVectorImpl<ISD::OutputArg> &Outs, bool IsInternal) const {
if (IsInternal || !Subtarget.isTargetELF())
return;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
index a4b7251525..d1fd866bf5 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
@@ -1249,18 +1249,18 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
case X86::VBROADCASTF128rm:
case X86::VBROADCASTI128rm:
- CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z256, rm)
- CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z256, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z256, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z256, rm)
DecodeSubVectorBroadcast(4, 2, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
- CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z, rm)
- CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTF64X2, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTI64X2, Z, rm)
DecodeSubVectorBroadcast(8, 2, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
- CASE_AVX512_INS_COMMON(BROADCASTF64X4, Z, rm)
- CASE_AVX512_INS_COMMON(BROADCASTI64X4, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTF64X4, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTI64X4, Z, rm)
DecodeSubVectorBroadcast(8, 4, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
@@ -1269,13 +1269,13 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
DecodeSubVectorBroadcast(8, 4, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
- CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z, rm)
- CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTF32X4, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTI32X4, Z, rm)
DecodeSubVectorBroadcast(16, 4, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
- CASE_AVX512_INS_COMMON(BROADCASTF32X8, Z, rm)
- CASE_AVX512_INS_COMMON(BROADCASTI32X8, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTF32X8, Z, rm)
+ CASE_AVX512_INS_COMMON(BROADCASTI32X8, Z, rm)
DecodeSubVectorBroadcast(16, 8, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 55c237e2df..0f2ff9d1cd 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -2054,20 +2054,20 @@ static void addConstantComments(const MachineInstr *MI,
MASK_AVX512_CASE(X86::VBROADCASTF64X2Z256rm)
MASK_AVX512_CASE(X86::VBROADCASTI32X4Z256rm)
MASK_AVX512_CASE(X86::VBROADCASTI64X2Z256rm)
- printBroadcast(MI, OutStreamer, 2, 128);
- break;
+ printBroadcast(MI, OutStreamer, 2, 128);
+ break;
MASK_AVX512_CASE(X86::VBROADCASTF32X4Zrm)
MASK_AVX512_CASE(X86::VBROADCASTF64X2Zrm)
MASK_AVX512_CASE(X86::VBROADCASTI32X4Zrm)
MASK_AVX512_CASE(X86::VBROADCASTI64X2Zrm)
- printBroadcast(MI, OutStreamer, 4, 128);
- break;
+ printBroadcast(MI, OutStreamer, 4, 128);
+ break;
MASK_AVX512_CASE(X86::VBROADCASTF32X8Zrm)
MASK_AVX512_CASE(X86::VBROADCASTF64X4Zrm)
MASK_AVX512_CASE(X86::VBROADCASTI32X8Zrm)
MASK_AVX512_CASE(X86::VBROADCASTI64X4Zrm)
- printBroadcast(MI, OutStreamer, 2, 256);
- break;
+ printBroadcast(MI, OutStreamer, 2, 256);
+ break;
// For broadcast loads from a constant pool to a vector register, repeatedly
// print the constant loaded.
|
jmorse
reviewed
Sep 18, 2024
There was a problem hiding this comment.
Performance patches most welcome; I can see how stepping through the section-ranges when examining the start-label is going to be faster, and why that necessitates MBBSectionRanges being in the right order.
The change to the end of buildLocationList is less clear however. I believe that section of code is determining whether we should issue a "single-location" location, i.e. saying:
DW_AT_location DW_OP_constu 1234
instead of issuing a location list. I would have imagined that this is unrelated to basic-block-sections: if the variable has the same value across its whole scope, surely it doesn't matter which sections the covered instructions are in, and we don't need to issue a location list anyway if that's true.
Specifically, adding the not-function-end qualifier to this clause:
(RangeIt->second.EndLabel != Asm->getFunctionEnd() &&
CurEntry->getEndSym() != RangeIt->second.EndLabel)
might disable the detection of whether a variable-location-range over the end block is terminated before the end of the block, and allow the issuing of a "single-location" location. Consider this:
entry:
DBG_VALUE 1234
$rax = something
....
end_bb:
$rax = something
DBG_VALUE $noreg
$rax = something_else
ret
Here the variable location covers the whole function except the last instruction -- perhaps there's a late variable assignment that's been optimised away. In this situation we want to issue a location list that covers the whole function except the final instruction, but I believe with this patch (and that extra clause of RangeIt->second.EndLabel != Asm->getFunctionEnd()) we'll instead emit a single-location location. That can then lead to a stale/out-of-date variable value being presented to the user on the final instruction of the program.
I might have missed something subtle about the labels though (I'm not familiar with basic-block sections, and it seems fiddly).
I did think of the case where the .loc only spans some subset of the entry section and there is another variable assignment that will cover the remaining subset of the entry section. I think you are referring to this one, I am not sure what you mean by "optimised away" though, like there is an assignment but the .loc is missing? In this case, the values won't match between the first loc and the subsequent loc and the coalescing will not happen. I will add an explicit test to cover this. I understand your concern around that check, but I am unable to find a counter example that could violate it. Let me refresh the patch with the new test case. Thanks for taking a look! |
* fix write order of "Load vector reg, immed post-index" * fix a typo
…ons (llvm#108693) When rebuilding immediate invocations inside `RemoveNestedImmediateInvocation()`, we employed a `TreeTransform` to exercise the traversal. The transformation has a side effect that, for template specialization types, their default template arguments are substituted separately, and if any lambdas are present, they will be transformed into distinct types than those used to instantiate the templates right before the `consteval` handling. This resulted in `B::func()` getting redundantly instantiated for the case in question. Since we're also in an immediate evaluation context, the body of `foo()` would also get instantiated, so we end up with a spurious friend redefinition error. Like what we have done in `ComplexRemove`, this patch also avoids the lambda's transformation in TemplateInstantiator if we know we're rebuilding immediate calls. In addition, this patch also consolidates the default argument substitution logic in `CheckTemplateArgumentList()`. Fixes llvm#107175
This adds zvfhmin test coverage for fceil, ffloor, fnearbyint, frint, fround and froundeven and splits them at nxv32f16 to avoid crashing, similarly to what we do for other nodes that we promote. This also sets ftrunc to promote which was previously missing. We already promote the VP version of it, vp_froundtozero. Marking it as promoted affects some of the cost model tests since they're no longer expanded.
…m#108237) This also generalizes the Undef handling and adds Poison handling.
…vm#107912) fmod will be folded to frem in clang under -fno-math-errno and can be constant folded in llvm if the operands are known. It can be relatively common to have fp code that handles special values before doing some calculation: ``` if (isnan(f)) return handlenan; if (isinf(f)) return handleinf; .. fmod(f, 2.0) ``` This patch enables the folding of fmod to frem in instcombine if the first parameter is not inf and the second is not zero. Other combinations do not set errno. The same transform is performed for fmod with the nnan flag, which implies the input is known to not be inf/zero.
…8888) This patch makes the `VBROADCAST***X**` subvector broadcast instructions consistent - the `***X**` section represents the original subvector type/size, but we were not correctly using the AVX512 Z/Z256/Z128 suffix to consistently represent the destination width (or we missed it entirely).
Patch by Alejandro Alvarez Ayllon! CPP-5380
For f16 with zvfhmin, we promote most ops and VP ops to f32. This does the same for bf16 with zvfbfmin, so the two fp types should now be in sync. There are a few places in the custom lowering where we need to check for a LMUL 8 f16/bf16 vector that can't be promoted and must be split, this extracts that out into isPromotedOpNeedingSplit. In a follow up NFC we can deduplicate the code that sets up the promotions.
…les (llvm#109009) The missing scope information led to a crash in OpenMP semantic checks run before printing the error that was already discovered in the code. The following block has to be skipped for this invalid code so that we don't emit a second spurious error. Fixes llvm#82913
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965 Chapter 8 AVX10 COMPARE SCALAR FP WITH ENHANCED EFLAGS INSTRUCTIONS --------- Co-authored-by: mattarde <[email protected]>
After llvm#108937 fp16 w/o zvfh and bf16 are now in sync and should have the same lowering.
…9112) Patch by Arseniy Zaostrovnykh!
Simplify `lowerBUILD_VECTOR` by commoning up the way the vectors are split. Also reorder the checks to avoid a long condition inside `if`.
…ctor(permv3(src0,widensubvector(extractsubvector(mask,c)),src1),0) iff c != 0 For cross-lane shuffles, extract the mask operand (uppper) subvector directly, and make use of the free implicit extraction of the lowest subvector of the result.
tmsri
requested review from
banach-space,
dcaballe,
kuhar,
hanhanW,
rengolin,
JDevlieghere,
Endilll,
nikic and
a team
as code owners
You can test this locally with the following command:darker --check --diff -r 7e56a092781b094307155457f129df7deda411ae...e4bfea0ba62edaa5946afb17845c037f648c446c lldb/test/API/lang/cpp/fpnan/TestFPNaN.py lldb/test/API/tools/lldb-dap/locations/TestDAP_locations.py clang/tools/include-mapping/gen_std.py clang/utils/check_cfc/obj_diff.py clang/utils/module-deps-to-rsp.py compiler-rt/test/rtsan/lit.cfg.py libcxx/test/libcxx/feature_test_macro/ftm_metadata.sh.py libcxx/test/libcxx/feature_test_macro/implemented_ftms.sh.py libcxx/test/libcxx/feature_test_macro/standard_ftms.sh.py libcxx/test/libcxx/feature_test_macro/version_header.sh.py libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py libcxx/utils/generate_feature_test_macro_components.py libcxx/utils/synchronize_csv_status_files.py lldb/examples/python/cmdtemplate.py lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py lldb/test/API/tools/lldb-dap/memory/TestDAP_memory.py llvm/utils/indirect_calls.py mlir/test/python/execution_engine.py mlir/test/python/pass_manager.pyView the diff from darker here.--- libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py 2024-09-19 21:32:29.000000 +0000
+++ libcxx/test/libcxx/feature_test_macro/version_header_implementation.sh.py 2024-09-19 21:37:51.440880 +0000
@@ -16,14 +16,15 @@
del sys.argv[1:3]
sys.path.append(UTILS)
from generate_feature_test_macro_components import FeatureTestMacros
+
class Test(unittest.TestCase):
def setUp(self):
self.ftm = FeatureTestMacros(TEST_DATA)
- self.maxDiff = None # This causes the diff to be printed when the test fails
+ self.maxDiff = None # This causes the diff to be printed when the test fails
def test_implementation(self):
expected = {
"17": [
{
@@ -139,7 +140,8 @@
],
}
self.assertEqual(self.ftm.version_header_implementation, expected)
-if __name__ == '__main__':
+
+if __name__ == "__main__":
unittest.main()
--- libcxx/utils/generate_feature_test_macro_components.py 2024-09-19 21:32:29.000000 +0000
+++ libcxx/utils/generate_feature_test_macro_components.py 2024-09-19 21:37:52.087012 +0000
@@ -2197,12 +2197,18 @@
continue
last_value = value
entry = dict()
entry["value"] = value
- entry["implemented"] = self.implemented_ftms[ftm][std] == self.standard_ftms[ftm][std]
- entry["need_undef"] = last_entry is not None and last_entry["implemented"] and entry["implemented"]
+ entry["implemented"] = (
+ self.implemented_ftms[ftm][std] == self.standard_ftms[ftm][std]
+ )
+ entry["need_undef"] = (
+ last_entry is not None
+ and last_entry["implemented"]
+ and entry["implemented"]
+ )
entry["condition"] = self.ftm_metadata[ftm]["libcxx_guard"]
last_entry = entry
result[get_std_number(std)].append(dict({ftm: entry}))
--- libcxx/utils/synchronize_csv_status_files.py 2024-09-19 21:32:23.000000 +0000
+++ libcxx/utils/synchronize_csv_status_files.py 2024-09-19 21:37:52.229567 +0000
@@ -252,11 +252,13 @@
is not useful.
In case we don't update the CSV row's status, we still take any updated notes coming
from the Github issue.
"""
- if paper.status == PaperStatus(PaperStatus.TODO) and gh.status == PaperStatus(PaperStatus.IN_PROGRESS):
+ if paper.status == PaperStatus(PaperStatus.TODO) and gh.status == PaperStatus(
+ PaperStatus.IN_PROGRESS
+ ):
result = copy.deepcopy(paper)
result.notes = gh.notes
elif paper.status < gh.status:
result = copy.deepcopy(gh)
elif paper.status == gh.status:
|
|
An accidental rebase from my end messed up this PR, apologies. Let me fix that, please ignore this PR until then! |
ldionne
removed request for
a team,
dcci,
hanhanW,
amharc,
maksfb,
rafaelauler,
nicolasvasilache,
Endilll,
daniel-grumberg,
dcaballe,
dwblaikie,
PeimingLiu,
aartbik,
ayermolo and
yinying-lisa-li
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In buildLocationList, with basic block sections, we iterate over
every basic block twice to detect section start and end. This is
sub-optimal and shows up as significantly time consuming when
compiling large functions.
This patch uses the set of sections already stored in MBBSectionRanges
and iterates over sections rather than basic blocks.
When detecting if loclists can be merged, the end label of an entry is
matched with the beginning label of the next entry. For the section
corresponding to the entry basic block, this is skipped. This is
because the loc list uses the end label corresponding to the function
whereas the MBBSectionRanges map uses the function end label.
For example:
.Lfunc_begin0:
.file
.loc 0 4 0 # ex2.cc:4:0
.cfi_startproc
.Ltmp0:
#DEBUG_VALUE: test:i <- 7
.loc 0 8 5 prologue_end # ex2.cc:8:5
....
.LBB_END0_0:
.cfi_endproc
.section .text._Z4testv,"ax",@progbits,unique,1
...
.Lfunc_end0:
.size _Z4testv, .Lfunc_end0-_Z4testv
The debug loc uses ".LBB_END0_0" for the end of the section whereas
MBBSectionRanges uses ".Lfunc_end0".
It is alright to skip this as we already check the section corresponding
to the debugloc entry.