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[SDAG] Honor signed arguments in floating point libcalls #109134

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Sep 25, 2024
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[SDAG] Honor signed arguments in floating point libcalls #109134

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3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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Expand Up @@ -2205,7 +2205,8 @@ void SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
Results.push_back(Tmp.first);
Results.push_back(Tmp.second);
} else {
SDValue Tmp = ExpandLibCall(LC, Node, false).first;
bool IsSignedArgument = Node->getOpcode() == ISD::FLDEXP;
SDValue Tmp = ExpandLibCall(LC, Node, IsSignedArgument).first;
Results.push_back(Tmp);
}
}
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/ldexp-libcall.ll
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Expand Up @@ -10,7 +10,7 @@ define float @call_ldexpf(float %a, i32 %b) {
; CHECK-NEXT: std r0, 48(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: clrldi r4, r4, 32
; CHECK-NEXT: extsw r4, r4
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
Expand All @@ -29,7 +29,7 @@ define double @call_ldexp(double %a, i32 %b) {
; CHECK-NEXT: std r0, 48(r1)
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: clrldi r4, r4, 32
; CHECK-NEXT: extsw r4, r4
; CHECK-NEXT: bl ldexp
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
Expand Down
36 changes: 21 additions & 15 deletions llvm/test/CodeGen/PowerPC/ldexp.ll
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Expand Up @@ -57,22 +57,24 @@ define <2 x float> @ldexp_v2f32(<2 x float> %val, <2 x i32> %exp) {
; CHECK-NEXT: .cfi_offset v29, -48
; CHECK-NEXT: .cfi_offset v30, -32
; CHECK-NEXT: .cfi_offset v31, -16
; CHECK-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xxsldwi vs0, v2, v2, 3
; CHECK-NEXT: stxv v29, 32(r1) # 16-byte Folded Spill
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: vextuwrx r4, r3, v3
; CHECK-NEXT: vextuwrx r3, r3, v3
; CHECK-NEXT: stxv v30, 48(r1) # 16-byte Folded Spill
; CHECK-NEXT: stxv v31, 64(r1) # 16-byte Folded Spill
; CHECK-NEXT: extsw r4, r3
; CHECK-NEXT: vmr v31, v3
; CHECK-NEXT: vmr v30, v2
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs0, v30
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: xxswapd vs0, v30
; CHECK-NEXT: xscvdpspn v29, f1
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: vextuwrx r4, r3, v31
; CHECK-NEXT: vextuwrx r3, r3, v31
; CHECK-NEXT: extsw r4, r3
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: xscvdpspn vs0, f1
Expand Down Expand Up @@ -100,35 +102,39 @@ define <4 x float> @ldexp_v4f32(<4 x float> %val, <4 x i32> %exp) {
; CHECK-NEXT: .cfi_offset v29, -48
; CHECK-NEXT: .cfi_offset v30, -32
; CHECK-NEXT: .cfi_offset v31, -16
; CHECK-NEXT: li r3, 12
; CHECK-NEXT: xscvspdpn f1, v2
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: xxswapd vs0, v2
; CHECK-NEXT: stxv v28, 32(r1) # 16-byte Folded Spill
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: vextuwrx r3, r3, v3
; CHECK-NEXT: stxv v29, 48(r1) # 16-byte Folded Spill
; CHECK-NEXT: stxv v30, 64(r1) # 16-byte Folded Spill
; CHECK-NEXT: stxv v31, 80(r1) # 16-byte Folded Spill
; CHECK-NEXT: vmr v31, v3
; CHECK-NEXT: extsw r4, r3
; CHECK-NEXT: vmr v30, v2
; CHECK-NEXT: vextuwrx r4, r3, v3
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: xxswapd vs0, v30
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: li r3, 12
; CHECK-NEXT: xscpsgndp v29, f1, f1
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: vextuwrx r4, r3, v31
; CHECK-NEXT: xscvspdpn f1, v30
; CHECK-NEXT: vextuwrx r3, r3, v31
; CHECK-NEXT: extsw r4, r3
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: xxmrghd vs0, v29, vs1
; CHECK-NEXT: xxmrghd vs0, vs1, v29
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vextuwrx r4, r3, v31
; CHECK-NEXT: vextuwrx r3, r3, v31
; CHECK-NEXT: xvcvdpsp v28, vs0
; CHECK-NEXT: xxsldwi vs0, v30, v30, 3
; CHECK-NEXT: extsw r4, r3
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
; CHECK-NEXT: xxsldwi vs0, v30, v30, 1
; CHECK-NEXT: mfvsrwz r3, v31
; CHECK-NEXT: xscpsgndp v29, f1, f1
; CHECK-NEXT: mfvsrwz r4, v31
; CHECK-NEXT: extsw r4, r3
; CHECK-NEXT: xscvspdpn f1, vs0
; CHECK-NEXT: bl ldexpf
; CHECK-NEXT: nop
Expand Down Expand Up @@ -156,7 +162,7 @@ define half @ldexp_f16(half %arg0, i32 %arg1) {
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: xscvdphp f0, f1
; CHECK-NEXT: clrldi r4, r4, 32
; CHECK-NEXT: extsw r4, r4
; CHECK-NEXT: mffprwz r3, f0
; CHECK-NEXT: clrlwi r3, r3, 16
; CHECK-NEXT: mtfprwz f0, r3
Expand Down
26 changes: 26 additions & 0 deletions llvm/test/CodeGen/PowerPC/negative-integer-fp-libcall.ll
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@@ -0,0 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -O1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s

; Test that a negative parameter smaller than 64 bits (e.g., int)
; is correctly implemented with sign-extension when passed to
; a floating point libcall.

define double @ldexp_test(ptr %a, ptr %b) nounwind {
; CHECK-LABEL: ldexp_test:
; CHECK: # %bb.0:
; CHECK-NEXT: mflr 0
; CHECK-NEXT: stdu 1, -112(1)
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: lfd 1, 0(3)
; CHECK-NEXT: lwa 4, 0(4)
; CHECK-NEXT: bl ldexp
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 112
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
%base = load double, ptr %a
%exp = load i32, ptr %b
%call = call double @llvm.ldexp.f64.i32(double %base, i32 signext %exp)
ret double %call
}
69 changes: 45 additions & 24 deletions llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
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Expand Up @@ -406,27 +406,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-SSE-NEXT: subq $72, %rsp
; CHECK-SSE-NEXT: .cfi_def_cfa_offset 80
; CHECK-SSE-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
; CHECK-SSE-NEXT: pextrw $7, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $7, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: pextrw $6, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $6, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: pextrw $5, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $5, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: pextrw $4, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $4, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
Expand All @@ -436,28 +440,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: pextrw $3, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $3, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: pextrw $2, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $2, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: pextrw $1, %xmm0, %edi
; CHECK-SSE-NEXT: pextrw $1, %xmm0, %eax
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-SSE-NEXT: movd %xmm0, %eax
; CHECK-SSE-NEXT: movzwl %ax, %edi
; CHECK-SSE-NEXT: movswl %ax, %edi
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-SSE-NEXT: callq ldexpf@PLT
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
Expand All @@ -476,27 +483,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX2-NEXT: subq $72, %rsp
; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 80
; CHECK-AVX2-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
; CHECK-AVX2-NEXT: vpextrw $7, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $7, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vpextrw $6, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $6, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vpextrw $5, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $5, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vpextrw $4, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $4, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
Expand All @@ -506,28 +517,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vpextrw $3, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $3, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vpextrw $1, %xmm0, %edi
; CHECK-AVX2-NEXT: vpextrw $1, %xmm0, %eax
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX2-NEXT: vmovd %xmm0, %eax
; CHECK-AVX2-NEXT: movzwl %ax, %edi
; CHECK-AVX2-NEXT: movswl %ax, %edi
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX2-NEXT: callq ldexpf@PLT
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
Expand All @@ -546,15 +560,17 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX512F-NEXT: subq $72, %rsp
; CHECK-AVX512F-NEXT: .cfi_def_cfa_offset 80
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
; CHECK-AVX512F-NEXT: vpextrw $7, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $7, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vpextrw $6, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $6, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
Expand All @@ -564,15 +580,17 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vpextrw $5, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $5, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vpextrw $4, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $4, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
Expand All @@ -584,15 +602,17 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vpextrw $3, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $3, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vpextrw $2, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $2, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
Expand All @@ -602,7 +622,8 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vpextrw $1, %xmm0, %edi
; CHECK-AVX512F-NEXT: vpextrw $1, %xmm0, %eax
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
Expand All @@ -611,7 +632,7 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
; CHECK-AVX512F-NEXT: movzwl %ax, %edi
; CHECK-AVX512F-NEXT: movswl %ax, %edi
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
Expand Down
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