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[X86] Refine speed up checking clobbered FP/BP to make IPRA work. #109246
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@llvm/pr-subscribers-backend-x86 Author: Freddy Ye (FreddyLeaf) Changes0d471b3 resolved IPRA issue on X86 before, refined a little to make it still work after speed up checking. Full diff: https://github.com/llvm/llvm-project/pull/109246.diff 2 Files Affected:
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index 4f83267c999e4a..dfdf0554ef1f27 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -4495,7 +4495,10 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
// Currently only inline asm and function call can clobbers fp/bp. So we can
// do some quick test and return early.
- if (!MF.hasInlineAsm()) {
+ // And when IPRA is on, callee may also clobber fp/bp.
+ // FIXME: setF/BPClobberedByCall(true) in RegUsageInfoPropagation::setRegMask
+ // so we don't need the condition of IPRA here.
+ if (!MF.hasInlineAsm() && !MF.getTarget().Options.EnableIPRA) {
X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
if (!X86FI->getFPClobberedByCall())
FP = 0;
@@ -4567,7 +4570,9 @@ void X86FrameLowering::spillFPBP(MachineFunction &MF) const {
// If the bp is clobbered by a call, we should save and restore outside of
// the frame setup instructions.
- if (KillMI->isCall() && DefMI != ME) {
+ // When IPRA is enabled, we could skip this step.
+ if (KillMI->isCall() && DefMI != ME && !MF.hasInlineAsm() &&
+ !MF.getTarget().Options.EnableIPRA) {
auto FrameSetup = std::next(DefMI);
// Look for frame setup instruction toward the start of the BB.
// If we reach another call instruction, it means no frame setup
diff --git a/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll b/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll
new file mode 100644
index 00000000000000..aad2b5c6c85417
--- /dev/null
+++ b/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll
@@ -0,0 +1,21 @@
+; RUN: llc -enable-ipra < %s | FileCheck %s
+
+target triple = "x86_64--"
+
+define internal void @foo() norecurse {
+ call void asm sideeffect "xor %ebp, %ebp", "~{ebp}"()
+ ret void
+}
+
+define void @bar(i32 %X) "frame-pointer"="all" {
+ ; When $rbp is clobbered by foo() and IPRA is enabled, $rbp should be spill/reload before/after call foo
+ ; CHECK-LABEL: bar:
+ ; CHECK: pushq %rbp
+ ; CHECK: callq foo
+ ; CHECK: popq %rbp
+ ; CHECK: movl $5, -4(%rbp)
+ call void @foo()
+ %addr = alloca i32, align 4
+ store i32 5, ptr %addr, align 4
+ ret void
+}
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LGTM.
Sorry, this PR is still not correct. set as draft first. |
After more investigation, I realized spillFPBP has to be done before argument passing even IPRA is enabled. Considering there is a function containing e.g. 9 pointers as arguments, if there is a |
Created #109597 as a new fix for the issue here. |
X86 IPRA had below issue: https://gcc.godbolt.org/z/6hh88xv9r
This patch resolved it based on spillFPBP