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[Clang][AArch64] Fix checkArmStreamingBuiltin for 'sve-b16b16' #109420

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Merged
merged 4 commits into from
Oct 8, 2024
Merged

[Clang][AArch64] Fix checkArmStreamingBuiltin for 'sve-b16b16' #109420

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af4cd0b
[Clang][AArch64] Fix checkArmStreamingBuiltin for 'sve-b16b16'
sdesmalen-arm Sep 20, 2024
bfa1348
Add TableGen checks
sdesmalen-arm Sep 24, 2024
49c3ed3
Simplify approach by prepending target guard with "sve," or "sme,"
sdesmalen-arm Oct 2, 2024
e34305f
Reorder conditions
sdesmalen-arm Oct 3, 2024
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10 changes: 2 additions & 8 deletions clang/lib/Sema/SemaARM.cpp
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Expand Up @@ -567,23 +567,17 @@ static bool checkArmStreamingBuiltin(Sema &S, CallExpr *TheCall,
// * When compiling for SVE only, the caller must be in non-streaming mode.
// * When compiling for both SVE and SME, the caller can be in either mode.
if (BuiltinType == SemaARM::VerifyRuntimeMode) {
auto DisableFeatures = [](llvm::StringMap<bool> &Map, StringRef S) {
for (StringRef K : Map.keys())
if (K.starts_with(S))
Map[K] = false;
};

llvm::StringMap<bool> CallerFeatureMapWithoutSVE;
S.Context.getFunctionFeatureMap(CallerFeatureMapWithoutSVE, FD);
DisableFeatures(CallerFeatureMapWithoutSVE, "sve");
CallerFeatureMapWithoutSVE["sve"] = false;

// Avoid emitting diagnostics for a function that can never compile.
if (FnType == SemaARM::ArmStreaming && !CallerFeatureMapWithoutSVE["sme"])
return false;

llvm::StringMap<bool> CallerFeatureMapWithoutSME;
S.Context.getFunctionFeatureMap(CallerFeatureMapWithoutSME, FD);
DisableFeatures(CallerFeatureMapWithoutSME, "sme");
CallerFeatureMapWithoutSME["sme"] = false;

// We know the builtin requires either some combination of SVE flags, or
// some combination of SME flags, but we need to figure out which part
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6 changes: 3 additions & 3 deletions clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_ldr_str_zt.c
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Expand Up @@ -2,9 +2,9 @@

// REQUIRES: aarch64-registered-target

// RUN: %clang_cc1 -triple aarch64 -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s

#include <arm_sme.h>

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6 changes: 3 additions & 3 deletions clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_zero_zt.c
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Expand Up @@ -2,9 +2,9 @@

// REQUIRES: aarch64-registered-target

// RUN: %clang_cc1 -triple aarch64 -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -disable-O0-optnone -Werror -Wall -emit-llvm -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK
// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s

#include <arm_sme.h>

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16 changes: 8 additions & 8 deletions clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
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Expand Up @@ -6,22 +6,22 @@

void test_features(uint32_t slice, svfloat16x2_t zn2, svfloat16x4_t zn4,
svbfloat16x2_t bzn2, svbfloat16x4_t bzn4) __arm_streaming __arm_inout("za") {
// expected-error@+1 {{'svadd_za16_f16_vg1x2' needs target feature sme-f16f16|sme-f8f16}}
// expected-error@+1 {{'svadd_za16_f16_vg1x2' needs target feature sme,(sme-f16f16|sme-f8f16)}}
svadd_za16_f16_vg1x2(slice, zn2);
// expected-error@+1 {{'svadd_za16_f16_vg1x4' needs target feature sme-f16f16|sme-f8f16}}
// expected-error@+1 {{'svadd_za16_f16_vg1x4' needs target feature sme,(sme-f16f16|sme-f8f16)}}
svadd_za16_f16_vg1x4(slice, zn4);
// expected-error@+1 {{'svsub_za16_f16_vg1x2' needs target feature sme-f16f16|sme-f8f16}}
// expected-error@+1 {{'svsub_za16_f16_vg1x2' needs target feature sme,(sme-f16f16|sme-f8f16)}}
svsub_za16_f16_vg1x2(slice, zn2);
// expected-error@+1 {{'svsub_za16_f16_vg1x4' needs target feature sme-f16f16|sme-f8f16}}
// expected-error@+1 {{'svsub_za16_f16_vg1x4' needs target feature sme,(sme-f16f16|sme-f8f16)}}
svsub_za16_f16_vg1x4(slice, zn4);

// expected-error@+1 {{'svadd_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svadd_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svadd_za16_bf16_vg1x2(slice, bzn2);
// expected-error@+1 {{'svadd_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svadd_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svadd_za16_bf16_vg1x4(slice, bzn4);
// expected-error@+1 {{'svsub_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svsub_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svsub_za16_bf16_vg1x2(slice, bzn2);
// expected-error@+1 {{'svsub_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svsub_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svsub_za16_bf16_vg1x4(slice, bzn4);
}

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38 changes: 19 additions & 19 deletions clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_b16b16.cpp
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Expand Up @@ -6,45 +6,45 @@

void test_b16b16( svbfloat16_t bf16, svbfloat16x2_t bf16x2, svbfloat16x4_t bf16x4) __arm_streaming
{
// expected-error@+1 {{'svclamp_single_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svclamp_single_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svclamp_single_bf16_x2(bf16x2, bf16, bf16);
// expected-error@+1 {{'svclamp_single_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svclamp_single_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svclamp_single_bf16_x4(bf16x4, bf16, bf16);

// expected-error@+1 {{'svmax_single_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmax_single_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svmax_single_bf16_x2(bf16x2, bf16);
// expected-error@+1 {{'svmax_single_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmax_single_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svmax_single_bf16_x4(bf16x4, bf16);
// expected-error@+1 {{'svmax_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmax_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svmax_bf16_x2(bf16x2, bf16x2);
// expected-error@+1 {{'svmax_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmax_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svmax_bf16_x4(bf16x4, bf16x4);

// expected-error@+1 {{'svmaxnm_single_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmaxnm_single_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svmaxnm_single_bf16_x2(bf16x2, bf16);
// expected-error@+1 {{'svmaxnm_single_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmaxnm_single_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svmaxnm_single_bf16_x4(bf16x4, bf16);
// expected-error@+1 {{'svmaxnm_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmaxnm_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svmaxnm_bf16_x2(bf16x2, bf16x2);
// expected-error@+1 {{'svmaxnm_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmaxnm_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svmaxnm_bf16_x4(bf16x4, bf16x4);

// expected-error@+1 {{'svmin_single_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmin_single_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svmin_single_bf16_x2(bf16x2, bf16);
// expected-error@+1 {{'svmin_single_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmin_single_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svmin_single_bf16_x4(bf16x4, bf16);
// expected-error@+1 {{'svmin_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmin_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svmin_bf16_x2(bf16x2, bf16x2);
// expected-error@+1 {{'svmin_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svmin_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svmin_bf16_x4(bf16x4, bf16x4);

// expected-error@+1 {{'svminnm_single_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svminnm_single_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svminnm_single_bf16_x2(bf16x2, bf16);
// expected-error@+1 {{'svminnm_single_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svminnm_single_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svminnm_single_bf16_x4(bf16x4, bf16);

// expected-error@+1 {{'svminnm_bf16_x2' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svminnm_bf16_x2' needs target feature sme,sme2,sve-b16b16}}
svminnm_bf16_x2(bf16x2, bf16x2);
// expected-error@+1 {{'svminnm_bf16_x4' needs target feature sme2,sve-b16b16}}
// expected-error@+1 {{'svminnm_bf16_x4' needs target feature sme,sme2,sve-b16b16}}
svminnm_bf16_x4(bf16x4, bf16x4);
}
}
48 changes: 24 additions & 24 deletions clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
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Expand Up @@ -14,54 +14,54 @@ void test_features_f16f16(uint32_t slice,
svbfloat16x4_t bzn4, svbfloat16x4_t bzm4)

__arm_streaming __arm_inout("za") {
// expected-error@+1 {{'svmla_single_za16_f16_vg1x2' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmla_single_za16_f16_vg1x2' needs target feature sme,sme-f16f16}}
svmla_single_za16_f16_vg1x2(slice, zn2, zm);
// expected-error@+1 {{'svmla_single_za16_f16_vg1x4' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmla_single_za16_f16_vg1x4' needs target feature sme,sme-f16f16}}
svmla_single_za16_f16_vg1x4(slice, zn4, zm);
// expected-error@+1 {{'svmls_single_za16_f16_vg1x2' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmls_single_za16_f16_vg1x2' needs target feature sme,sme-f16f16}}
svmls_single_za16_f16_vg1x2(slice, zn2, zm);
// expected-error@+1 {{'svmls_single_za16_f16_vg1x4' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmls_single_za16_f16_vg1x4' needs target feature sme,sme-f16f16}}
svmls_single_za16_f16_vg1x4(slice, zn4, zm);
// expected-error@+1 {{'svmla_za16_f16_vg1x2' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmla_za16_f16_vg1x2' needs target feature sme,sme-f16f16}}
svmla_za16_f16_vg1x2(slice, zn2, zm2);
// expected-error@+1 {{'svmla_za16_f16_vg1x4' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmla_za16_f16_vg1x4' needs target feature sme,sme-f16f16}}
svmla_za16_f16_vg1x4(slice, zn4, zm4);
// expected-error@+1 {{'svmls_za16_f16_vg1x2' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmls_za16_f16_vg1x2' needs target feature sme,sme-f16f16}}
svmls_za16_f16_vg1x2(slice, zn2, zm2);
// expected-error@+1 {{'svmls_za16_f16_vg1x4' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmls_za16_f16_vg1x4' needs target feature sme,sme-f16f16}}
svmls_za16_f16_vg1x4(slice, zn4, zm4);
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x2' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x2' needs target feature sme,sme-f16f16}}
svmla_lane_za16_f16_vg1x2(slice, zn2, zm, 7);
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x4' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmla_lane_za16_f16_vg1x4' needs target feature sme,sme-f16f16}}
svmla_lane_za16_f16_vg1x4(slice, zn4, zm, 7);
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x2' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x2' needs target feature sme,sme-f16f16}}
svmls_lane_za16_f16_vg1x2(slice, zn2, zm, 7);
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x4' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmls_lane_za16_f16_vg1x4' needs target feature sme,sme-f16f16}}
svmls_lane_za16_f16_vg1x4(slice, zn4, zm, 7);

// expected-error@+1 {{'svmla_single_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmla_single_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svmla_single_za16_bf16_vg1x2(slice, bzn2, bzm);
// expected-error@+1 {{'svmla_single_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmla_single_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svmla_single_za16_bf16_vg1x4(slice, bzn4, bzm);
// expected-error@+1 {{'svmls_single_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmls_single_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svmls_single_za16_bf16_vg1x2(slice, bzn2, bzm);
// expected-error@+1 {{'svmls_single_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmls_single_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svmls_single_za16_bf16_vg1x4(slice, bzn4, bzm);
// expected-error@+1 {{'svmla_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmla_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svmla_za16_bf16_vg1x2(slice, bzn2, bzm2);
// expected-error@+1 {{'svmla_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmla_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svmla_za16_bf16_vg1x4(slice, bzn4, bzm4);
// expected-error@+1 {{'svmls_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmls_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svmls_za16_bf16_vg1x2(slice, bzn2, bzm2);
// expected-error@+1 {{'svmls_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmls_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svmls_za16_bf16_vg1x4(slice, bzn4, bzm4);
// expected-error@+1 {{'svmla_lane_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmla_lane_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svmla_lane_za16_bf16_vg1x2(slice, bzn2, bzm, 7);
// expected-error@+1 {{'svmla_lane_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmla_lane_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svmla_lane_za16_bf16_vg1x4(slice, bzn4, bzm, 7);
// expected-error@+1 {{'svmls_lane_za16_bf16_vg1x2' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmls_lane_za16_bf16_vg1x2' needs target feature sme,sme-b16b16}}
svmls_lane_za16_bf16_vg1x2(slice, bzn2, bzm, 7);
// expected-error@+1 {{'svmls_lane_za16_bf16_vg1x4' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmls_lane_za16_bf16_vg1x4' needs target feature sme,sme-b16b16}}
svmls_lane_za16_bf16_vg1x4(slice, bzn4, bzm, 7);
}

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8 changes: 4 additions & 4 deletions clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
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Expand Up @@ -8,13 +8,13 @@ void test_features(svbool_t pn, svbool_t pm,
svfloat16_t zn, svfloat16_t zm,
svbfloat16_t znb, svbfloat16_t zmb)
__arm_streaming __arm_inout("za") {
// expected-error@+1 {{'svmopa_za16_bf16_m' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmopa_za16_bf16_m' needs target feature sme,sme-b16b16}}
svmopa_za16_bf16_m(0, pn, pm, znb, zmb);
// expected-error@+1 {{'svmops_za16_bf16_m' needs target feature sme-b16b16}}
// expected-error@+1 {{'svmops_za16_bf16_m' needs target feature sme,sme-b16b16}}
svmops_za16_bf16_m(0, pn, pm, znb, zmb);
// expected-error@+1 {{'svmopa_za16_f16_m' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmopa_za16_f16_m' needs target feature sme,sme-f16f16}}
svmopa_za16_f16_m(0, pn, pm, zn, zm);
// expected-error@+1 {{'svmops_za16_f16_m' needs target feature sme-f16f16}}
// expected-error@+1 {{'svmops_za16_f16_m' needs target feature sme,sme-f16f16}}
svmops_za16_f16_m(0, pn, pm, zn, zm);
}

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6 changes: 6 additions & 0 deletions clang/test/Sema/aarch64-streaming-sme-or-nonstreaming-sve-builtins.c
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Expand Up @@ -38,6 +38,12 @@ svfloat32_t good6(svfloat32_t a, svfloat32_t b, svfloat32_t c) __arm_streaming_c
return svclamp(a, b, c);
}

// Test that the +sve-b16b16 is not considered an SVE flag (it applies to both)
__attribute__((target("+sme2,+sve2,+sve-b16b16")))
svbfloat16_t good7(svbfloat16_t a, svbfloat16_t b, svbfloat16_t c) __arm_streaming {
return svclamp_bf16(a, b, c);
}

// Without '+sme2', the builtin is only valid in non-streaming mode.
__attribute__((target("+sve2p1,+sme")))
svfloat32_t bad1(svfloat32_t a, svfloat32_t b, svfloat32_t c) __arm_streaming {
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