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[AMDGPU][True16][MC] add true16 and fake16 test file for vop3 instructions #109695

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Merged
merged 1 commit into from
Sep 24, 2024
Merged

[AMDGPU][True16][MC] add true16 and fake16 test file for vop3 instructions #109695

merged 1 commit into from
Sep 24, 2024

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broxigarchen
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@broxigarchen broxigarchen commented Sep 23, 2024 •
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duplicating mc test, and updating proper flag for true16 and fake16 test file for vop3 instructions. This is preparing for the up-coming VOP3 true16 changes

@llvmbot llvmbot added backend:AMDGPU mc Machine (object) code labels Sep 23, 2024
@broxigarchen broxigarchen changed the title [AMDGPU][True16][MC] duplicate and add true16 and fake16 test file fo… [AMDGPU][True16][MC] add true16 and fake16 test file for vop3 instructions Sep 23, 2024
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llvmbot commented Sep 23, 2024

@llvm/pr-subscribers-mc

Author: Brox Chen (broxigarchen)

Changes

…r VOP3

instructions

Patch is 1.27 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/109695.diff

18 Files Affected:

  • (added) llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s (+6199)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16-fake16.s (+4695)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8-fake16.s (+2968)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s (+7294)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16-fake16.s (+5764)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8-fake16.s (+3814)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s (+4-4)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt (+4-2)
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s
new file mode 100644
index 00000000000000..d78673d933b7ab
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s
@@ -0,0 +1,6199 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-real-true16  %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,-real-true16  %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+
+v_add3_u32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x01,0x05,0x0e,0x00]
+
+v_add3_u32 v5, v255, s2, s105
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xff,0x05,0xa4,0x01]
+
+v_add3_u32 v5, s1, v255, exec_hi
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x01,0xfe,0xff,0x01]
+
+v_add3_u32 v5, s105, s105, exec_lo
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x69,0xd2,0xf8,0x01]
+
+v_add3_u32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_add3_u32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_add3_u32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_add3_u32 v5, m0, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7d,0xe0,0xf5,0x01]
+
+v_add3_u32 v5, exec_lo, -1, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7e,0x82,0xad,0x01]
+
+v_add3_u32 v5, exec_hi, null, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7f,0xf8,0xa8,0x01]
+
+v_add3_u32 v5, null, exec_lo, 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7c,0xfc,0xfc,0x03,0x56,0x34,0x12,0xaf]
+
+v_add3_u32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_add3_u32 v5, 0.5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xf0,0xfa,0xc0,0x03]
+
+v_add3_u32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_add3_u32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x55,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_add_co_u32 v5, s6, v1, v2
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, v255, v255
+// W32: encoding: [0x05,0x06,0x00,0xd7,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, s1, s2
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x01,0x04,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, s105, s105
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x69,0xd2,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, vcc_lo, ttmp15
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x6a,0xf6,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, vcc_hi, 0xaf123456
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x6b,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, ttmp15, src_scc
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7b,0xfa,0x01,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, m0, 0.5
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7d,0xe0,0x01,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, exec_lo, -1
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7e,0x82,0x01,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, exec_hi, null
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7f,0xf8,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s105, null, exec_lo
+// W32: encoding: [0x05,0x69,0x00,0xd7,0x7c,0xfc,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, vcc_lo, -1, exec_hi
+// W32: encoding: [0x05,0x6a,0x00,0xd7,0xc1,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, vcc_hi, 0.5, m0
+// W32: encoding: [0x05,0x6b,0x00,0xd7,0xf0,0xfa,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, ttmp15, src_scc, vcc_lo
+// W32: encoding: [0x05,0x7b,0x00,0xd7,0xfd,0xd4,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], v1, v2
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], v255, v255
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], s1, s2
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x01,0x04,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], s105, s105
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x69,0xd2,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], vcc_lo, ttmp15
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x6a,0xf6,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], vcc_hi, 0xaf123456
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x6b,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], ttmp15, src_scc
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7b,0xfa,0x01,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], m0, 0.5
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7d,0xe0,0x01,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], exec_lo, -1
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7e,0x82,0x01,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], exec_hi, null
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7f,0xf8,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], null, exec_lo
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7c,0xfc,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[104:105], -1, exec_hi
+// W64: encoding: [0x05,0x68,0x00,0xd7,0xc1,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, vcc, 0.5, m0
+// W64: encoding: [0x05,0x6a,0x00,0xd7,0xf0,0xfa,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
+
+v_add_co_u32 v5, ttmp[14:15], src_scc, vcc_lo
+// W64: encoding: [0x05,0x7a,0x00,0xd7,0xfd,0xd4,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v255, null, 0xaf123456, vcc_hi clamp
+// GFX11: encoding: [0xff,0xfc,0x00,0xd7,0xff,0xd6,0x00,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_f64 v[5:6], v[1:2], v[2:3]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_f64 v[5:6], v[254:255], v[254:255]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0xfe,0xfd,0x03,0x00]
+
+v_add_f64 v[5:6], s[2:3], s[4:5]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x02,0x08,0x00,0x00]
+
+v_add_f64 v[5:6], s[104:105], s[104:105]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x68,0xd0,0x00,0x00]
+
+v_add_f64 v[5:6], vcc, ttmp[14:15]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x6a,0xf4,0x00,0x00]
+
+v_add_f64 v[5:6], ttmp[14:15], 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x7a,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_f64 v[5:6], -|exec|, src_scc
+// GFX11: encoding: [0x05,0x01,0x27,0xd7,0x7e,0xfa,0x01,0x20]
+
+v_add_f64 v[5:6], null, 0.5
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x7c,0xe0,0x01,0x00]
+
+v_add_f64 v[5:6], -1, -1
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0xc1,0x82,0x01,0x00]
+
+v_add_f64 v[5:6], 0.5, null mul:2
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0xf0,0xf8,0x00,0x08]
+
+v_add_f64 v[5:6], -|src_scc|, -|exec| mul:4
+// GFX11: encoding: [0x05,0x03,0x27,0xd7,0xfd,0xfc,0x00,0x70]
+
+v_add_f64 v[254:255], 0xaf123456, -|vcc| clamp div:2
+// GFX11: encoding: [0xfe,0x82,0x27,0xd7,0xff,0xd4,0x00,0x58,0x56,0x34,0x12,0xaf]
+
+v_add_lshl_u32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x01,0x05,0x0e,0x00]
+
+v_add_lshl_u32 v5, v255, s2, s105
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xff,0x05,0xa4,0x01]
+
+v_add_lshl_u32 v5, s1, v255, exec_hi
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x01,0xfe,0xff,0x01]
+
+v_add_lshl_u32 v5, s105, s105, exec_lo
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x69,0xd2,0xf8,0x01]
+
+v_add_lshl_u32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_add_lshl_u32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_add_lshl_u32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_add_lshl_u32 v5, m0, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7d,0xe0,0xf5,0x01]
+
+v_add_lshl_u32 v5, exec_lo, -1, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7e,0x82,0xad,0x01]
+
+v_add_lshl_u32 v5, exec_hi, null, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7f,0xf8,0xa8,0x01]
+
+v_add_lshl_u32 v5, null, exec_lo, 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7c,0xfc,0xfc,0x03,0x56,0x34,0x12,0xaf]
+
+v_add_lshl_u32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_add_lshl_u32 v5, 0.5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xf0,0xfa,0xc0,0x03]
+
+v_add_lshl_u32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_add_lshl_u32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x47,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_add_nc_i16 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_nc_i16 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0xff,0xff,0x03,0x00]
+
+v_add_nc_i16 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x01,0x04,0x00,0x00]
+
+v_add_nc_i16 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x69,0xd2,0x00,0x00]
+
+v_add_nc_i16 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_add_nc_i16 v5, vcc_hi, 0xfe0b
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+
+v_add_nc_i16 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_add_nc_i16 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_add_nc_i16 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7e,0x82,0x01,0x00]
+
+v_add_nc_i16 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_add_nc_i16 v5, null, exec_lo op_sel:[1,1,1]
+// GFX11: encoding: [0x05,0x58,0x0d,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_add_nc_i16 v5, -1, exec_hi op_sel:[0,0,0]
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_add_nc_i16 v5, 0.5, m0 op_sel:[1,0,0]
+// GFX11: encoding: [0x05,0x08,0x0d,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_add_nc_i16 v5, src_scc, vcc_lo op_sel:[0,1,0]
+// GFX11: encoding: [0x05,0x10,0x0d,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_add_nc_i16 v255, 0xfe0b, vcc_hi op_sel:[0,0,1] clamp
+// GFX11: encoding: [0xff,0xc0,0x0d,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_add_nc_i32 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_nc_i32 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xff,0xff,0x03,0x00]
+
+v_add_nc_i32 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x01,0x04,0x00,0x00]
+
+v_add_nc_i32 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x69,0xd2,0x00,0x00]
+
+v_add_nc_i32 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_add_nc_i32 v5, vcc_hi, 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x6b,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_nc_i32 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_add_nc_i32 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_add_nc_i32 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7e,0x82,0x01,0x00]
+
+v_add_nc_i32 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_add_nc_i32 v5, null, exec_lo
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_add_nc_i32 v5, -1, exec_hi
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_add_nc_i32 v5, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_add_nc_i32 v5, src_scc, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_add_nc_i32 v255, 0xaf123456, vcc_hi clamp
+// GFX11: encoding: [0xff,0x80,0x26,0xd7,0xff,0xd6,0x00,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_nc_u16 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_nc_u16 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0xff,0xff,0x03,0x00]
+
+v_add_nc_u16 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x01,0x04,0x00,0x00]
+
+v_add_nc_u16 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x69,0xd2,0x00,0x00]
+
+v_add_nc_u16 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_add_nc_u16 v5, vcc_hi, 0xfe0b
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+
+v_add_nc_u16 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_add_nc_u16 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_add_nc_u16 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7e,0x82,0x01,0x00]
+
+v_add_nc_u16 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_add_nc_u16 v5, null, exec_lo op_sel:[1,1,1]
+// GFX11: encoding: [0x05,0x58,0x03,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_add_nc_u16 v5, -1, exec_hi op_sel:[0,0,0]
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_add_nc_u16 v5, 0.5, m0 op_sel:[1,0,0]
+// GFX11: encoding: [0x05,0x08,0x03,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_add_nc_u16 v5, src_scc, vcc_lo op_sel:[0,1,0]
+// GFX11: encoding: [0x05,0x10,0x03,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_add_nc_u16 v255, 0xfe0b, vcc_hi op_sel:[0,0,1] clamp
+// GFX11: encoding: [0xff,0xc0,0x03,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_alignbit_b32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x01,0x05,0x0e,0x00]
+
+v_alignbit_b32 v5, v255, s2, s3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xff,0x05,0x0c,0x00]
+
+v_alignbit_b32 v5, s1, v255, s3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x01,0xfe,0x0f,0x00]
+
+v_alignbit_b32 v5, s105, s105, s105
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x69,0xd2,0xa4,0x01]
+
+v_alignbit_b32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_alignbit_b32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_alignbit_b32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_alignbit_b32 v5, m0, 0.5, exec_lo
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7d,0xe0,0xf9,0x01]
+
+v_alignbit_b32 v5, exec_lo, -1, m0
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7e,0x82,0xf5,0x01]
+
+v_alignbit_b32 v5, exec_hi, null, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7f,0xf8,0xac,0x01]
+
+v_alignbit_b32 v5, null, exec_lo, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7c,0xfc,0xa8,0x01]
+
+v_alignbit_b32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_alignbit_b32 v5, 0.5, m0, exec_hi
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xf0,0xfa,0xfc,0x01]
+
+v_alignbit_b32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_alignbit_b32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x16,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_alignbyte_b32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x01,0x05,0x0e,0x00]
+
+v_alignbyte_b32 v5, v255, s2, s3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xff,0x05,0x0c,0x00]
+
+v_alignbyte_b32 v5, s1, v255, s3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x01,0xfe,0x0f,0x00]
+
+v_alignbyte_b32 v5, s105, s105, s105
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x69,0xd2,0xa4,0x01]
+
+v_alignbyte_b32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_alignbyte_b32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_alignbyte_b32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_alignbyte_b32 v5, m0, 0.5, exec_lo
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7d,0xe0,0xf9,0x01]
+
+v_alignbyte_b32 v5, exec_lo, -1, m0
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7e,0x82,0xf5,0x01]
+
+v_alignbyte_b32 v5, exec_hi, null, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7f,0xf8,0xac,0x01]
+
+v_alignbyte_b32 v5, null, exec_lo, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7c,0xfc,0xa8,0x01]
+
+v_alignbyte_b32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_alignbyte_b32 v5, 0.5, m0, exec_hi
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xf0,0xfa,0xfc,0x01]
+
+v_alignbyte_b32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_alignbyte_b32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x17,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_and_b16 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x01,0x05,0x02,0x00]
+
+v_and_b16 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xff,0xff,0x03,0x00]
+
+v_and_b16 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x01,0x04,0x00,0x00]
+
+v_and_b16 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x69,0xd2,0x00,0x00]
+
+v_and_b16 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_and_b16 v5, vcc_hi, 0xfe0b
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+
+v_and_b16 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_and_b16 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_and_b16 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7e,0x82,0x01,0x00]
+
+v_and_b16 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_and_b16 v5, null, exec_lo
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_and_b16 v5, -1, exec_hi
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_and_b16 v5, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_and_b16 v5, src_scc, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_and_b16 v255, 0xfe0b, vcc_hi
+// GFX11: encoding: [0xff,0x00,0x62,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_and_or_b32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x01,0x05,0x0e,0x00]
+
+v_and_or_b32 v5, v255, s2, s105
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0xff,0x05,0xa4,0x01]
+
+v_and_or_b32 v5, s1, v255, exec_hi
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x01,0xfe,0xff,0x01]
+
+v_and_or_b32 v5, s105, s105, exec_lo
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x69,0xd2,0xf8,0x01]
+
+v_and_or_b32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_and_or_b32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_and_or_b32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_and_or_b32 v5, m0, 0.5, m0
+//...
[truncated]

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llvmbot commented Sep 23, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Brox Chen (broxigarchen)

Changes

…r VOP3

instructions

Patch is 1.27 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/109695.diff

18 Files Affected:

  • (added) llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s (+6199)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16-fake16.s (+4695)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8-fake16.s (+2968)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3-fake16.s (+7294)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16-fake16.s (+5764)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s (+4-4)
  • (added) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8-fake16.s (+3814)
  • (modified) llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s (+4-4)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt (+4-2)
  • (modified) llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt (+4-2)
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s
new file mode 100644
index 00000000000000..d78673d933b7ab
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3-fake16.s
@@ -0,0 +1,6199 @@
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11,W32 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,-real-true16 -show-encoding %s | FileCheck --check-prefixes=GFX11,W64 %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize32,-real-true16  %s 2>&1 | FileCheck --check-prefix=W32-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64,-real-true16  %s 2>&1 | FileCheck --check-prefix=W64-ERR --implicit-check-not=error: %s
+
+v_add3_u32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x01,0x05,0x0e,0x00]
+
+v_add3_u32 v5, v255, s2, s105
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xff,0x05,0xa4,0x01]
+
+v_add3_u32 v5, s1, v255, exec_hi
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x01,0xfe,0xff,0x01]
+
+v_add3_u32 v5, s105, s105, exec_lo
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x69,0xd2,0xf8,0x01]
+
+v_add3_u32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_add3_u32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_add3_u32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_add3_u32 v5, m0, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7d,0xe0,0xf5,0x01]
+
+v_add3_u32 v5, exec_lo, -1, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7e,0x82,0xad,0x01]
+
+v_add3_u32 v5, exec_hi, null, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7f,0xf8,0xa8,0x01]
+
+v_add3_u32 v5, null, exec_lo, 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0x7c,0xfc,0xfc,0x03,0x56,0x34,0x12,0xaf]
+
+v_add3_u32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_add3_u32 v5, 0.5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xf0,0xfa,0xc0,0x03]
+
+v_add3_u32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x55,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_add3_u32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x55,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_add_co_u32 v5, s6, v1, v2
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x01,0x05,0x02,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, v255, v255
+// W32: encoding: [0x05,0x06,0x00,0xd7,0xff,0xff,0x03,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, s1, s2
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x01,0x04,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, s105, s105
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x69,0xd2,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, vcc_lo, ttmp15
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x6a,0xf6,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, vcc_hi, 0xaf123456
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x6b,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, ttmp15, src_scc
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7b,0xfa,0x01,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, m0, 0.5
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7d,0xe0,0x01,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, exec_lo, -1
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7e,0x82,0x01,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s6, exec_hi, null
+// W32: encoding: [0x05,0x06,0x00,0xd7,0x7f,0xf8,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s105, null, exec_lo
+// W32: encoding: [0x05,0x69,0x00,0xd7,0x7c,0xfc,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, vcc_lo, -1, exec_hi
+// W32: encoding: [0x05,0x6a,0x00,0xd7,0xc1,0xfe,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, vcc_hi, 0.5, m0
+// W32: encoding: [0x05,0x6b,0x00,0xd7,0xf0,0xfa,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, ttmp15, src_scc, vcc_lo
+// W32: encoding: [0x05,0x7b,0x00,0xd7,0xfd,0xd4,0x00,0x00]
+// W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], v1, v2
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x01,0x05,0x02,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], v255, v255
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0xff,0xff,0x03,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], s1, s2
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x01,0x04,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], s105, s105
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x69,0xd2,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], vcc_lo, ttmp15
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x6a,0xf6,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], vcc_hi, 0xaf123456
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x6b,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], ttmp15, src_scc
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7b,0xfa,0x01,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], m0, 0.5
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7d,0xe0,0x01,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], exec_lo, -1
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7e,0x82,0x01,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], exec_hi, null
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7f,0xf8,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[12:13], null, exec_lo
+// W64: encoding: [0x05,0x0c,0x00,0xd7,0x7c,0xfc,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, s[104:105], -1, exec_hi
+// W64: encoding: [0x05,0x68,0x00,0xd7,0xc1,0xfe,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v5, vcc, 0.5, m0
+// W64: encoding: [0x05,0x6a,0x00,0xd7,0xf0,0xfa,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: operands are not valid for this GPU or mode
+
+v_add_co_u32 v5, ttmp[14:15], src_scc, vcc_lo
+// W64: encoding: [0x05,0x7a,0x00,0xd7,0xfd,0xd4,0x00,0x00]
+// W32-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: invalid operand for instruction
+
+v_add_co_u32 v255, null, 0xaf123456, vcc_hi clamp
+// GFX11: encoding: [0xff,0xfc,0x00,0xd7,0xff,0xd6,0x00,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_f64 v[5:6], v[1:2], v[2:3]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_f64 v[5:6], v[254:255], v[254:255]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0xfe,0xfd,0x03,0x00]
+
+v_add_f64 v[5:6], s[2:3], s[4:5]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x02,0x08,0x00,0x00]
+
+v_add_f64 v[5:6], s[104:105], s[104:105]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x68,0xd0,0x00,0x00]
+
+v_add_f64 v[5:6], vcc, ttmp[14:15]
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x6a,0xf4,0x00,0x00]
+
+v_add_f64 v[5:6], ttmp[14:15], 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x7a,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_f64 v[5:6], -|exec|, src_scc
+// GFX11: encoding: [0x05,0x01,0x27,0xd7,0x7e,0xfa,0x01,0x20]
+
+v_add_f64 v[5:6], null, 0.5
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0x7c,0xe0,0x01,0x00]
+
+v_add_f64 v[5:6], -1, -1
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0xc1,0x82,0x01,0x00]
+
+v_add_f64 v[5:6], 0.5, null mul:2
+// GFX11: encoding: [0x05,0x00,0x27,0xd7,0xf0,0xf8,0x00,0x08]
+
+v_add_f64 v[5:6], -|src_scc|, -|exec| mul:4
+// GFX11: encoding: [0x05,0x03,0x27,0xd7,0xfd,0xfc,0x00,0x70]
+
+v_add_f64 v[254:255], 0xaf123456, -|vcc| clamp div:2
+// GFX11: encoding: [0xfe,0x82,0x27,0xd7,0xff,0xd4,0x00,0x58,0x56,0x34,0x12,0xaf]
+
+v_add_lshl_u32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x01,0x05,0x0e,0x00]
+
+v_add_lshl_u32 v5, v255, s2, s105
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xff,0x05,0xa4,0x01]
+
+v_add_lshl_u32 v5, s1, v255, exec_hi
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x01,0xfe,0xff,0x01]
+
+v_add_lshl_u32 v5, s105, s105, exec_lo
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x69,0xd2,0xf8,0x01]
+
+v_add_lshl_u32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_add_lshl_u32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_add_lshl_u32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_add_lshl_u32 v5, m0, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7d,0xe0,0xf5,0x01]
+
+v_add_lshl_u32 v5, exec_lo, -1, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7e,0x82,0xad,0x01]
+
+v_add_lshl_u32 v5, exec_hi, null, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7f,0xf8,0xa8,0x01]
+
+v_add_lshl_u32 v5, null, exec_lo, 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0x7c,0xfc,0xfc,0x03,0x56,0x34,0x12,0xaf]
+
+v_add_lshl_u32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_add_lshl_u32 v5, 0.5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xf0,0xfa,0xc0,0x03]
+
+v_add_lshl_u32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x47,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_add_lshl_u32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x47,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_add_nc_i16 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_nc_i16 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0xff,0xff,0x03,0x00]
+
+v_add_nc_i16 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x01,0x04,0x00,0x00]
+
+v_add_nc_i16 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x69,0xd2,0x00,0x00]
+
+v_add_nc_i16 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_add_nc_i16 v5, vcc_hi, 0xfe0b
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+
+v_add_nc_i16 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_add_nc_i16 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_add_nc_i16 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7e,0x82,0x01,0x00]
+
+v_add_nc_i16 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_add_nc_i16 v5, null, exec_lo op_sel:[1,1,1]
+// GFX11: encoding: [0x05,0x58,0x0d,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_add_nc_i16 v5, -1, exec_hi op_sel:[0,0,0]
+// GFX11: encoding: [0x05,0x00,0x0d,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_add_nc_i16 v5, 0.5, m0 op_sel:[1,0,0]
+// GFX11: encoding: [0x05,0x08,0x0d,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_add_nc_i16 v5, src_scc, vcc_lo op_sel:[0,1,0]
+// GFX11: encoding: [0x05,0x10,0x0d,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_add_nc_i16 v255, 0xfe0b, vcc_hi op_sel:[0,0,1] clamp
+// GFX11: encoding: [0xff,0xc0,0x0d,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_add_nc_i32 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_nc_i32 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xff,0xff,0x03,0x00]
+
+v_add_nc_i32 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x01,0x04,0x00,0x00]
+
+v_add_nc_i32 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x69,0xd2,0x00,0x00]
+
+v_add_nc_i32 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_add_nc_i32 v5, vcc_hi, 0xaf123456
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x6b,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_nc_i32 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_add_nc_i32 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_add_nc_i32 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7e,0x82,0x01,0x00]
+
+v_add_nc_i32 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_add_nc_i32 v5, null, exec_lo
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_add_nc_i32 v5, -1, exec_hi
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_add_nc_i32 v5, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_add_nc_i32 v5, src_scc, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x26,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_add_nc_i32 v255, 0xaf123456, vcc_hi clamp
+// GFX11: encoding: [0xff,0x80,0x26,0xd7,0xff,0xd6,0x00,0x00,0x56,0x34,0x12,0xaf]
+
+v_add_nc_u16 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x01,0x05,0x02,0x00]
+
+v_add_nc_u16 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0xff,0xff,0x03,0x00]
+
+v_add_nc_u16 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x01,0x04,0x00,0x00]
+
+v_add_nc_u16 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x69,0xd2,0x00,0x00]
+
+v_add_nc_u16 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_add_nc_u16 v5, vcc_hi, 0xfe0b
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+
+v_add_nc_u16 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_add_nc_u16 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_add_nc_u16 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7e,0x82,0x01,0x00]
+
+v_add_nc_u16 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_add_nc_u16 v5, null, exec_lo op_sel:[1,1,1]
+// GFX11: encoding: [0x05,0x58,0x03,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_add_nc_u16 v5, -1, exec_hi op_sel:[0,0,0]
+// GFX11: encoding: [0x05,0x00,0x03,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_add_nc_u16 v5, 0.5, m0 op_sel:[1,0,0]
+// GFX11: encoding: [0x05,0x08,0x03,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_add_nc_u16 v5, src_scc, vcc_lo op_sel:[0,1,0]
+// GFX11: encoding: [0x05,0x10,0x03,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_add_nc_u16 v255, 0xfe0b, vcc_hi op_sel:[0,0,1] clamp
+// GFX11: encoding: [0xff,0xc0,0x03,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_alignbit_b32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x01,0x05,0x0e,0x00]
+
+v_alignbit_b32 v5, v255, s2, s3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xff,0x05,0x0c,0x00]
+
+v_alignbit_b32 v5, s1, v255, s3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x01,0xfe,0x0f,0x00]
+
+v_alignbit_b32 v5, s105, s105, s105
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x69,0xd2,0xa4,0x01]
+
+v_alignbit_b32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_alignbit_b32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_alignbit_b32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_alignbit_b32 v5, m0, 0.5, exec_lo
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7d,0xe0,0xf9,0x01]
+
+v_alignbit_b32 v5, exec_lo, -1, m0
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7e,0x82,0xf5,0x01]
+
+v_alignbit_b32 v5, exec_hi, null, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7f,0xf8,0xac,0x01]
+
+v_alignbit_b32 v5, null, exec_lo, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0x7c,0xfc,0xa8,0x01]
+
+v_alignbit_b32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_alignbit_b32 v5, 0.5, m0, exec_hi
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xf0,0xfa,0xfc,0x01]
+
+v_alignbit_b32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x16,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_alignbit_b32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x16,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_alignbyte_b32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x01,0x05,0x0e,0x00]
+
+v_alignbyte_b32 v5, v255, s2, s3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xff,0x05,0x0c,0x00]
+
+v_alignbyte_b32 v5, s1, v255, s3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x01,0xfe,0x0f,0x00]
+
+v_alignbyte_b32 v5, s105, s105, s105
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x69,0xd2,0xa4,0x01]
+
+v_alignbyte_b32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_alignbyte_b32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_alignbyte_b32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_alignbyte_b32 v5, m0, 0.5, exec_lo
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7d,0xe0,0xf9,0x01]
+
+v_alignbyte_b32 v5, exec_lo, -1, m0
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7e,0x82,0xf5,0x01]
+
+v_alignbyte_b32 v5, exec_hi, null, vcc_hi
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7f,0xf8,0xac,0x01]
+
+v_alignbyte_b32 v5, null, exec_lo, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0x7c,0xfc,0xa8,0x01]
+
+v_alignbyte_b32 v5, -1, exec_hi, src_scc
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xc1,0xfe,0xf4,0x03]
+
+v_alignbyte_b32 v5, 0.5, m0, exec_hi
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xf0,0xfa,0xfc,0x01]
+
+v_alignbyte_b32 v5, src_scc, vcc_lo, -1
+// GFX11: encoding: [0x05,0x00,0x17,0xd6,0xfd,0xd4,0x04,0x03]
+
+v_alignbyte_b32 v255, 0xaf123456, vcc_hi, null
+// GFX11: encoding: [0xff,0x00,0x17,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
+
+v_and_b16 v5, v1, v2
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x01,0x05,0x02,0x00]
+
+v_and_b16 v5, v255, v255
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xff,0xff,0x03,0x00]
+
+v_and_b16 v5, s1, s2
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x01,0x04,0x00,0x00]
+
+v_and_b16 v5, s105, s105
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x69,0xd2,0x00,0x00]
+
+v_and_b16 v5, vcc_lo, ttmp15
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x6a,0xf6,0x00,0x00]
+
+v_and_b16 v5, vcc_hi, 0xfe0b
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+
+v_and_b16 v5, ttmp15, src_scc
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7b,0xfa,0x01,0x00]
+
+v_and_b16 v5, m0, 0.5
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7d,0xe0,0x01,0x00]
+
+v_and_b16 v5, exec_lo, -1
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7e,0x82,0x01,0x00]
+
+v_and_b16 v5, exec_hi, null
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7f,0xf8,0x00,0x00]
+
+v_and_b16 v5, null, exec_lo
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0x7c,0xfc,0x00,0x00]
+
+v_and_b16 v5, -1, exec_hi
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xc1,0xfe,0x00,0x00]
+
+v_and_b16 v5, 0.5, m0
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xf0,0xfa,0x00,0x00]
+
+v_and_b16 v5, src_scc, vcc_lo
+// GFX11: encoding: [0x05,0x00,0x62,0xd7,0xfd,0xd4,0x00,0x00]
+
+v_and_b16 v255, 0xfe0b, vcc_hi
+// GFX11: encoding: [0xff,0x00,0x62,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_and_or_b32 v5, v1, v2, s3
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x01,0x05,0x0e,0x00]
+
+v_and_or_b32 v5, v255, s2, s105
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0xff,0x05,0xa4,0x01]
+
+v_and_or_b32 v5, s1, v255, exec_hi
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x01,0xfe,0xff,0x01]
+
+v_and_or_b32 v5, s105, s105, exec_lo
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x69,0xd2,0xf8,0x01]
+
+v_and_or_b32 v5, vcc_lo, ttmp15, v3
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x6a,0xf6,0x0c,0x04]
+
+v_and_or_b32 v5, vcc_hi, 0xaf123456, v255
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x6b,0xfe,0xfd,0x07,0x56,0x34,0x12,0xaf]
+
+v_and_or_b32 v5, ttmp15, src_scc, ttmp15
+// GFX11: encoding: [0x05,0x00,0x57,0xd6,0x7b,0xfa,0xed,0x01]
+
+v_and_or_b32 v5, m0, 0.5, m0
+//...
[truncated]

@broxigarchen broxigarchen force-pushed the main-merge-true16-vop3-dup-testfile branch from b5c209e to e31b12e Compare September 23, 2024 21:19
kosarev
kosarev reviewed Sep 24, 2024
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llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16-fake16.s
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize32,-real-true16 %s 2>&1 | FileCheck --check-prefixes=GFX12-ERR,W32-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64,-real-true16 %s 2>&1 | FileCheck --check-prefixes=GFX12-ERR,W64-ERR --implicit-check-not=error: %s

v_add3_u32_e64_dpp v5, v1, v2, v3 quad_perm:[3,2,1,0]
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*-fake16 tests are normally supposed to only contain True16 instructions?

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@broxigarchen broxigarchen Sep 24, 2024 •
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Hi Ivan, I think it's better to remove the non-true16 instructions from the fake16 file to remove duplicated test line. But since these fake16 test files will be removed finally so I think it will not worth to maintain them at this moment. What do you think?

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I think it does provide some additional code coverage to test the non-16-bit instructions in both real16 and fake16 modes. We can fully test both paths. But it is a small amount of additional coverage.

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Keeping the non-True16 instructions would double the work updating them, and I'm not sure how much value there is in testing that they are not affected by the real-true16 attribute. I think I'd prefer to not have them, but don't insist.

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I am Ok with both. I want to get this patch in first since it's a bit blocking. The previous patch adding fake16 files do not remove the non-16-bit instructions either. So if we want to remove it I guess I will do it altogether in another patch.

I will wait to see other people's opinion on this thread

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It exists in the gfx12_asm_vop3_dpp16.s already. IMHO it is better to remove it from t16 tests.

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It seems more people want to remove the non-16-bit from the test file. Since there are more files with this same problem, I will first push this and open another PR to remove them altogether

@broxigarchen broxigarchen merged commit 9830156 into llvm:main Sep 24, 2024
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