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[FMV][AArch64] Unify features ssbs and ssbs2. #110297

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Merged
merged 4 commits into from
Oct 7, 2024
Merged

[FMV][AArch64] Unify features ssbs and ssbs2. #110297

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82047dc
[FMV][AArch64] Unify features ssbs and ssbs2.
labrinea Sep 27, 2024
ba28329
Merge branch 'main' into fmv-unify-ssbs
labrinea Sep 30, 2024
3b0b77f
Merge branch 'main' into fmv-unify-ssbs
labrinea Oct 3, 2024
596e17c
Merge branch 'main' into fmv-unify-ssbs
labrinea Oct 7, 2024
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7 changes: 2 additions & 5 deletions clang/test/CodeGen/aarch64-fmv-dependencies.c
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Expand Up @@ -135,12 +135,9 @@ __attribute__((target_version("sme-i16i64"))) int fmv(void) { return 0; }
// CHECK: define dso_local i32 @fmv._Msme2() #[[sme2:[0-9]+]] {
__attribute__((target_version("sme2"))) int fmv(void) { return 0; }

// CHECK: define dso_local i32 @fmv._Mssbs() #[[ATTR0:[0-9]+]] {
// CHECK: define dso_local i32 @fmv._Mssbs() #[[ssbs:[0-9]+]] {
__attribute__((target_version("ssbs"))) int fmv(void) { return 0; }

// CHECK: define dso_local i32 @fmv._Mssbs2() #[[ssbs2:[0-9]+]] {
__attribute__((target_version("ssbs2"))) int fmv(void) { return 0; }

// CHECK: define dso_local i32 @fmv._Msve() #[[sve:[0-9]+]] {
__attribute__((target_version("sve"))) int fmv(void) { return 0; }

Expand Down Expand Up @@ -219,7 +216,7 @@ int caller() {
// CHECK: attributes #[[sme_f64f64]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+sme,+sme-f64f64,+v8a"
// CHECK: attributes #[[sme_i16i64]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+sme,+sme-i16i64,+v8a"
// CHECK: attributes #[[sme2]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+sme,+sme2,+v8a"
// CHECK: attributes #[[ssbs2]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+ssbs,+v8a"
// CHECK: attributes #[[ssbs]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+ssbs,+v8a"
// CHECK: attributes #[[sve]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a"
// CHECK: attributes #[[sve_bf16_ebf16]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a"
// CHECK: attributes #[[sve_i8mm]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+i8mm,+neon,+outline-atomics,+sve,+v8a"
Expand Down
103 changes: 52 additions & 51 deletions clang/test/CodeGen/attr-target-version.c
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10 changes: 5 additions & 5 deletions clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
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Expand Up @@ -173,8 +173,8 @@ void run_foo_tml() {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 36310271995674624
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 36310271995674624
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 36591746972385280
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 36591746972385280
// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
// CHECK-NEXT: br i1 [[TMP3]], label %[[RESOLVER_RETURN:.*]], label %[[RESOLVER_ELSE:.*]]
// CHECK: [[RESOLVER_RETURN]]:
Expand Down Expand Up @@ -222,8 +222,8 @@ void run_foo_tml() {
// CHECK-NEXT: [[RESOLVER_ENTRY:.*:]]
// CHECK-NEXT: call void @__init_cpu_features_resolver()
// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 36310271995674624
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 36310271995674624
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 36591746972385280
// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 36591746972385280
// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
// CHECK-NEXT: br i1 [[TMP3]], label %[[RESOLVER_RETURN:.*]], label %[[RESOLVER_ELSE:.*]]
// CHECK: [[RESOLVER_RETURN]]:
Expand All @@ -243,7 +243,7 @@ void run_foo_tml() {
// CHECK: attributes #[[ATTR0]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+ls64,+neon" }
// CHECK: attributes #[[ATTR1]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
// CHECK: attributes #[[ATTR2]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fptoint" }
// CHECK: attributes #[[ATTR3]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+sme,+sme-f64f64" }
// CHECK: attributes #[[ATTR3]] = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+sme,+sme-f64f64,+ssbs" }
//.
// CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
// CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"}
Expand Down
5 changes: 1 addition & 4 deletions clang/test/Sema/attr-target-clones-aarch64.c
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Expand Up @@ -4,8 +4,6 @@ void __attribute__((target_clones("fp16+sve2-aes", "sb+sve2-sha3+rcpc3+mops", "r

// expected-warning@+1 {{unsupported 'default' in the 'target_clones' attribute string; 'target_clones' attribute ignored}}
void __attribute__((target_clones("default+sha3"))) warn1(void);
// expected-warning@+1 {{version list contains entries that don't impact code generation}}
void __attribute__((target_clones("ssbs"))) warn2(void);

// expected-error@+2 {{'target_clones' and 'target_version' attributes are not compatible}}
// expected-note@+1 {{conflicting attribute is here}}
Expand Down Expand Up @@ -49,7 +47,6 @@ int __attribute__((target_clones("fp", "fp", "crc+dotprod", "dotprod+crc"))) dup

// expected-warning@+1 {{version list contains duplicate entries}}
int __attribute__((target_clones("fp16+memtag", "memtag+fp16"))) dup6(void) { return 6; }
int __attribute__((target_clones("simd+ssbs2", "simd+dpb2"))) dup7(void) { return 7; }

// expected-warning@+1 {{unsupported '' in the 'target_clones' attribute string;}}
void __attribute__((target_clones(""))) empty_target_1(void);
Expand Down Expand Up @@ -79,6 +76,6 @@ int useage(void) {
return mv_after_use();
}
// expected-error@+1 {{function declaration cannot become a multiversioned function after first usage}}
int __attribute__((target_clones("sve2-sha3+ssbs2", "sm4"))) mv_after_use(void) { return 1; }
int __attribute__((target_clones("sve2-sha3+ssbs", "sm4"))) mv_after_use(void) { return 1; }
// expected-error@+1 {{'main' cannot be a multiversioned function}}
int __attribute__((target_clones("sve-i8mm"))) main() { return 1; }
4 changes: 2 additions & 2 deletions clang/test/SemaCXX/attr-target-version.cpp
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Expand Up @@ -99,10 +99,10 @@ __attribute__((target_version("jscvt"))) void Decl();

class Out { // #defined-here
int __attribute__((target_version("bti"))) func(void);
int __attribute__((target_version("ssbs2"))) func(void);
int __attribute__((target_version("ssbs"))) func(void);
};
int __attribute__((target_version("bti"))) Out::func(void) { return 1; }
int __attribute__((target_version("ssbs2"))) Out::func(void) { return 2; }
int __attribute__((target_version("ssbs"))) Out::func(void) { return 2; }
// expected-error@+4 {{out-of-line definition of 'func' does not match any declaration in 'Out'}}
// expected-note@-2 {{member declaration nearly matches}}
// expected-note@-4 {{member declaration nearly matches}}
Expand Down
2 changes: 1 addition & 1 deletion compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
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Expand Up @@ -70,7 +70,7 @@ enum CPUFeatures {
FEAT_MEMTAG3,
FEAT_SB,
FEAT_PREDRES,
FEAT_SSBS,
RESERVED_FEAT_SSBS, // previously used and now ABI legacy
FEAT_SSBS2,
FEAT_BTI,
RESERVED_FEAT_LS64, // previously used and now ABI legacy
Expand Down
4 changes: 0 additions & 4 deletions compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
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Expand Up @@ -31,10 +31,6 @@ static bool isKnownAndSupported(const char *name) {
}

static uint64_t deriveImplicitFeatures(uint64_t features) {
// FEAT_SSBS2 implies FEAT_SSBS
if ((1ULL << FEAT_SSBS2) & features)
features |= (1ULL << FEAT_SSBS);

// FEAT_FP is always enabled
features |= (1ULL << FEAT_FP);

Expand Down
4 changes: 1 addition & 3 deletions compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
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Expand Up @@ -43,10 +43,8 @@ static void __init_cpu_features_constructor(unsigned long hwcap,
setCPUFeature(FEAT_FCMA);
if (hwcap & HWCAP_SB)
setCPUFeature(FEAT_SB);
if (hwcap & HWCAP_SSBS) {
setCPUFeature(FEAT_SSBS);
if (hwcap & HWCAP_SSBS)
setCPUFeature(FEAT_SSBS2);
}
if (hwcap2 & HWCAP2_MTE) {
setCPUFeature(FEAT_MEMTAG);
setCPUFeature(FEAT_MEMTAG2);
Expand Down
2 changes: 1 addition & 1 deletion llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
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Expand Up @@ -70,7 +70,7 @@ enum CPUFeatures {
FEAT_MEMTAG3,
FEAT_SB,
FEAT_PREDRES,
FEAT_SSBS,
RESERVED_FEAT_SSBS, // previously used and now ABI legacy
FEAT_SSBS2,
FEAT_BTI,
RESERVED_FEAT_LS64, // previously used and now ABI legacy
Expand Down
3 changes: 1 addition & 2 deletions llvm/lib/Target/AArch64/AArch64FMV.td
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Expand Up @@ -81,8 +81,7 @@ def : FMVExtension<"sme", "FEAT_SME", "+sme,+bf16", 430>;
def : FMVExtension<"sme-f64f64", "FEAT_SME_F64", "+sme,+sme-f64f64,+bf16", 560>;
def : FMVExtension<"sme-i16i64", "FEAT_SME_I64", "+sme,+sme-i16i64,+bf16", 570>;
def : FMVExtension<"sme2", "FEAT_SME2", "+sme2,+sme,+bf16", 580>;
def : FMVExtension<"ssbs", "FEAT_SSBS", "", 490>;
def : FMVExtension<"ssbs2", "FEAT_SSBS2", "+ssbs", 500>;
def : FMVExtension<"ssbs", "FEAT_SSBS2", "+ssbs", 490>;
def : FMVExtension<"sve", "FEAT_SVE", "+sve,+fullfp16,+fp-armv8,+neon", 310>;
def : FMVExtension<"sve-bf16", "FEAT_SVE_BF16", "+sve,+bf16,+fullfp16,+fp-armv8,+neon", 320>;
def : FMVExtension<"sve-ebf16", "FEAT_SVE_EBF16", "+sve,+bf16,+fullfp16,+fp-armv8,+neon", 330>;
Expand Down
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