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[InstCombine] Fold zext(X) + C2 pred C -> X + C3 pred C4 #110511

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Merged
merged 5 commits into from
Nov 21, 2024
Merged

[InstCombine] Fold zext(X) + C2 pred C -> X + C3 pred C4 #110511

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4b7a438
[InstCombine] Add pre-commit tests. NFC.
dtcxzyw Sep 30, 2024
cd86ab2
[InstCombine] Fold `zext(X) + C2 u< C -> X + trunc(C2) u< trunc(C)`
dtcxzyw Sep 30, 2024
6b5d6c9
[InstCombine] Convert to using ConstantRange API
dtcxzyw Oct 6, 2024
f86d2bc
[InstCombine] Address review comments. NFC.
dtcxzyw Nov 21, 2024
ec1a880
[InstCombine] Add negative tests. NFC.
dtcxzyw Nov 21, 2024
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24 changes: 24 additions & 0 deletions llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3183,6 +3183,30 @@ Instruction *InstCombinerImpl::foldICmpAddConstant(ICmpInst &Cmp,
Builder.CreateAdd(X, ConstantInt::get(Ty, *C2 - C - 1)),
ConstantInt::get(Ty, ~C));

// zext(V) + C2 pred C -> V + C3 pred' C4
Value *V;
if (match(X, m_ZExt(m_Value(V)))) {
Type *NewCmpTy = V->getType();
unsigned CmpBW = Ty->getScalarSizeInBits();
unsigned NewCmpBW = NewCmpTy->getScalarSizeInBits();
if (shouldChangeType(Ty, NewCmpTy)) {
if (CR.getActiveBits() <= NewCmpBW) {
ConstantRange SrcCR = CR.truncate(NewCmpBW);
CmpInst::Predicate EquivPred;
APInt EquivInt;
APInt EquivOffset;

SrcCR.getEquivalentICmp(EquivPred, EquivInt, EquivOffset);
return new ICmpInst(
EquivPred,
EquivOffset.isZero()
? V
: Builder.CreateAdd(V, ConstantInt::get(NewCmpTy, EquivOffset)),
ConstantInt::get(NewCmpTy, EquivInt));
}
}
}

return nullptr;
}

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106 changes: 106 additions & 0 deletions llvm/test/Transforms/InstCombine/icmp-add.ll
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Expand Up @@ -3183,3 +3183,109 @@ define i1 @icmp_of_ucmp_plus_const_with_const(i32 %x, i32 %y) {
%cmp2 = icmp ult i8 %add, 2
ret i1 %cmp2
}

define i1 @zext_range_check_ult(i8 %x) {
; CHECK-LABEL: @zext_range_check_ult(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[X:%.*]], -4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP0]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%conv = zext i8 %x to i32
%add = add i32 %conv, -4
%cmp = icmp ult i32 %add, 3
ret i1 %cmp
}

; TODO: should be canonicalized to (x - 4) u> 2
define i1 @zext_range_check_ugt(i8 %x) {
; CHECK-LABEL: @zext_range_check_ugt(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i32 [[CONV]], -7
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP0]], -3
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%conv = zext i8 %x to i32
%add = add i32 %conv, -4
%cmp = icmp ugt i32 %add, 2
ret i1 %cmp
}

; TODO: should be canonicalized to (x - 4) u> 2
define i1 @zext_range_check_ult_alter(i8 %x) {
; CHECK-LABEL: @zext_range_check_ult_alter(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], -7
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], -3
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%conv = zext i8 %x to i32
%add = add i32 %conv, -7
%cmp = icmp ult i32 %add, -3
ret i1 %cmp
}

define i1 @zext_range_check_mergable(i8 %x) {
; CHECK-LABEL: @zext_range_check_mergable(
; CHECK-NEXT: [[COND:%.*]] = icmp slt i8 [[X:%.*]], 7
; CHECK-NEXT: ret i1 [[COND]]
;
%conv = zext i8 %x to i32
%add = add nsw i32 %conv, -4
%cmp1 = icmp ult i32 %add, 3
%cmp2 = icmp slt i8 %x, 4
%cond = select i1 %cmp2, i1 true, i1 %cmp1
ret i1 %cond
}

; Negative tests

define i1 @sext_range_check_ult(i8 %x) {
; CHECK-LABEL: @sext_range_check_ult(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[X:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], -4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%conv = sext i8 %x to i32
%add = add i32 %conv, -4
%cmp = icmp ult i32 %add, 3
ret i1 %cmp
}

define i1 @zext_range_check_ult_illegal_type(i7 %x) {
; CHECK-LABEL: @zext_range_check_ult_illegal_type(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = zext i7 [[X:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], -4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 3
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%conv = zext i7 %x to i32
%add = add i32 %conv, -4
%cmp = icmp ult i32 %add, 3
ret i1 %cmp
}

define i1 @zext_range_check_ult_range_check_failure(i8 %x) {
; CHECK-LABEL: @zext_range_check_ult_range_check_failure(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[X:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], -4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[ADD]], 253
; CHECK-NEXT: ret i1 [[CMP]]
;
entry:
%conv = zext i8 %x to i32
%add = add i32 %conv, -4
%cmp = icmp ult i32 %add, 253
ret i1 %cmp
}
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