[MLIR][ROCDL] Added SchedGroupBarrier and IglpOpt ops
#112237
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@llvm/pr-subscribers-mlir-llvm @llvm/pr-subscribers-mlir Author: None (ravil-mobile) ChangesFull diff: https://github.com/llvm/llvm-project/pull/112237.diff 1 Files Affected:
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index b80d9ae88910c4..c40ae4b1016b49 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -297,6 +297,24 @@ def ROCDL_SchedBarrier : ROCDL_IntrOp<"sched.barrier", [], [], [], 0>,
"createIntrinsicCall(builder, llvm::Intrinsic::amdgcn_sched_barrier,builder.getInt32(op.getMask()));";
}
+def ROCDL_SchedGroupBarrier : ROCDL_IntrOp<"sched.group.barrier", [], [], [], 0>,
+ Arguments<(ins I32Attr:$mask, I32Attr:$size, I32Attr:$groupId)> {
+ let results = (outs);
+ let assemblyFormat = "$mask `,` $size `,` $groupId attr-dict";
+ string llvmBuilder = [{
+ createIntrinsicCall(builder,
+ llvm::Intrinsic::amdgcn_sched_group_barrier,
+ {builder.getInt32(op.getMask()), builder.getInt32(op.getSize()), builder.getInt32(op.getGroupId())});
+ }];
+}
+
+def ROCDL_IglpOpt : ROCDL_IntrOp<"iglp.opt", [], [], [], 0>,
+ Arguments<(ins I32Attr:$variant)> {
+ let results = (outs);
+ let assemblyFormat = "$variant attr-dict";
+ string llvmBuilder =
+ "createIntrinsicCall(builder, llvm::Intrinsic::amdgcn_iglp_opt,builder.getInt32(op.getVariant()));";
+}
//===---------------------------------------------------------------------===//
// Xdlops intrinsics
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Hi @ravil-mobile , could you add the minimal tests as done for the other intrinsics? |
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Also, could you add a more descriptive message to this PR? |
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@ravil-mobile thanks for the PR! and intrinsic builders seems correct to me. |
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cc: @arsenm |
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Currently, the ROCDL dialect contains only `rocdl.sched.barrier` op. This commit adds missing `sched.group.barrier` and `rocdl.iglp.opt` ops. The ops are converted to the corresponding intrinsic calls during the translation from MLIR to LLVM IRs. This intrinsics are hints to the instruction scheduler of the AMDGPU backend.
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Let's wait for @arsenm's approval to merge |
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This PR adds missing `sched.group.barrier` and `rocdl.iglp.opt` ops to the ROCDL dialect (see [here](https://github.com/llvm/llvm-project/blob/ec78f0da0e9b1b8e2b2323e434ea742e272dd913/clang/include/clang/Basic/BuiltinsAMDGPU.def#L66-L68)). The ops are converted to the corresponding intrinsic calls during the translation from MLIR to LLVM IRs. This intrinsics are hints to the instruction scheduler of the AMDGPU backend.
Upgrading LLVM to pick up the following changes for AMD backend: * llvm/llvm-project#112237 Changes made: - changed the signature of `visit` method in `ConstantAnalysis` - i.e., accepts an instance of the `ProgramPoint`. - updated calls to `getLatticeElementFor` -i.e., accepts an instance of the `ProgramPoint`. - added the required last parameter to `LLVM::DISubprogramAttr::get` - i.e., an empty `annotations`.
Upgrading LLVM to pick up the following changes for AMD backend: * llvm/llvm-project#112237 Changes made: - changed the signature of `visit` method in `ConstantAnalysis` - i.e., accepts an instance of the `ProgramPoint`. - updated calls to `getLatticeElementFor` -i.e., accepts an instance of the `ProgramPoint`. - added the required last parameter to `LLVM::DISubprogramAttr::get` - i.e., an empty `annotations`.
Upgrading LLVM to pick up the following changes for AMD backend: * llvm/llvm-project#112237 Changes made: - changed the signature of `visit` method in `ConstantAnalysis` - i.e., accepts an instance of the `ProgramPoint`. - updated calls to `getLatticeElementFor` -i.e., accepts an instance of the `ProgramPoint`. - added the required last parameter to `LLVM::DISubprogramAttr::get` - i.e., an empty `annotations`.
Upgrading LLVM to pick up the following changes for AMD backend: * llvm/llvm-project#112237 Changes made: - changed the signature of `visit` method in `ConstantAnalysis` - i.e., accepts an instance of the `ProgramPoint`. - updated calls to `getLatticeElementFor` -i.e., accepts an instance of the `ProgramPoint`. - added the required last parameter to `LLVM::DISubprogramAttr::get` - i.e., an empty `annotations`.
This PR adds missing
sched.group.barrierandrocdl.iglp.optops to the ROCDL dialect (see here). The ops are converted to the corresponding intrinsic calls during the translation from MLIR to LLVM IRs. This intrinsics are hints to the instruction scheduler of the AMDGPU backend.