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[InstCombine] Set samesign when converting signed predicates into unsigned #112642

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Oct 17, 2024
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[InstCombine] Set samesign when converting signed predicates into unsigned #112642

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[InstCombine] Set `samesign` when converting signed predicates into u…
dtcxzyw Oct 17, 2024
961abf9
[InstCombine] Set `samesign` for unsigned predicates
dtcxzyw Oct 17, 2024
bd7ac7f
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dtcxzyw Oct 17, 2024
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12 changes: 8 additions & 4 deletions llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
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Expand Up @@ -6771,11 +6771,15 @@ Instruction *InstCombinerImpl::foldICmpUsingKnownBits(ICmpInst &I) {
}

// Turn a signed comparison into an unsigned one if both operands are known to
// have the same sign.
if (I.isSigned() &&
// have the same sign. Set samesign if possible (except for equality
// predicates).
if ((I.isSigned() || (I.isUnsigned() && !I.hasSameSign())) &&
((Op0Known.Zero.isNegative() && Op1Known.Zero.isNegative()) ||
(Op0Known.One.isNegative() && Op1Known.One.isNegative())))
return new ICmpInst(I.getUnsignedPredicate(), Op0, Op1);
(Op0Known.One.isNegative() && Op1Known.One.isNegative()))) {
I.setPredicate(I.getUnsignedPredicate());
I.setSameSign();
return &I;
}

return nullptr;
}
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Analysis/ValueTracking/non-negative-phi-bits.ll
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Expand Up @@ -8,7 +8,7 @@ define void @test() #0 {
; CHECK: for.body:
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ult i64 [[INDVARS_IV]], 39
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp samesign ult i64 [[INDVARS_IV]], 39
; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]]
; CHECK: for.end:
; CHECK-NEXT: ret void
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/call-guard.ll
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Expand Up @@ -43,7 +43,7 @@ define void @test_guard_adjacent_diff_cond2(i32 %V1, i32 %V2) {
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[V1:%.*]], [[V2:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: [[AND:%.*]] = and i32 [[V1]], 255
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[AND]], 129
; CHECK-NEXT: [[C:%.*]] = icmp samesign ult i32 [[AND]], 129
; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[C]]
; CHECK-NEXT: call void (i1, ...) @llvm.experimental.guard(i1 [[TMP3]], i32 123) [ "deopt"() ]
; CHECK-NEXT: ret void
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2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/cast_phi.ll
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@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
; RUN: opt < %s -passes="instcombine<no-verify-fixpoint>" -S | FileCheck %s
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What's the issue here?

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In function trunc_in_loop_exit_block:


define i8 @trunc_in_loop_exit_block() {
; CHECK-LABEL: @trunc_in_loop_exit_block(
; CHECK-NEXT:  entry:
; CHECK-NEXT:    br label [[LOOP:%.*]]
; CHECK:       loop:
; CHECK-NEXT:    [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT:    [[PHI:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[IV_NEXT]], [[LOOP_LATCH]] ]
; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ult i32 [[IV]], 100
; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP_LATCH]], label [[EXIT:%.*]]
; CHECK:       loop.latch:
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT:    br label [[LOOP]]
; CHECK:       exit:
; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i32 [[PHI]] to i8
; CHECK-NEXT:    ret i8 [[TRUNC]]
;
entry:
  br label %loop

loop:
  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
  %phi = phi i32 [ 1, %entry ], [ %iv.next, %loop.latch ]
  %cmp = icmp ult i32 %iv, 100
  br i1 %cmp, label %loop.latch, label %exit

loop.latch:
  %iv.next = add i32 %iv, 1
  br label %loop

exit:
  %trunc = trunc i32 %phi to i8
  ret i8 %trunc
}

%iv u< 100 -> infer nsw/nuw for %iv.next = add i32 %iv, 1
-> %iv is non-negative -> infer samesign for %cmp = icmp ult i32 %iv, 100.

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I see. This is a bit of recurring problem, may be worthwhile to add a special case at some point to revisit phi users if we add nuw to a recurrence add.

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I'm also wondering if it would make sense to add an "instcombine-no-verify-fixpoint" function attribute, so that we can mark a single function instead of a whole file. This makes it easier to see which function is problematic and also avoids disabling verification for many unrelated tests...


target datalayout = "n32:64"

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4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
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Expand Up @@ -386,7 +386,7 @@ define i1 @cttz_ugt_other_multiuse_i33(i33 %x, ptr %p) {
; CHECK-LABEL: @cttz_ugt_other_multiuse_i33(
; CHECK-NEXT: [[TZ:%.*]] = tail call range(i33 0, 34) i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false)
; CHECK-NEXT: store i33 [[TZ]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[TZ]], 16
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i33 [[TZ]], 16
; CHECK-NEXT: ret i1 [[CMP]]
;
%tz = tail call i33 @llvm.cttz.i33(i33 %x, i1 false)
Expand Down Expand Up @@ -430,7 +430,7 @@ define <2 x i1> @cttz_ult_other_multiuse_v2i32(<2 x i32> %x, ptr %p) {
; CHECK-LABEL: @cttz_ult_other_multiuse_v2i32(
; CHECK-NEXT: [[TZ:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
; CHECK-NEXT: store <2 x i32> [[TZ]], ptr [[P:%.*]], align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TZ]], <i32 16, i32 16>
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult <2 x i32> [[TZ]], <i32 16, i32 16>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%tz = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 false)
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
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Expand Up @@ -160,7 +160,7 @@ define i1 @fold_cmp_ult_ctpop_c(i8 %x, i8 %y, i1 %cond) {
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 -16, [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i8 [[X:%.*]], i8 [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP2]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[TMP3]], 3
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i8 [[TMP3]], 3
; CHECK-NEXT: ret i1 [[R]]
;
%nx = xor i8 %x, -1
Expand All @@ -176,7 +176,7 @@ define i1 @fold_cmp_sle_ctpop_c(i8 %x, i8 %y, i1 %cond) {
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 -16, [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i8 [[X:%.*]], i8 [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP2]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[TMP3]], 4
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i8 [[TMP3]], 4
; CHECK-NEXT: ret i1 [[R]]
;
%nx = xor i8 %x, -1
Expand All @@ -191,7 +191,7 @@ define i1 @fold_cmp_ult_ctpop_c_no_not_inst_save_fail(i8 %x) {
; CHECK-LABEL: @fold_cmp_ult_ctpop_c_no_not_inst_save_fail(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -2
; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[NX]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[CNT]], 5
; CHECK-NEXT: [[R:%.*]] = icmp samesign ult i8 [[CNT]], 5
; CHECK-NEXT: ret i1 [[R]]
;
%nx = xor i8 %x, -2
Expand All @@ -203,7 +203,7 @@ define i1 @fold_cmp_ult_ctpop_c_no_not_inst_save_fail(i8 %x) {
define <2 x i1> @fold_cmp_ugt_ctpop_c(<2 x i8> %x) {
; CHECK-LABEL: @fold_cmp_ugt_ctpop_c(
; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 0, i8 2>
; CHECK-NEXT: [[R:%.*]] = icmp samesign ult <2 x i8> [[TMP1]], <i8 0, i8 2>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%nx = xor <2 x i8> %x, <i8 -1, i8 -1>
Expand All @@ -216,7 +216,7 @@ define <2 x i1> @fold_cmp_ugt_ctpop_c_out_of_range_fail(<2 x i8> %x) {
; CHECK-LABEL: @fold_cmp_ugt_ctpop_c_out_of_range_fail(
; CHECK-NEXT: [[NX:%.*]] = xor <2 x i8> [[X:%.*]], <i8 -1, i8 -1>
; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[NX]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[CNT]], <i8 2, i8 10>
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt <2 x i8> [[CNT]], <i8 2, i8 10>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%nx = xor <2 x i8> %x, <i8 -1, i8 -1>
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
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Expand Up @@ -118,7 +118,7 @@ define i32 @log2_ceil_idiom_x_may_be_zero(i32 %x) {
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 false)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i32 [[RET]]
Expand All @@ -139,7 +139,7 @@ define i4 @log2_ceil_idiom_trunc_too_short(i32 %x) {
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[CTLZ]] to i4
; CHECK-NEXT: [[XOR:%.*]] = xor i4 [[TRUNC]], -1
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i4
; CHECK-NEXT: [[RET:%.*]] = add i4 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i4 [[RET]]
Expand All @@ -160,7 +160,7 @@ define i32 @log2_ceil_idiom_mismatched_operands(i32 %x, i32 %y) {
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i32 [[RET]]
Expand All @@ -180,7 +180,7 @@ define i32 @log2_ceil_idiom_wrong_constant(i32 %x) {
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 30
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i32 [[RET]]
Expand Down Expand Up @@ -220,7 +220,7 @@ define i32 @log2_ceil_idiom_not_a_power2_test2(i32 %x) {
; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 2
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 2
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i32 [[RET]]
Expand All @@ -241,7 +241,7 @@ define i32 @log2_ceil_idiom_multiuse2(i32 %x) {
; CHECK-NEXT: call void @use32(i32 [[CTLZ]])
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i32 [[RET]]
Expand All @@ -263,7 +263,7 @@ define i32 @log2_ceil_idiom_multiuse3(i32 %x) {
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: call void @use32(i32 [[XOR]])
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i32 [[RET]]
Expand All @@ -286,7 +286,7 @@ define i5 @log2_ceil_idiom_trunc_multiuse4(i32 %x) {
; CHECK-NEXT: call void @use5(i5 [[TRUNC]])
; CHECK-NEXT: [[XOR:%.*]] = xor i5 [[TRUNC]], -1
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i5
; CHECK-NEXT: [[RET:%.*]] = add i5 [[XOR]], [[ZEXT]]
; CHECK-NEXT: ret i5 [[RET]]
Expand All @@ -310,7 +310,7 @@ define i64 @log2_ceil_idiom_zext_multiuse5(i32 %x) {
; CHECK-NEXT: [[EXT:%.*]] = zext nneg i32 [[XOR]] to i64
; CHECK-NEXT: call void @use64(i64 [[EXT]])
; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i64
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i64 [[EXT]], [[ZEXT]]
; CHECK-NEXT: ret i64 [[RET]]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
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Expand Up @@ -217,7 +217,7 @@ define float @gep_cross_loop(ptr %_arg_, ptr %_arg_3, float %_arg_8) {
; CHECK: for.cond.i:
; CHECK-NEXT: [[IDX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD11_I:%.*]], [[FOR_BODY_I:%.*]] ]
; CHECK-NEXT: [[SUM:%.*]] = phi float [ 0.000000e+00, [[ENTRY]] ], [ [[ADD_I:%.*]], [[FOR_BODY_I]] ]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX]], 17
; CHECK-NEXT: [[CMP:%.*]] = icmp samesign ult i64 [[IDX]], 17
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY_I]], label [[FOR_COND_I_I_I_PREHEADER:%.*]]
; CHECK: for.cond.i.i.i.preheader:
; CHECK-NEXT: ret float [[SUM]]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/InstCombine/icmp-mul-zext.ll
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Expand Up @@ -13,7 +13,7 @@ define i32 @sterix(i32, i8, i64) {
; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[MUL]], [[SH_PROM]]
; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[SHR]] to i64
; CHECK-NEXT: [[MUL3:%.*]] = mul nuw nsw i64 [[CONV]], [[CONV2]]
; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp ult i64 [[MUL3]], 4294967296
; CHECK-NEXT: [[TOBOOL_NOT:%.*]] = icmp samesign ult i64 [[MUL3]], 4294967296
; CHECK-NEXT: br i1 [[TOBOOL_NOT]], label [[LOR_RHS:%.*]], label [[LOR_END:%.*]]
; CHECK: lor.rhs:
; CHECK-NEXT: [[AND:%.*]] = and i64 [[TMP2]], [[MUL3]]
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/Transforms/InstCombine/icmp-mul.ll
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Expand Up @@ -849,7 +849,7 @@ define i1 @not_mul_of_bool(i32 %x, i8 %y) {
; CHECK-NEXT: [[Q:%.*]] = and i32 [[X:%.*]], 3
; CHECK-NEXT: [[Z:%.*]] = zext i8 [[Y:%.*]] to i32
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[Q]], [[Z]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[M]], 255
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i32 [[M]], 255
; CHECK-NEXT: ret i1 [[R]]
;
%q = and i32 %x, 3
Expand All @@ -866,7 +866,7 @@ define i1 @not_mul_of_bool_commute(i32 %x, i32 %y) {
; CHECK-NEXT: [[X30:%.*]] = lshr i32 [[X:%.*]], 30
; CHECK-NEXT: [[Y8:%.*]] = and i32 [[Y:%.*]], 255
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[Y8]], [[X30]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[M]], 255
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i32 [[M]], 255
; CHECK-NEXT: ret i1 [[R]]
;
%x30 = lshr i32 %x, 30
Expand Down Expand Up @@ -935,7 +935,7 @@ define i1 @not_mul_of_pow2(i32 %x, i8 %y) {
; CHECK-NEXT: [[Q:%.*]] = and i32 [[X:%.*]], 6
; CHECK-NEXT: [[Z:%.*]] = zext i8 [[Y:%.*]] to i32
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[Q]], [[Z]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[M]], 1530
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i32 [[M]], 1530
; CHECK-NEXT: ret i1 [[R]]
;
%q = and i32 %x, 6
Expand All @@ -952,7 +952,7 @@ define i1 @not_mul_of_pow2_commute(i32 %x, i32 %y) {
; CHECK-NEXT: [[X30:%.*]] = and i32 [[X:%.*]], 12
; CHECK-NEXT: [[Y8:%.*]] = and i32 [[Y:%.*]], 255
; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i32 [[Y8]], [[X30]]
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[M]], 3060
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i32 [[M]], 3060
; CHECK-NEXT: ret i1 [[R]]
;
%x30 = and i32 %x, 12
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
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Expand Up @@ -350,7 +350,7 @@ define i32 @not_pow2_32_nonconst_assume(i32 %x, i32 %y) {
define i32 @pow2_or_zero_32_nonconst_assume(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_or_zero_32_nonconst_assume(
; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp ult i32 [[CTPOP]], 2
; CHECK-NEXT: [[YP2:%.*]] = icmp samesign ult i32 [[CTPOP]], 2
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0
Expand Down Expand Up @@ -426,7 +426,7 @@ False:
define i32 @pow2_or_zero_32_nonconst_assume_br(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_or_zero_32_nonconst_assume_br(
; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp ult i32 [[CTPOP]], 2
; CHECK-NEXT: [[YP2:%.*]] = icmp samesign ult i32 [[CTPOP]], 2
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[AND]], 0
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/Transforms/InstCombine/icmp-of-trunc-ext.ll
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Expand Up @@ -70,7 +70,7 @@ define i1 @icmp_trunc_x_trunc_y_2_illegal_anyways(i33 %x, i63 %y) {
; CHECK-NEXT: call void @llvm.assume(i1 [[X_LB_ONLY]])
; CHECK-NEXT: call void @llvm.assume(i1 [[Y_LB_ONLY]])
; CHECK-NEXT: [[TMP1:%.*]] = zext nneg i33 [[X]] to i63
; CHECK-NEXT: [[R:%.*]] = icmp ult i63 [[Y]], [[TMP1]]
; CHECK-NEXT: [[R:%.*]] = icmp samesign ult i63 [[Y]], [[TMP1]]
; CHECK-NEXT: ret i1 [[R]]
;
%x_lb_only = icmp ult i33 %x, 512
Expand All @@ -90,7 +90,7 @@ define i1 @icmp_trunc_x_trunc_y_3(i64 %x, i32 %y) {
; CHECK-NEXT: call void @llvm.assume(i1 [[X_LB_ONLY]])
; CHECK-NEXT: call void @llvm.assume(i1 [[Y_LB_ONLY]])
; CHECK-NEXT: [[TMP1:%.*]] = trunc nuw nsw i64 [[X]] to i32
; CHECK-NEXT: [[R:%.*]] = icmp ule i32 [[Y]], [[TMP1]]
; CHECK-NEXT: [[R:%.*]] = icmp samesign ule i32 [[Y]], [[TMP1]]
; CHECK-NEXT: ret i1 [[R]]
;
%x_lb_only = icmp ult i64 %x, 123
Expand Down Expand Up @@ -152,7 +152,7 @@ define i1 @icmp_trunc_x_trunc_y_swap0(i33 %x, i32 %y) {
; CHECK-NEXT: call void @llvm.assume(i1 [[X_LB_ONLY]])
; CHECK-NEXT: call void @llvm.assume(i1 [[Y_LB_ONLY]])
; CHECK-NEXT: [[TMP1:%.*]] = trunc nuw nsw i33 [[X]] to i32
; CHECK-NEXT: [[R:%.*]] = icmp uge i32 [[Y]], [[TMP1]]
; CHECK-NEXT: [[R:%.*]] = icmp samesign uge i32 [[Y]], [[TMP1]]
; CHECK-NEXT: ret i1 [[R]]
;
%x_lb_only = icmp ult i33 %x, 65536
Expand All @@ -172,7 +172,7 @@ define i1 @icmp_trunc_x_trunc_y_swap1(i33 %x, i32 %y) {
; CHECK-NEXT: call void @llvm.assume(i1 [[X_LB_ONLY]])
; CHECK-NEXT: call void @llvm.assume(i1 [[Y_LB_ONLY]])
; CHECK-NEXT: [[TMP1:%.*]] = trunc nuw nsw i33 [[X]] to i32
; CHECK-NEXT: [[R:%.*]] = icmp ule i32 [[Y]], [[TMP1]]
; CHECK-NEXT: [[R:%.*]] = icmp samesign ule i32 [[Y]], [[TMP1]]
; CHECK-NEXT: ret i1 [[R]]
;
%x_lb_only = icmp ult i33 %x, 65536
Expand All @@ -190,7 +190,7 @@ define i1 @icmp_trunc_x_zext_y(i32 %x, i8 %y) {
; CHECK-NEXT: [[X_LB_ONLY:%.*]] = icmp ult i32 [[X:%.*]], 65536
; CHECK-NEXT: call void @llvm.assume(i1 [[X_LB_ONLY]])
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[Y:%.*]] to i32
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[X]], [[TMP1]]
; CHECK-NEXT: [[R:%.*]] = icmp samesign ugt i32 [[X]], [[TMP1]]
; CHECK-NEXT: ret i1 [[R]]
;
%x_lb_only = icmp ult i32 %x, 65536
Expand All @@ -206,7 +206,7 @@ define i1 @icmp_trunc_x_zext_y_2(i32 %x, i8 %y) {
; CHECK-NEXT: [[X_LB_ONLY:%.*]] = icmp ult i32 [[X:%.*]], 65536
; CHECK-NEXT: call void @llvm.assume(i1 [[X_LB_ONLY]])
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[Y:%.*]] to i32
; CHECK-NEXT: [[R:%.*]] = icmp ule i32 [[X]], [[TMP1]]
; CHECK-NEXT: [[R:%.*]] = icmp samesign ule i32 [[X]], [[TMP1]]
; CHECK-NEXT: ret i1 [[R]]
;
%x_lb_only = icmp ult i32 %x, 65536
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/Transforms/InstCombine/icmp-range.ll
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Expand Up @@ -140,7 +140,7 @@ define i1 @test_two_ranges(ptr nocapture readonly %arg1, ptr nocapture readonly
; CHECK-LABEL: @test_two_ranges(
; CHECK-NEXT: [[VAL1:%.*]] = load i32, ptr [[ARG1:%.*]], align 4, !range [[RNG4:![0-9]+]]
; CHECK-NEXT: [[VAL2:%.*]] = load i32, ptr [[ARG2:%.*]], align 4, !range [[RNG5:![0-9]+]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp samesign ult i32 [[VAL2]], [[VAL1]]
; CHECK-NEXT: ret i1 [[RVAL]]
;
%val1 = load i32, ptr %arg1, !range !5
Expand All @@ -152,7 +152,7 @@ define i1 @test_two_ranges(ptr nocapture readonly %arg1, ptr nocapture readonly
; Values' ranges overlap each other, so it can not be simplified.
define i1 @test_two_attribute_ranges(i32 range(i32 5, 10) %arg1, i32 range(i32 8, 16) %arg2) {
; CHECK-LABEL: @test_two_attribute_ranges(
; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[ARG2:%.*]], [[ARG1:%.*]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp samesign ult i32 [[ARG2:%.*]], [[ARG1:%.*]]
; CHECK-NEXT: ret i1 [[RVAL]]
;
%rval = icmp ult i32 %arg2, %arg1
Expand Down Expand Up @@ -215,7 +215,7 @@ define <2 x i1> @test_two_ranges_vec(ptr nocapture readonly %arg1, ptr nocapture
; CHECK-LABEL: @test_two_ranges_vec(
; CHECK-NEXT: [[VAL1:%.*]] = load <2 x i32>, ptr [[ARG1:%.*]], align 8, !range [[RNG4]]
; CHECK-NEXT: [[VAL2:%.*]] = load <2 x i32>, ptr [[ARG2:%.*]], align 8, !range [[RNG5]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp ult <2 x i32> [[VAL2]], [[VAL1]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp samesign ult <2 x i32> [[VAL2]], [[VAL1]]
; CHECK-NEXT: ret <2 x i1> [[RVAL]]
;
%val1 = load <2 x i32>, ptr %arg1, !range !5
Expand Down Expand Up @@ -249,7 +249,7 @@ define <2 x i1> @test_two_ranges_vec_true(ptr nocapture readonly %arg1, ptr noca
; Values' ranges overlap each other, so it can not be simplified.
define <2 x i1> @test_two_argument_ranges_vec(<2 x i32> range(i32 5, 10) %arg1, <2 x i32> range(i32 8, 16) %arg2) {
; CHECK-LABEL: @test_two_argument_ranges_vec(
; CHECK-NEXT: [[RVAL:%.*]] = icmp ult <2 x i32> [[ARG2:%.*]], [[ARG1:%.*]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp samesign ult <2 x i32> [[ARG2:%.*]], [[ARG1:%.*]]
; CHECK-NEXT: ret <2 x i1> [[RVAL]]
;
%rval = icmp ult <2 x i32> %arg2, %arg1
Expand Down Expand Up @@ -283,7 +283,7 @@ define i1 @test_two_return_attribute_ranges_not_simplified() {
; CHECK-LABEL: @test_two_return_attribute_ranges_not_simplified(
; CHECK-NEXT: [[VAL1:%.*]] = call range(i32 5, 10) i32 @create_range1()
; CHECK-NEXT: [[VAL2:%.*]] = call i32 @create_range2()
; CHECK-NEXT: [[RVAL:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
; CHECK-NEXT: [[RVAL:%.*]] = icmp samesign ult i32 [[VAL2]], [[VAL1]]
; CHECK-NEXT: ret i1 [[RVAL]]
;
%val1 = call range(i32 5, 10) i32 @create_range1()
Expand Down
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