[llvm][TableGen] Count implicit defs as well as explicit ones in the GlobalISel TableGen emitter

[JL2210]

NumDefs only counts the number of registers in (outs), not any implicit defs specified with Defs = [...]

This causes patterns with physical register defs to fail to import here instead of later where implicit defs are rendered.

Add on ImplicitDefs.size() to count both and create DstExpDefs to count only explicit defs, used later on.

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[llvmbot]

@llvm/pr-subscribers-tablegen

@llvm/pr-subscribers-llvm-globalisel

Author: None (JL2210)

Changes

NumDefs only counts the number of registers in (outs), not any implicit defs specified with Defs = [...]

Might want to use P.getDstRegs.size() instead of DstI.ImplicitDefs.size(), although then I think this would need to be an assert?

---

Full diff: https://github.com/llvm/llvm-project/pull/112673.diff

2 Files Affected:

• (added) llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td (+13)
• (modified) llvm/utils/TableGen/GlobalISelEmitter.cpp (+5-2)

diff --git a/llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td b/llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td
new file mode 100644
index 00000000000000..d1fb61db8c92b4
--- /dev/null
+++ b/llvm/test/TableGen/GlobalISelEmitter-implicit-defs.td
@@ -0,0 +1,13 @@
+// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns -I %p/../../include -I %p/Common %s -o /dev/null 2>&1 < %s | FileCheck %s
+
+include "llvm/Target/Target.td"
+include "GlobalISelEmitterCommon.td"
+
+// CHECK-NOT: Skipped pattern: Src pattern result has 1 def(s) without the HasNoUse predicate set to true but Dst MI has no def
+// CHECK: Skipped pattern: Pattern defines a physical register
+let Uses = [B0], Defs = [B0] in
+def tst1 : I<(outs), (ins), [(set B0, (add B0, 1))]>;
+
+// CHECK: Skipped pattern: Src pattern result has 1 def(s) without the HasNoUse predicate set to true but Dst MI has no def
+let Uses = [B0] in
+def tst2 : I<(outs), (ins), [(set B0, (add B0, 1))]>;
diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index c53f705a38db8f..29c64ba95ff856 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -2023,7 +2023,10 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
   auto &DstI = Target.getInstruction(DstOp);
   StringRef DstIName = DstI.TheDef->getName();
 
-  unsigned DstNumDefs = DstI.Operands.NumDefs,
+  // Count both implicit and explicit defs in the dst instruction.
+  // This avoids errors importing patterns that have inherent implicit defs.
+  unsigned DstExpDefs = DstI.Operands.NumDefs,
+           DstNumDefs = DstI.ImplicitDefs.size() + DstExpDefs,
            SrcNumDefs = Src.getExtTypes().size();
   if (DstNumDefs < SrcNumDefs) {
     if (DstNumDefs != 0)
@@ -2045,7 +2048,7 @@ Expected<RuleMatcher> GlobalISelEmitter::runOnPattern(const PatternToMatch &P) {
   // The root of the match also has constraints on the register bank so that it
   // matches the result instruction.
   unsigned OpIdx = 0;
-  unsigned N = std::min(DstNumDefs, SrcNumDefs);
+  unsigned N = std::min(DstExpDefs, SrcNumDefs);
   for (unsigned I = 0; I < N; ++I) {
     const TypeSetByHwMode &VTy = Src.getExtType(I);
 

[DavidSpickett]

@JL2210 I can merge this for you, please update the PR's description to the content you wish the commit message to have.

Generally this means describing what the changes do and why, and removing any other content you added as questions to reviewers.

[JL2210]

@JL2210 I can merge this for you, please update the PR's description to the content you wish the commit message to have.

Generally this means describing what the changes do and why, and removing any other content you added as questions to reviewers.

I think I'm happy with it now.

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[s-barannikov]

@JL2210 After this commit I get a hard error when trying to import this pattern:

def : Pat<(nm_ineg i32:$val), (NEGrf i32:$val)>;

NMInstrPatterns.td:259:1: error: Operand DstI[rs2] was not declared in matcher
def : Pat<(nm_ineg i32:$val), (NEGrf i32:$val)>;

Here, nm_ineg is a two-result SD node and NEGrf is an instruction with one explicit def and one implicit def. rs2 is the name of the only operand.

Previously, this pattern was skipped with a warning:

Skipped pattern: Src pattern result has more defs than dst MI (2 def(s) vs 1 def(s))
def : Pat<(nm_ineg i32:$val), (NEGrf i32:$val)>;

[JL2210]

@s-barannikov Sorry about that. Do you think you might be able to come up with a minimal example/testcase that fails this, so I can debug locally?

I'm in the process of writing a followup to this that I think might fix the issue.

[s-barannikov]

I'll prepare a testcase

[s-barannikov]

Here is a reduced td file
test.td.txt

$ mv test.td.txt test.td
$ <...>/bin/llvm-tblgen -gen-global-isel test.td -I <...>/llvm/include

[s-barannikov]

To be clear, the issue is not urgent, I can just comment out GINodeEquiv line since the pattern wasn't imported anyway.

[JL2210]

@s-barannikov Thanks! I'll work on it.

[JL2210]

Luckily, this is what I was expecting. Printed a backtrace when this happened:

#11 0x0000600460d896b3 (anonymous namespace)::GlobalISelEmitter::importExplicitDefRenderers(std::_List_iterator<std::unique_ptr<llvm::gi::MatchAction, std::default_delete<llvm::gi::MatchAction>>>, llvm::gi::RuleMatcher&, llvm::gi::BuildMIAction&, llvm::TreePatternNode const&, llvm::TreePatternNode const&, unsigned int) /home/james/git/llvm-project/llvm/utils/TableGen/GlobalISelEmitter.cpp:1547:32
#12 0x0000600460d85087 (anonymous namespace)::GlobalISelEmitter::createAndImportInstructionRenderer(llvm::gi::RuleMatcher&, llvm::gi::InstructionMatcher&, llvm::TreePatternNode const&, llvm::TreePatternNode const&) /home/james/git/llvm-project/llvm/utils/TableGen/GlobalISelEmitter.cpp:1372:16

so I'm on the right track, at least