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Reland "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (PR #111970)" #112877

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Merged
merged 3 commits into from
Oct 22, 2024
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Reland "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (PR #111970)" #112877

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ea9adf6
[ARM][MC] Add Range Checks for MOVT and MOVW Instructions
Stylie777 Oct 18, 2024
d6a8927
Merge branch 'main' into reland-clang-movt-movw-addend-check
Stylie777 Oct 21, 2024
3d6c0d7
Merge branch 'main' into reland-clang-movt-movw-addend-check
Stylie777 Oct 21, 2024
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5 changes: 5 additions & 0 deletions llvm/docs/ReleaseNotes.md
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Original file line number Diff line number Diff line change
Expand Up @@ -131,6 +131,11 @@ Changes to the ARM Backend
in leaf functions by default. To eliminate the frame pointer in leaf functions,
you must explicitly use the `-momit-leaf-frame-pointer` option.

* When using the `MOVT` or `MOVW` instructions, the Assembler will now check to
ensure that any addend that is used is within a 16-bit signed value range. If the
addend falls outside of this range, the LLVM backend will emit an error like so
`Relocation Not In Range`.

Changes to the AVR Backend
--------------------------

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11 changes: 11 additions & 0 deletions llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
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Expand Up @@ -34,6 +34,7 @@
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;

Expand Down Expand Up @@ -445,6 +446,16 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
bool IsResolved, MCContext &Ctx,
const MCSubtargetInfo* STI) const {
unsigned Kind = Fixup.getKind();
int64_t Addend = Target.getConstant();

// For MOVW/MOVT Instructions, the fixup value must already be within a
// signed 16bit range.
if ((Kind == ARM::fixup_arm_movw_lo16 || Kind == ARM::fixup_arm_movt_hi16 ||
Kind == ARM::fixup_t2_movw_lo16 || Kind == ARM::fixup_t2_movt_hi16) &&
(Addend < minIntN(16) || Addend > maxIntN(16))) {
Ctx.reportError(Fixup.getLoc(), "Relocation Not In Range");
return 0;
}

// MachO tries to make .o files that look vaguely pre-linked, so for MOVW/MOVT
// and .word relocations they put the Thumb bit into the addend if possible.
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13 changes: 13 additions & 0 deletions llvm/test/MC/ARM/arm-movt-movw-range-fail.s
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@@ -0,0 +1,13 @@
@RUN: not llvm-mc -triple armv7-eabi -filetype obj -o - %s 2>&1 | FileCheck %s

.global v
.text
movw r1, #:lower16:v + -65536
movt r1, #:upper16:v + 65536

@CHECK: error: Relocation Not In Range
@CHECK: movw r1, #:lower16:v + -65536
@CHECK: ^
@CHECK: error: Relocation Not In Range
@CHECK: movt r1, #:upper16:v + 65536
@CHECK: ^
13 changes: 13 additions & 0 deletions llvm/test/MC/ARM/arm-movt-movw-range-pass.s
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@@ -0,0 +1,13 @@
@RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s 2>&1 | FileCheck %s

.global v
.text
movw r1, #:lower16:v + -20000
movt r1, #:upper16:v + 20000

@CHECK-NOT: error: Relocation Not In Range
@CHECK-NOT: movw r1, #:lower16:v + -20000
@CHECK-NOT: ^
@CHECK-NOT: error: Relocation Not In Range
@CHECK-NOT: movt r1, #:upper16:v + 20000
@CHECK-NOT: ^
16 changes: 8 additions & 8 deletions llvm/test/MC/ARM/macho-movwt.s
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Expand Up @@ -8,8 +8,8 @@
movw r0, :lower16:_x+4
movt r0, :upper16:_x+4

movw r0, :lower16:_x+0x10000
movt r0, :upper16:_x+0x10000
movw r0, :lower16:_x+0x1000
movt r0, :upper16:_x+0x1000

.arm
movw r0, :lower16:_x
Expand All @@ -18,8 +18,8 @@
movw r0, :lower16:_x+4
movt r0, :upper16:_x+4

movw r0, :lower16:_x+0x10000
movt r0, :upper16:_x+0x10000
movw r0, :lower16:_x+0x1000
movt r0, :upper16:_x+0x1000

@ Enter the bizarre world of MachO relocations. First, they're in reverse order
@ to the actual instructions
Expand All @@ -30,10 +30,10 @@
@ Third column identifies ARM/Thumb & HI/LO.

@ CHECK: 0x2C 0 1 1 ARM_RELOC_HALF 0 _x
@ CHECK: 0x0 0 1 0 ARM_RELOC_PAIR 0 -
@ CHECK: 0x1000 0 1 0 ARM_RELOC_PAIR 0 -

@ CHECK: 0x28 0 0 1 ARM_RELOC_HALF 0 _x
@ CHECK: 0x1 0 0 0 ARM_RELOC_PAIR 0 -
@ CHECK: 0x0 0 0 0 ARM_RELOC_PAIR 0 -

@ CHECK: 0x24 0 1 1 ARM_RELOC_HALF 0 _x
@ CHECK: 0x4 0 1 0 ARM_RELOC_PAIR 0 -
Expand All @@ -48,10 +48,10 @@
@ CHECK: 0x0 0 0 0 ARM_RELOC_PAIR 0 -

@ CHECK: 0x14 0 3 1 ARM_RELOC_HALF 0 _x
@ CHECK: 0x0 0 3 0 ARM_RELOC_PAIR 0 -
@ CHECK: 0x1000 0 3 0 ARM_RELOC_PAIR 0 -

@ CHECK: 0x10 0 2 1 ARM_RELOC_HALF 0 _x
@ CHECK: 0x1 0 2 0 ARM_RELOC_PAIR 0 -
@ CHECK: 0x0 0 2 0 ARM_RELOC_PAIR 0 -

@ CHECK: 0xC 0 3 1 ARM_RELOC_HALF 0 _x
@ CHECK: 0x4 0 3 0 ARM_RELOC_PAIR 0 -
Expand Down
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