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Jan 21, 2025
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[AMDGPU] Change scope of resource usage info symbols #114810

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416d3bc
[AMDGPU] Change scope of resource usage info symbols such that they d…
JanekvO Nov 1, 2024
78c6218
Localize symbols according to function linkage
JanekvO Jan 20, 2025
198a7c4
Feedback, capitalization
JanekvO Jan 21, 2025
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60 changes: 35 additions & 25 deletions llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -363,6 +363,7 @@ void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {
using RIK = MCResourceInfo::ResourceInfoKind;
const GCNSubtarget &STM = TM.getSubtarget<GCNSubtarget>(F);
MCSymbol *FnSym = TM.getSymbol(&F);
bool IsLocal = F.hasLocalLinkage();

auto TryGetMCExprValue = [](const MCExpr *Value, uint64_t &Res) -> bool {
int64_t Val;
Expand All @@ -375,8 +376,8 @@ void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {

const uint64_t MaxScratchPerWorkitem =
STM.getMaxWaveScratchSize() / STM.getWavefrontSize();
MCSymbol *ScratchSizeSymbol =
RI.getSymbol(FnSym->getName(), RIK::RIK_PrivateSegSize, OutContext);
MCSymbol *ScratchSizeSymbol = RI.getSymbol(
FnSym->getName(), RIK::RIK_PrivateSegSize, OutContext, IsLocal);
uint64_t ScratchSize;
if (ScratchSizeSymbol->isVariable() &&
TryGetMCExprValue(ScratchSizeSymbol->getVariableValue(), ScratchSize) &&
Expand All @@ -389,7 +390,7 @@ void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {
// Validate addressable scalar registers (i.e., prior to added implicit
// SGPRs).
MCSymbol *NumSGPRSymbol =
RI.getSymbol(FnSym->getName(), RIK::RIK_NumSGPR, OutContext);
RI.getSymbol(FnSym->getName(), RIK::RIK_NumSGPR, OutContext, IsLocal);
if (STM.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS &&
!STM.hasSGPRInitBug()) {
unsigned MaxAddressableNumSGPRs = STM.getAddressableNumSGPRs();
Expand All @@ -406,9 +407,9 @@ void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {
}

MCSymbol *VCCUsedSymbol =
RI.getSymbol(FnSym->getName(), RIK::RIK_UsesVCC, OutContext);
MCSymbol *FlatUsedSymbol =
RI.getSymbol(FnSym->getName(), RIK::RIK_UsesFlatScratch, OutContext);
RI.getSymbol(FnSym->getName(), RIK::RIK_UsesVCC, OutContext, IsLocal);
MCSymbol *FlatUsedSymbol = RI.getSymbol(
FnSym->getName(), RIK::RIK_UsesFlatScratch, OutContext, IsLocal);
uint64_t VCCUsed, FlatUsed, NumSgpr;

if (NumSGPRSymbol->isVariable() && VCCUsedSymbol->isVariable() &&
Expand All @@ -435,9 +436,9 @@ void AMDGPUAsmPrinter::validateMCResourceInfo(Function &F) {
}

MCSymbol *NumVgprSymbol =
RI.getSymbol(FnSym->getName(), RIK::RIK_NumVGPR, OutContext);
RI.getSymbol(FnSym->getName(), RIK::RIK_NumVGPR, OutContext, IsLocal);
MCSymbol *NumAgprSymbol =
RI.getSymbol(FnSym->getName(), RIK::RIK_NumAGPR, OutContext);
RI.getSymbol(FnSym->getName(), RIK::RIK_NumAGPR, OutContext, IsLocal);
uint64_t NumVgpr, NumAgpr;

MachineModuleInfo &MMI =
Expand Down Expand Up @@ -655,6 +656,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {

const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
MCContext &Context = getObjFileLowering().getContext();
bool IsLocal = MF.getFunction().hasLocalLinkage();
// FIXME: This should be an explicit check for Mesa.
if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) {
MCSectionELF *ConfigSection =
Expand Down Expand Up @@ -700,20 +702,24 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
{
using RIK = MCResourceInfo::ResourceInfoKind;
getTargetStreamer()->EmitMCResourceInfo(
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumVGPR, OutContext),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumAGPR, OutContext),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumSGPR, OutContext),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumVGPR, OutContext,
IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumAGPR, OutContext,
IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumSGPR, OutContext,
IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_PrivateSegSize,
OutContext),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_UsesVCC, OutContext),
OutContext, IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_UsesVCC, OutContext,
IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_UsesFlatScratch,
OutContext),
OutContext, IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_HasDynSizedStack,
OutContext),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_HasRecursion,
OutContext),
OutContext, IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_HasRecursion, OutContext,
IsLocal),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_HasIndirectCall,
OutContext));
OutContext, IsLocal));
}

if (isVerbose()) {
Expand All @@ -726,19 +732,21 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
OutStreamer->emitRawComment(" Function info:", false);

emitCommonFunctionComments(
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumVGPR, OutContext)
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumVGPR, OutContext,
IsLocal)
->getVariableValue(),
STM.hasMAIInsts() ? RI.getSymbol(CurrentFnSym->getName(),
RIK::RIK_NumAGPR, OutContext)
->getVariableValue()
: nullptr,
STM.hasMAIInsts()
? RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_NumAGPR,
OutContext, IsLocal)
->getVariableValue()
: nullptr,
RI.createTotalNumVGPRs(MF, Ctx),
RI.createTotalNumSGPRs(
MF,
MF.getSubtarget<GCNSubtarget>().getTargetID().isXnackOnOrAny(),
Ctx),
RI.getSymbol(CurrentFnSym->getName(), RIK::RIK_PrivateSegSize,
OutContext)
OutContext, IsLocal)
->getVariableValue(),
getFunctionCodeSize(MF), MFI);
return false;
Expand Down Expand Up @@ -927,6 +935,7 @@ static const MCExpr *computeAccumOffset(const MCExpr *NumVGPR, MCContext &Ctx) {
void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,
const MachineFunction &MF) {
const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>();
bool IsLocal = MF.getFunction().hasLocalLinkage();
MCContext &Ctx = MF.getContext();

auto CreateExpr = [&Ctx](int64_t Value) {
Expand All @@ -944,7 +953,8 @@ void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &ProgInfo,

auto GetSymRefExpr =
[&](MCResourceInfo::ResourceInfoKind RIK) -> const MCExpr * {
MCSymbol *Sym = RI.getSymbol(CurrentFnSym->getName(), RIK, OutContext);
MCSymbol *Sym =
RI.getSymbol(CurrentFnSym->getName(), RIK, OutContext, IsLocal);
return MCSymbolRefExpr::create(Sym, Ctx);
};

Expand Down
47 changes: 30 additions & 17 deletions llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -15,16 +15,20 @@
#include "AMDGPUMCResourceInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Target/TargetMachine.h"

using namespace llvm;

MCSymbol *MCResourceInfo::getSymbol(StringRef FuncName, ResourceInfoKind RIK,
MCContext &OutContext) {
auto GOCS = [FuncName, &OutContext](StringRef Suffix) {
return OutContext.getOrCreateSymbol(FuncName + Twine(Suffix));
MCContext &OutContext, bool IsLocal) {
auto GOCS = [FuncName, &OutContext, IsLocal](StringRef Suffix) {
StringRef Prefix =
IsLocal ? OutContext.getAsmInfo()->getPrivateGlobalPrefix() : "";
return OutContext.getOrCreateSymbol(Twine(Prefix) + FuncName +
Twine(Suffix));
};
switch (RIK) {
case RIK_NumVGPR:
Expand All @@ -51,8 +55,8 @@ MCSymbol *MCResourceInfo::getSymbol(StringRef FuncName, ResourceInfoKind RIK,

const MCExpr *MCResourceInfo::getSymRefExpr(StringRef FuncName,
ResourceInfoKind RIK,
MCContext &Ctx) {
return MCSymbolRefExpr::create(getSymbol(FuncName, RIK, Ctx), Ctx);
MCContext &Ctx, bool IsLocal) {
return MCSymbolRefExpr::create(getSymbol(FuncName, RIK, Ctx, IsLocal), Ctx);
}

void MCResourceInfo::assignMaxRegs(MCContext &OutContext) {
Expand Down Expand Up @@ -96,11 +100,12 @@ void MCResourceInfo::assignResourceInfoExpr(
const MachineFunction &MF, const SmallVectorImpl<const Function *> &Callees,
MCContext &OutContext) {
const TargetMachine &TM = MF.getTarget();
bool IsLocal = MF.getFunction().hasLocalLinkage();
MCSymbol *FnSym = TM.getSymbol(&MF.getFunction());
const MCConstantExpr *LocalConstExpr =
MCConstantExpr::create(LocalValue, OutContext);
const MCExpr *SymVal = LocalConstExpr;
MCSymbol *Sym = getSymbol(FnSym->getName(), RIK, OutContext);
MCSymbol *Sym = getSymbol(FnSym->getName(), RIK, OutContext, IsLocal);
if (!Callees.empty()) {
SmallVector<const MCExpr *, 8> ArgExprs;
SmallPtrSet<const Function *, 8> Seen;
Expand All @@ -110,9 +115,10 @@ void MCResourceInfo::assignResourceInfoExpr(
if (!Seen.insert(Callee).second)
continue;

bool IsCalleeLocal = Callee->hasLocalLinkage();
MCSymbol *CalleeFnSym = TM.getSymbol(&Callee->getFunction());
MCSymbol *CalleeValSym =
getSymbol(CalleeFnSym->getName(), RIK, OutContext);
getSymbol(CalleeFnSym->getName(), RIK, OutContext, IsCalleeLocal);

// Avoid constructing recursive definitions by detecting whether `Sym` is
// found transitively within any of its `CalleeValSym`.
Expand Down Expand Up @@ -155,6 +161,7 @@ void MCResourceInfo::gatherResourceInfo(
MCSymbol *MaxVGPRSym = getMaxVGPRSymbol(OutContext);
MCSymbol *MaxAGPRSym = getMaxAGPRSymbol(OutContext);
MCSymbol *MaxSGPRSym = getMaxSGPRSymbol(OutContext);
bool IsLocal = MF.getFunction().hasLocalLinkage();

if (!AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())) {
addMaxVGPRCandidate(FRI.NumVGPR);
Expand All @@ -172,7 +179,8 @@ void MCResourceInfo::gatherResourceInfo(
FRI.Callees, OutContext);
} else {
const MCExpr *SymRef = MCSymbolRefExpr::create(MaxSym, OutContext);
MCSymbol *LocalNumSym = getSymbol(FnSym->getName(), RIK, OutContext);
MCSymbol *LocalNumSym =
getSymbol(FnSym->getName(), RIK, OutContext, IsLocal);
const MCExpr *MaxWithLocal = AMDGPUMCExpr::createMax(
{MCConstantExpr::create(numRegs, OutContext), SymRef}, OutContext);
LocalNumSym->setVariableValue(MaxWithLocal);
Expand All @@ -187,7 +195,8 @@ void MCResourceInfo::gatherResourceInfo(
// The expression for private segment size should be: FRI.PrivateSegmentSize
// + max(FRI.Callees, FRI.CalleeSegmentSize)
SmallVector<const MCExpr *, 8> ArgExprs;
MCSymbol *Sym = getSymbol(FnSym->getName(), RIK_PrivateSegSize, OutContext);
MCSymbol *Sym =
getSymbol(FnSym->getName(), RIK_PrivateSegSize, OutContext, IsLocal);
if (FRI.CalleeSegmentSize)
ArgExprs.push_back(
MCConstantExpr::create(FRI.CalleeSegmentSize, OutContext));
Expand All @@ -198,9 +207,11 @@ void MCResourceInfo::gatherResourceInfo(
if (!Seen.insert(Callee).second)
continue;
if (!Callee->isDeclaration()) {
bool IsCalleeLocal = Callee->hasLocalLinkage();
MCSymbol *CalleeFnSym = TM.getSymbol(&Callee->getFunction());
MCSymbol *CalleeValSym =
getSymbol(CalleeFnSym->getName(), RIK_PrivateSegSize, OutContext);
getSymbol(CalleeFnSym->getName(), RIK_PrivateSegSize, OutContext,
IsCalleeLocal);

// Avoid constructing recursive definitions by detecting whether `Sym`
// is found transitively within any of its `CalleeValSym`.
Expand All @@ -223,7 +234,7 @@ void MCResourceInfo::gatherResourceInfo(
}

auto SetToLocal = [&](int64_t LocalValue, ResourceInfoKind RIK) {
MCSymbol *Sym = getSymbol(FnSym->getName(), RIK, OutContext);
MCSymbol *Sym = getSymbol(FnSym->getName(), RIK, OutContext, IsLocal);
Sym->setVariableValue(MCConstantExpr::create(LocalValue, OutContext));
};

Expand Down Expand Up @@ -255,21 +266,23 @@ const MCExpr *MCResourceInfo::createTotalNumVGPRs(const MachineFunction &MF,
MCContext &Ctx) {
const TargetMachine &TM = MF.getTarget();
MCSymbol *FnSym = TM.getSymbol(&MF.getFunction());
bool IsLocal = MF.getFunction().hasLocalLinkage();
return AMDGPUMCExpr::createTotalNumVGPR(
getSymRefExpr(FnSym->getName(), RIK_NumAGPR, Ctx),
getSymRefExpr(FnSym->getName(), RIK_NumVGPR, Ctx), Ctx);
getSymRefExpr(FnSym->getName(), RIK_NumAGPR, Ctx, IsLocal),
getSymRefExpr(FnSym->getName(), RIK_NumVGPR, Ctx, IsLocal), Ctx);
}

const MCExpr *MCResourceInfo::createTotalNumSGPRs(const MachineFunction &MF,
bool hasXnack,
MCContext &Ctx) {
const TargetMachine &TM = MF.getTarget();
MCSymbol *FnSym = TM.getSymbol(&MF.getFunction());
bool IsLocal = MF.getFunction().hasLocalLinkage();
return MCBinaryExpr::createAdd(
getSymRefExpr(FnSym->getName(), RIK_NumSGPR, Ctx),
getSymRefExpr(FnSym->getName(), RIK_NumSGPR, Ctx, IsLocal),
AMDGPUMCExpr::createExtraSGPRs(
getSymRefExpr(FnSym->getName(), RIK_UsesVCC, Ctx),
getSymRefExpr(FnSym->getName(), RIK_UsesFlatScratch, Ctx), hasXnack,
Ctx),
getSymRefExpr(FnSym->getName(), RIK_UsesVCC, Ctx, IsLocal),
getSymRefExpr(FnSym->getName(), RIK_UsesFlatScratch, Ctx, IsLocal),
hasXnack, Ctx),
Ctx);
}
4 changes: 2 additions & 2 deletions llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.h
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Expand Up @@ -71,9 +71,9 @@ class MCResourceInfo {
}

MCSymbol *getSymbol(StringRef FuncName, ResourceInfoKind RIK,
MCContext &OutContext);
MCContext &OutContext, bool IsLocal);
const MCExpr *getSymRefExpr(StringRef FuncName, ResourceInfoKind RIK,
MCContext &Ctx);
MCContext &Ctx, bool IsLocal);

void reset();

Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
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Expand Up @@ -12,9 +12,9 @@
; ALL-NEXT: .amdhsa_next_free_sgpr (max(kernel.numbered_sgpr+(extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1))
; GFX90A-NEXT: .amdhsa_accum_offset ((((((alignto(max(1, kernel.num_vgpr), 4))/4)-1)&(~65536))&63)+1)*4

; ALL: .set kernel.num_vgpr, max(41, aliasee_default.num_vgpr)
; ALL-NEXT: .set kernel.num_agpr, max(0, aliasee_default.num_agpr)
; ALL-NEXT: .set kernel.numbered_sgpr, max(33, aliasee_default.numbered_sgpr)
; ALL: .set kernel.num_vgpr, max(41, .Laliasee_default.num_vgpr)
; ALL-NEXT: .set kernel.num_agpr, max(0, .Laliasee_default.num_agpr)
; ALL-NEXT: .set kernel.numbered_sgpr, max(33, .Laliasee_default.numbered_sgpr)
define amdgpu_kernel void @kernel() #0 {
bb:
call void @alias() #2
Expand All @@ -26,9 +26,9 @@ bb:
call void asm sideeffect "; clobber a26 ", "~{a26}"()
ret void
}
; ALL: .set aliasee_default.num_vgpr, 0
; ALL-NEXT: .set aliasee_default.num_agpr, 27
; ALL-NEXT: .set aliasee_default.numbered_sgpr, 32
; ALL: .set .Laliasee_default.num_vgpr, 0
; ALL-NEXT: .set .Laliasee_default.num_agpr, 27
; ALL-NEXT: .set .Laliasee_default.numbered_sgpr, 32

attributes #0 = { noinline norecurse nounwind optnone }
attributes #1 = { noinline norecurse nounwind readnone willreturn }
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
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Expand Up @@ -7,18 +7,18 @@
@alias0 = hidden alias void (), ptr @aliasee_default_vgpr64_sgpr102

; CHECK-LABEL: {{^}}kernel0:
; CHECK: .set kernel0.num_vgpr, max(41, aliasee_default_vgpr64_sgpr102.num_vgpr)
; CHECK-NEXT: .set kernel0.num_agpr, max(0, aliasee_default_vgpr64_sgpr102.num_agpr)
; CHECK-NEXT: .set kernel0.numbered_sgpr, max(33, aliasee_default_vgpr64_sgpr102.numbered_sgpr)
; CHECK: .set kernel0.num_vgpr, max(41, .Laliasee_default_vgpr64_sgpr102.num_vgpr)
; CHECK-NEXT: .set kernel0.num_agpr, max(0, .Laliasee_default_vgpr64_sgpr102.num_agpr)
; CHECK-NEXT: .set kernel0.numbered_sgpr, max(33, .Laliasee_default_vgpr64_sgpr102.numbered_sgpr)
define amdgpu_kernel void @kernel0() #0 {
bb:
call void @alias0() #2
ret void
}

; CHECK: .set aliasee_default_vgpr64_sgpr102.num_vgpr, 53
; CHECK-NEXT: .set aliasee_default_vgpr64_sgpr102.num_agpr, 0
; CHECK-NEXT: .set aliasee_default_vgpr64_sgpr102.numbered_sgpr, 32
; CHECK: .set .Laliasee_default_vgpr64_sgpr102.num_vgpr, 53
; CHECK-NEXT: .set .Laliasee_default_vgpr64_sgpr102.num_agpr, 0
; CHECK-NEXT: .set .Laliasee_default_vgpr64_sgpr102.numbered_sgpr, 32
define internal void @aliasee_default_vgpr64_sgpr102() #1 {
bb:
call void asm sideeffect "; clobber v52 ", "~{v52}"()
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
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Expand Up @@ -12,19 +12,19 @@
; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel1.num_agpr, kernel1.num_vgpr), 1, 0)
; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel1.numbered_sgpr+(extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1))

; CHECK: .set kernel1.num_vgpr, max(42, aliasee_vgpr32_sgpr76.num_vgpr)
; CHECK-NEXT: .set kernel1.num_agpr, max(0, aliasee_vgpr32_sgpr76.num_agpr)
; CHECK-NEXT: .set kernel1.numbered_sgpr, max(33, aliasee_vgpr32_sgpr76.numbered_sgpr)
; CHECK: .set kernel1.num_vgpr, max(42, .Laliasee_vgpr32_sgpr76.num_vgpr)
; CHECK-NEXT: .set kernel1.num_agpr, max(0, .Laliasee_vgpr32_sgpr76.num_agpr)
; CHECK-NEXT: .set kernel1.numbered_sgpr, max(33, .Laliasee_vgpr32_sgpr76.numbered_sgpr)
define amdgpu_kernel void @kernel1() #0 {
bb:
call void asm sideeffect "; clobber v40 ", "~{v40}"()
call void @alias1() #2
ret void
}

; CHECK: .set aliasee_vgpr32_sgpr76.num_vgpr, 27
; CHECK-NEXT: .set aliasee_vgpr32_sgpr76.num_agpr, 0
; CHECK-NEXT: .set aliasee_vgpr32_sgpr76.numbered_sgpr, 32
; CHECK: .set .Laliasee_vgpr32_sgpr76.num_vgpr, 27
; CHECK-NEXT: .set .Laliasee_vgpr32_sgpr76.num_agpr, 0
; CHECK-NEXT: .set .Laliasee_vgpr32_sgpr76.numbered_sgpr, 32
define internal void @aliasee_vgpr32_sgpr76() #1 {
bb:
call void asm sideeffect "; clobber v26 ", "~{v26}"()
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
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Expand Up @@ -10,18 +10,18 @@
; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel2.num_agpr, kernel2.num_vgpr), 1, 0)
; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel2.numbered_sgpr+(extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1))

; CHECK: .set kernel2.num_vgpr, max(41, aliasee_vgpr64_sgpr102.num_vgpr)
; CHECK-NEXT: .set kernel2.num_agpr, max(0, aliasee_vgpr64_sgpr102.num_agpr)
; CHECK-NEXT: .set kernel2.numbered_sgpr, max(33, aliasee_vgpr64_sgpr102.numbered_sgpr)
; CHECK: .set kernel2.num_vgpr, max(41, .Laliasee_vgpr64_sgpr102.num_vgpr)
; CHECK-NEXT: .set kernel2.num_agpr, max(0, .Laliasee_vgpr64_sgpr102.num_agpr)
; CHECK-NEXT: .set kernel2.numbered_sgpr, max(33, .Laliasee_vgpr64_sgpr102.numbered_sgpr)
define amdgpu_kernel void @kernel2() #0 {
bb:
call void @alias2() #2
ret void
}

; CHECK: .set aliasee_vgpr64_sgpr102.num_vgpr, 53
; CHECK-NEXT: .set aliasee_vgpr64_sgpr102.num_agpr, 0
; CHECK-NEXT: .set aliasee_vgpr64_sgpr102.numbered_sgpr, 32
; CHECK: .set .Laliasee_vgpr64_sgpr102.num_vgpr, 53
; CHECK-NEXT: .set .Laliasee_vgpr64_sgpr102.num_agpr, 0
; CHECK-NEXT: .set .Laliasee_vgpr64_sgpr102.numbered_sgpr, 32
define internal void @aliasee_vgpr64_sgpr102() #1 {
bb:
call void asm sideeffect "; clobber v52 ", "~{v52}"()
Expand Down
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