[Mips] Support llvm.readcyclecounter intrinsic #114953

yingopq · 2024-11-05T08:48:13Z

The llvm.readcyclecounter intrinsic can be implemented via the rdhwr $3, $hwr_cc instruction.
$hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register.

Fix #106318.

github-actions · 2024-11-05T08:52:59Z

✅ With the latest revision this PR passed the C/C++ code formatter.

yingopq · 2024-11-11T03:05:47Z

@topperc @wzssyqa Could you help review, thanks!

yingopq · 2024-11-25T02:31:05Z

Ping.

wzssyqa · 2024-11-25T04:27:43Z

llvm/lib/Target/Mips/MipsISelLowering.cpp

+
+  if (Subtarget.hasMips64()) {
+    RdhwrOpc = Mips::RDHWR64;
+    DestReg = Mips::V1_64;


Why can V1 can hardcoded here?
If the IR is quite long, will it overwrite some previous value?

yingopq · 2025-01-02T07:09:01Z

Ping.

wzssyqa · 2025-01-05T07:25:01Z

llvm/lib/Target/Mips/MipsISelLowering.cpp

@@ -2092,6 +2095,43 @@ MachineBasicBlock *MipsTargetLowering::emitAtomicCmpSwapPartword(
  return exitMBB;
 }

+SDValue MipsTargetLowering::lowerREADCYCLECOUNTER(SDValue Op,
+                                                  SelectionDAG &DAG) const {
+  SmallVector<SDValue, 3> Results;


We should only support it for mips32r2+ or linux triples.
I mean you should check if it is mips32r2+ or the os section of triple is Linux.

wzssyqa · 2025-01-07T03:31:28Z

llvm/lib/Target/Mips/MipsISelLowering.cpp

+  MachineFunction &MF = DAG.getMachineFunction();
+  unsigned RdhwrOpc, DestReg;
+
+  if (!Subtarget.hasMips32r6() &&


wzssyqa · 2025-01-07T03:32:04Z

llvm/test/CodeGen/Mips/readcyclecounter.ll

@@ -0,0 +1,26 @@
+;RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r2 < %s | FileCheck %s --check-prefix=MIPSEL


What will happen for pre-r2 or non Linux?

Please add test cases for

llc -mtriple=mipsel-linux-gnu -mcpu=mips2 llc -mtriple=mips64el-linux-gnu -mcpu=mips3 llc -mtriple=mipsel -mcpu=mips32r2 llc -mtriple=mips64el -mcpu=mips64r2 llc -mtriple=mipsel -mcpu=mips2 llc -mtriple=mips64el -mcpu=mips3

wzssyqa · 2025-01-07T09:30:51Z

llvm/lib/Target/Mips/MipsISelLowering.cpp

@@ -359,6 +359,10 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
  setOperationAction(ISD::FCOPYSIGN,          MVT::f64,   Custom);
  setOperationAction(ISD::FP_TO_SINT,         MVT::i32,   Custom);

+  if (Subtarget.hasMips32r2() &&


The llvm.readcyclecounter intrinsic can be implemented via the `rdhwr $2, $hwr_cc` instruction. $hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register. Fix llvm#106318.

wzssyqa · 2025-01-10T01:18:31Z

llvm/test/CodeGen/Mips/readcyclecounter.ll

+; MIPSEL:       # %bb.0: # %entry
+; MIPSEL-NEXT:    .set push
+; MIPSEL-NEXT:    .set mips32r2
+; MIPSEL-NEXT:    rdhwr $2, $hwr_cc


Ohh, I find another problem, the return value is i64.
It means that we should set $a1/$3 to zero here, just as MIPSEL_NOT_SUPPORTED does.

@yingopq please fix this problem.

yingopq · 2025-01-23T07:35:42Z

Ping.

brad0 · 2025-02-06T00:48:11Z

@wzssyqa

llvm-ci · 2025-02-11T02:45:41Z

LLVM Buildbot has detected a new failure on builder llvm-clang-x86_64-expensive-checks-debian running on gribozavr4 while building llvm at step 6 "test-build-unified-tree-check-all".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/16/builds/13582

Here is the relevant piece of the build log for the reference

Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/Mips/readcyclecounter.ll' FAILED ********************
Exit Code: 2

Command Output (stderr):
--
RUN: at line 1: /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=mipsel-linux-gnu -mcpu=mips32r2 < /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/Mips/readcyclecounter.ll | /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/FileCheck /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/Mips/readcyclecounter.ll --check-prefix=MIPSEL
+ /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=mipsel-linux-gnu -mcpu=mips32r2

# After Instruction Selection
# Machine code for function test_readcyclecounter+ /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/FileCheck /b/1/llvm-clang-x86_64-expensive-checks-debian/llvm-project/llvm/test/CodeGen/Mips/readcyclecounter.ll --check-prefix=MIPSEL
: IsSSA, TracksLiveness

bb.0.entry:
  %0:gpr32 = RDHWR $hwr2, 0
  %1:gpr32 = ADDiu $zero, 0
  $v0 = COPY %0:gpr32
  $v1 = COPY %1:gpr32
  RetRA implicit $v0, implicit $v1

# End machine code for function test_readcyclecounter.

*** Bad machine code: Using an undefined physical register ***
- function:    test_readcyclecounter
- basic block: %bb.0 entry (0x9e647d0)
- instruction: %0:gpr32 = RDHWR $hwr2, 0
- operand 1:   $hwr2
LLVM ERROR: Found 1 machine code errors.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: /b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc -mtriple=mipsel-linux-gnu -mcpu=mips32r2
1.	Running pass 'Function Pass Manager' on module '<stdin>'.
2.	Running pass 'Verify generated machine code' on function '@test_readcyclecounter'
 #0 0x000000000386f0b7 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x386f0b7)
 #1 0x000000000386cb6e llvm::sys::RunSignalHandlers() (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x386cb6e)
 #2 0x000000000386f76a SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0
 #3 0x00007fc93562d140 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x13140)
 #4 0x00007fc935141d51 raise (/lib/x86_64-linux-gnu/libc.so.6+0x38d51)
 #5 0x00007fc93512b537 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22537)
 #6 0x00000000037df4aa llvm::report_fatal_error(llvm::Twine const&, bool) (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x37df4aa)
 #7 0x0000000002a5c41d (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x2a5c41d)
 #8 0x0000000002a5d48b (anonymous namespace)::MachineVerifierLegacyPass::runOnMachineFunction(llvm::MachineFunction&) MachineVerifier.cpp:0:0
 #9 0x000000000295a290 llvm::MachineFunctionPass::runOnFunction(llvm::Function&) (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x295a290)
#10 0x0000000002ea92e3 llvm::FPPassManager::runOnFunction(llvm::Function&) (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x2ea92e3)
#11 0x0000000002eafd11 llvm::FPPassManager::runOnModule(llvm::Module&) (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x2eafd11)
#12 0x0000000002ea99ed llvm::legacy::PassManagerImpl::run(llvm::Module&) (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x2ea99ed)
#13 0x00000000008a267c compileModule(char**, llvm::LLVMContext&) llc.cpp:0:0
#14 0x000000000089fa4d main (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x89fa4d)
#15 0x00007fc93512cd7a __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x23d7a)
#16 0x000000000089e89a _start (/b/1/llvm-clang-x86_64-expensive-checks-debian/build/bin/llc+0x89e89a)
FileCheck error: '<stdin>' is empty.
...

This reverts commit 9cc7ee1.

wzssyqa · 2025-02-11T06:38:18Z

I reverted this commit. @yingopq can you have a look at this problem?

The llvm.readcyclecounter intrinsic can be implemented via the `rdhwr $3, $hwr_cc` instruction. $hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register. Fix llvm#106318.

This reverts commit 9cc7ee1.

The llvm.readcyclecounter intrinsic can be implemented via the `rdhwr $3, $hwr_cc` instruction. $hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register. Fix llvm#106318.

This reverts commit 9cc7ee1.

yingopq · 2025-02-18T02:06:36Z

I reverted this commit. @yingopq can you have a look at this problem?

I try to reproduce this failure, but the result was OK.

root@debian-sid-amd64:~/llvm-project# ./build/bin/llvm-lit -v llvm/test/CodeGen/Mips/readcyclecounter.ll
-- Testing: 1 tests, 1 workers --
PASS: LLVM :: CodeGen/Mips/readcyclecounter.ll (1 of 1)

Testing Time: 0.11s

Total Discovered Tests: 1
  Passed: 1 (100.00%)
root@debian-sid-amd64:~/llvm-project# cat /proc/version
Linux version 5.19.0-40-generic (buildd@lcy02-amd64-047) (x86_64-linux-gnu-gcc (Ubuntu 11.3.0-1ubuntu1~22.04) 11.3.0, GNU ld (GNU Binutils for Ubuntu) 2.38) #41~22.04.1-Ubuntu SMP PREEMPT_DYNAMIC Fri Mar 31 16:00:14 UTC 2

I would commit a change.

The llvm.readcyclecounter intrinsic can be implemented via the `rdhwr $3, $hwr_cc` instruction. $hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register. Fix llvm#106318.

This reverts commit 9cc7ee1.

yingopq force-pushed the Fix_bug_issue_106318 branch from 41adf42 to 27b5322 Compare November 5, 2024 08:49

yingopq changed the title ~~[Mips] Support llvm.readsteadycounter intrinsic~~ [Mips] Support llvm.readcyclecounter intrinsic Nov 5, 2024

yingopq force-pushed the Fix_bug_issue_106318 branch from 27b5322 to 490a1da Compare November 5, 2024 08:55

wzssyqa requested changes Nov 25, 2024

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yingopq force-pushed the Fix_bug_issue_106318 branch from 490a1da to f6b1cb9 Compare December 27, 2024 09:22

wzssyqa reviewed Jan 5, 2025

View reviewed changes

yingopq force-pushed the Fix_bug_issue_106318 branch from f6b1cb9 to 99e5f5f Compare January 7, 2025 03:17

wzssyqa reviewed Jan 7, 2025

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yingopq force-pushed the Fix_bug_issue_106318 branch from 99e5f5f to 7a05afe Compare January 7, 2025 09:22

wzssyqa reviewed Jan 7, 2025

View reviewed changes

yingopq force-pushed the Fix_bug_issue_106318 branch from 7a05afe to 5e008c5 Compare January 8, 2025 03:00

[Mips] Support llvm.readcyclecounter intrinsic

5a8708f

The llvm.readcyclecounter intrinsic can be implemented via the `rdhwr $2, $hwr_cc` instruction. $hwr_cc: High-resolution cycle counter. This register provides read access to the coprocessor 0 Count Register. Fix llvm#106318.

yingopq force-pushed the Fix_bug_issue_106318 branch from 5e008c5 to 5a8708f Compare January 9, 2025 07:46

wzssyqa reviewed Jan 10, 2025

View reviewed changes

wzssyqa merged commit 9cc7ee1 into llvm:main Feb 11, 2025
8 checks passed

wzssyqa added a commit that referenced this pull request Feb 11, 2025

Revert "[Mips] Support llvm.readcyclecounter intrinsic (#114953)"

0d8d354

This reverts commit 9cc7ee1.

Icohedron pushed a commit to Icohedron/llvm-project that referenced this pull request Feb 11, 2025

Revert "[Mips] Support llvm.readcyclecounter intrinsic (llvm#114953)"

b241f1f

This reverts commit 9cc7ee1.

joaosaffran pushed a commit to joaosaffran/llvm-project that referenced this pull request Feb 14, 2025

Revert "[Mips] Support llvm.readcyclecounter intrinsic (llvm#114953)"

9cd0e46

This reverts commit 9cc7ee1.

sivan-shani pushed a commit to sivan-shani/llvm-project that referenced this pull request Feb 24, 2025

Revert "[Mips] Support llvm.readcyclecounter intrinsic (llvm#114953)"

ea25a7a

This reverts commit 9cc7ee1.

		@@ -0,0 +1,26 @@
		;RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r2 < %s \| FileCheck %s --check-prefix=MIPSEL

[Mips] Support llvm.readcyclecounter intrinsic #114953

[Mips] Support llvm.readcyclecounter intrinsic #114953

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