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test/MSan: change target trilpe to 32-bit arch in respective tests #115018

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2f1eea5
test/MSan: change target trilpe to 32-bit arch in respective tests
Nov 5, 2024
f45dafb
fixup! test/MSan: change target trilpe to 32-bit arch in respective t…
Nov 6, 2024
e7d9908
fixup! fixup! test/MSan: change target trilpe to 32-bit arch in respe…
Nov 9, 2024
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137 changes: 3 additions & 134 deletions llvm/test/Instrumentation/MemorySanitizer/ARM32/vararg-arm32.ll
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137 changes: 3 additions & 134 deletions llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mips.ll
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137 changes: 3 additions & 134 deletions llvm/test/Instrumentation/MemorySanitizer/Mips32/vararg-mipsel.ll
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144 changes: 62 additions & 82 deletions llvm/test/Instrumentation/MemorySanitizer/PowerPC32/kernel-ppcle.ll
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176 changes: 5 additions & 171 deletions llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppc.ll
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176 changes: 5 additions & 171 deletions llvm/test/Instrumentation/MemorySanitizer/PowerPC32/vararg-ppcle.ll
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137 changes: 3 additions & 134 deletions llvm/test/Instrumentation/MemorySanitizer/RISCV32/vararg-riscv32.ll
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48 changes: 24 additions & 24 deletions ...emorySanitizer/i386/avx-intrinsics-x86.ll → ...morySanitizer/i386/avx-intrinsics-i386.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s

target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
target triple = "i386-unknown-linux-gnu"

define <4 x double> @test_x86_avx_addsub_pd_256(<4 x double> %a0, <4 x double> %a1) #0 {
; CHECK-LABEL: @test_x86_avx_addsub_pd_256(
Expand Down Expand Up @@ -38,21 +38,21 @@ declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) nounwi

define <4 x double> @test_x86_avx_blendv_pd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) #0 {
; CHECK-LABEL: @test_x86_avx_blendv_pd_256(
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i64>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i64>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: [[TMP12:%.*]] = load <4 x i64>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x double> [[A2:%.*]] to <4 x i64>
; CHECK-NEXT: [[TMP5:%.*]] = ashr <4 x i64> [[TMP4]], splat (i64 63)
; CHECK-NEXT: [[TMP13:%.*]] = bitcast <4 x double> [[A2:%.*]] to <4 x i64>
; CHECK-NEXT: [[TMP5:%.*]] = ashr <4 x i64> [[TMP13]], splat (i64 63)
; CHECK-NEXT: [[TMP6:%.*]] = trunc <4 x i64> [[TMP5]] to <4 x i1>
; CHECK-NEXT: [[TMP7:%.*]] = ashr <4 x i64> [[TMP1]], splat (i64 63)
; CHECK-NEXT: [[TMP7:%.*]] = ashr <4 x i64> [[TMP4]], splat (i64 63)
; CHECK-NEXT: [[TMP8:%.*]] = trunc <4 x i64> [[TMP7]] to <4 x i1>
; CHECK-NEXT: [[TMP9:%.*]] = select <4 x i1> [[TMP6]], <4 x i64> [[TMP2]], <4 x i64> [[TMP3]]
; CHECK-NEXT: [[TMP9:%.*]] = select <4 x i1> [[TMP6]], <4 x i64> [[TMP2]], <4 x i64> [[TMP12]]
; CHECK-NEXT: [[TMP10:%.*]] = bitcast <4 x double> [[A1:%.*]] to <4 x i64>
; CHECK-NEXT: [[TMP11:%.*]] = bitcast <4 x double> [[A0:%.*]] to <4 x i64>
; CHECK-NEXT: [[TMP12:%.*]] = xor <4 x i64> [[TMP10]], [[TMP11]]
; CHECK-NEXT: [[TMP13:%.*]] = or <4 x i64> [[TMP12]], [[TMP2]]
; CHECK-NEXT: [[TMP14:%.*]] = or <4 x i64> [[TMP13]], [[TMP3]]
; CHECK-NEXT: [[TMP3:%.*]] = xor <4 x i64> [[TMP10]], [[TMP11]]
; CHECK-NEXT: [[_MSPROP:%.*]] = or <4 x i64> [[TMP3]], [[TMP2]]
; CHECK-NEXT: [[TMP14:%.*]] = or <4 x i64> [[_MSPROP]], [[TMP12]]
; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <4 x i1> [[TMP8]], <4 x i64> [[TMP14]], <4 x i64> [[TMP9]]
; CHECK-NEXT: [[RES:%.*]] = call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> [[A0]], <4 x double> [[A1]], <4 x double> [[A2]])
; CHECK-NEXT: store <4 x i64> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8
Expand All @@ -66,21 +66,21 @@ declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4

define <8 x float> @test_x86_avx_blendv_ps_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) #0 {
; CHECK-LABEL: @test_x86_avx_blendv_ps_256(
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT: [[TMP4:%.*]] = load <8 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load <8 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: [[TMP12:%.*]] = load <8 x i32>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x float> [[A2:%.*]] to <8 x i32>
; CHECK-NEXT: [[TMP5:%.*]] = ashr <8 x i32> [[TMP4]], splat (i32 31)
; CHECK-NEXT: [[TMP13:%.*]] = bitcast <8 x float> [[A2:%.*]] to <8 x i32>
; CHECK-NEXT: [[TMP5:%.*]] = ashr <8 x i32> [[TMP13]], splat (i32 31)
; CHECK-NEXT: [[TMP6:%.*]] = trunc <8 x i32> [[TMP5]] to <8 x i1>
; CHECK-NEXT: [[TMP7:%.*]] = ashr <8 x i32> [[TMP1]], splat (i32 31)
; CHECK-NEXT: [[TMP7:%.*]] = ashr <8 x i32> [[TMP4]], splat (i32 31)
; CHECK-NEXT: [[TMP8:%.*]] = trunc <8 x i32> [[TMP7]] to <8 x i1>
; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP6]], <8 x i32> [[TMP2]], <8 x i32> [[TMP3]]
; CHECK-NEXT: [[TMP9:%.*]] = select <8 x i1> [[TMP6]], <8 x i32> [[TMP2]], <8 x i32> [[TMP12]]
; CHECK-NEXT: [[TMP10:%.*]] = bitcast <8 x float> [[A1:%.*]] to <8 x i32>
; CHECK-NEXT: [[TMP11:%.*]] = bitcast <8 x float> [[A0:%.*]] to <8 x i32>
; CHECK-NEXT: [[TMP12:%.*]] = xor <8 x i32> [[TMP10]], [[TMP11]]
; CHECK-NEXT: [[TMP13:%.*]] = or <8 x i32> [[TMP12]], [[TMP2]]
; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i32> [[TMP13]], [[TMP3]]
; CHECK-NEXT: [[TMP3:%.*]] = xor <8 x i32> [[TMP10]], [[TMP11]]
; CHECK-NEXT: [[_MSPROP:%.*]] = or <8 x i32> [[TMP3]], [[TMP2]]
; CHECK-NEXT: [[TMP14:%.*]] = or <8 x i32> [[_MSPROP]], [[TMP12]]
; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <8 x i1> [[TMP8]], <8 x i32> [[TMP14]], <8 x i32> [[TMP9]]
; CHECK-NEXT: [[RES:%.*]] = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> [[A0]], <8 x float> [[A1]], <8 x float> [[A2]])
; CHECK-NEXT: store <8 x i32> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8
Expand Down Expand Up @@ -499,7 +499,7 @@ define <32 x i8> @test_x86_avx_ldu_dq_256(ptr %a0) #0 {
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A0:%.*]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr
; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i8>, ptr [[TMP4]], align 1
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
Expand Down Expand Up @@ -1057,7 +1057,7 @@ define <4 x float> @test_x86_avx_vpermilvar_ps_load(<4 x float> %a0, ptr %a1) #0
; CHECK: 4:
; CHECK-NEXT: [[A2:%.*]] = load <4 x i32>, ptr [[A1:%.*]], align 16
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[A1]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: [[_MSLD:%.*]] = load <4 x i32>, ptr [[TMP7]], align 16
; CHECK-NEXT: [[TMP8:%.*]] = bitcast <4 x i32> [[TMP2]] to i128
Expand Down Expand Up @@ -1373,7 +1373,7 @@ define void @movnt_dq(ptr %p, <2 x i64> %a1) nounwind #0 {
; CHECK-NEXT: unreachable
; CHECK: 4:
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P:%.*]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: store <4 x i64> [[_MSPROP1]], ptr [[TMP7]], align 32
; CHECK-NEXT: store <4 x i64> [[A3]], ptr [[P]], align 32, !nontemporal [[META2:![0-9]+]]
Expand All @@ -1398,7 +1398,7 @@ define void @movnt_ps(ptr %p, <8 x float> %a) nounwind #0 {
; CHECK-NEXT: unreachable
; CHECK: 4:
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P:%.*]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: store <8 x i32> [[TMP2]], ptr [[TMP7]], align 32
; CHECK-NEXT: store <8 x float> [[A:%.*]], ptr [[P]], align 32, !nontemporal [[META2]]
Expand All @@ -1424,7 +1424,7 @@ define void @movnt_pd(ptr %p, <4 x double> %a1) nounwind #0 {
; CHECK-NEXT: unreachable
; CHECK: 4:
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P:%.*]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: store <4 x i64> [[_MSPROP]], ptr [[TMP7]], align 32
; CHECK-NEXT: store <4 x double> [[A2]], ptr [[P]], align 32, !nontemporal [[META2]]
Expand Down
28 changes: 14 additions & 14 deletions ...morySanitizer/i386/avx2-intrinsics-x86.ll → ...orySanitizer/i386/avx2-intrinsics-i386.ll
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Expand Up @@ -2,7 +2,7 @@
; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s

target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
target triple = "i386-unknown-linux-gnu"

define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) #0 {
; CHECK-LABEL: @test_x86_avx2_packssdw(
Expand Down Expand Up @@ -496,7 +496,7 @@ define <16 x i16> @test_x86_avx2_psrl_w_load(<16 x i16> %a0, ptr %p) #0 {
; CHECK: 4:
; CHECK-NEXT: [[A1:%.*]] = load <8 x i16>, ptr [[P:%.*]], align 16
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: [[_MSLD:%.*]] = load <8 x i16>, ptr [[TMP7]], align 16
; CHECK-NEXT: [[TMP8:%.*]] = bitcast <8 x i16> [[_MSLD]] to i128
Expand Down Expand Up @@ -691,7 +691,7 @@ define <16 x i16> @test_x86_avx2_pmadd_ub_sw_load_op0(ptr %ptr, <32 x i8> %a1) #
; CHECK: 4:
; CHECK-NEXT: [[A0:%.*]] = load <32 x i8>, ptr [[PTR:%.*]], align 32
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i8>, ptr [[TMP7]], align 32
; CHECK-NEXT: [[TMP8:%.*]] = or <32 x i8> [[_MSLD]], [[TMP2]]
Expand Down Expand Up @@ -824,7 +824,7 @@ define <16 x i16> @test_x86_avx2_mpsadbw_load_op0(ptr %ptr, <32 x i8> %a1) #0 {
; CHECK: 4:
; CHECK-NEXT: [[A0:%.*]] = load <32 x i8>, ptr [[PTR:%.*]], align 32
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[PTR]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
; CHECK-NEXT: [[TMP6:%.*]] = and i64 [[TMP5]], -2147483649
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
; CHECK-NEXT: [[_MSLD:%.*]] = load <32 x i8>, ptr [[TMP7]], align 32
; CHECK-NEXT: [[TMP8:%.*]] = bitcast <32 x i8> [[_MSLD]] to i256
Expand Down Expand Up @@ -881,18 +881,18 @@ define <16 x i16> @test_x86_avx2_packusdw_fold() #0 {

define <32 x i8> @test_x86_avx2_pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) #0 {
; CHECK-LABEL: @test_x86_avx2_pblendvb(
; CHECK-NEXT: [[TMP1:%.*]] = load <32 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT: [[TMP4:%.*]] = load <32 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT: [[TMP2:%.*]] = load <32 x i8>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 32) to ptr), align 8
; CHECK-NEXT: [[TMP3:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: [[TMP9:%.*]] = load <32 x i8>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP4:%.*]] = ashr <32 x i8> [[A2:%.*]], splat (i8 7)
; CHECK-NEXT: [[TMP5:%.*]] = trunc <32 x i8> [[TMP4]] to <32 x i1>
; CHECK-NEXT: [[TMP6:%.*]] = ashr <32 x i8> [[TMP1]], splat (i8 7)
; CHECK-NEXT: [[TMP10:%.*]] = ashr <32 x i8> [[A2:%.*]], splat (i8 7)
; CHECK-NEXT: [[TMP5:%.*]] = trunc <32 x i8> [[TMP10]] to <32 x i1>
; CHECK-NEXT: [[TMP6:%.*]] = ashr <32 x i8> [[TMP4]], splat (i8 7)
; CHECK-NEXT: [[TMP7:%.*]] = trunc <32 x i8> [[TMP6]] to <32 x i1>
; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP5]], <32 x i8> [[TMP2]], <32 x i8> [[TMP3]]
; CHECK-NEXT: [[TMP9:%.*]] = xor <32 x i8> [[A1:%.*]], [[A0:%.*]]
; CHECK-NEXT: [[TMP10:%.*]] = or <32 x i8> [[TMP9]], [[TMP2]]
; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i8> [[TMP10]], [[TMP3]]
; CHECK-NEXT: [[TMP8:%.*]] = select <32 x i1> [[TMP5]], <32 x i8> [[TMP2]], <32 x i8> [[TMP9]]
; CHECK-NEXT: [[TMP3:%.*]] = xor <32 x i8> [[A1:%.*]], [[A0:%.*]]
; CHECK-NEXT: [[_MSPROP:%.*]] = or <32 x i8> [[TMP3]], [[TMP2]]
; CHECK-NEXT: [[TMP11:%.*]] = or <32 x i8> [[_MSPROP]], [[TMP9]]
; CHECK-NEXT: [[_MSPROP_SELECT:%.*]] = select <32 x i1> [[TMP7]], <32 x i8> [[TMP11]], <32 x i8> [[TMP8]]
; CHECK-NEXT: [[RES:%.*]] = call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> [[A0]], <32 x i8> [[A1]], <32 x i8> [[A2]])
; CHECK-NEXT: store <32 x i8> [[_MSPROP_SELECT]], ptr @__msan_retval_tls, align 8
Expand Down Expand Up @@ -2102,7 +2102,7 @@ define <8 x float> @test_gather_mask(<8 x float> %a0, ptr %a, <8 x i32> %idx, <
; CHECK-NEXT: unreachable
; CHECK: 12:
; CHECK-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[OUT:%.*]] to i64
; CHECK-NEXT: [[TMP14:%.*]] = xor i64 [[TMP13]], 87960930222080
; CHECK-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], -2147483649
; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr
; CHECK-NEXT: store <8 x i32> [[TMP4]], ptr [[TMP15]], align 4
; CHECK-NEXT: store <8 x float> [[MASK]], ptr [[OUT]], align 4
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/Instrumentation/MemorySanitizer/i386/mmx-intrinsics.ll
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Expand Up @@ -2,7 +2,7 @@
; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s

target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
target triple = "i386-unknown-linux-gnu"

declare <1 x i64> @llvm.x86.ssse3.phadd.w(<1 x i64>, <1 x i64>) nounwind readnone

Expand Down Expand Up @@ -2615,7 +2615,7 @@ define void @test25(ptr %p, <1 x i64> %a) nounwind optsize ssp #0 {
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[_MSPROP]] to <1 x i64>
; CHECK-NEXT: [[MMX_VAR_I:%.*]] = bitcast i64 [[TMP0]] to <1 x i64>
; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
; CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -2147483649
; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
; CHECK-NEXT: store <1 x i64> [[TMP3]], ptr [[TMP6]], align 1
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
Expand Down
2 changes: 1 addition & 1 deletion .../MemorySanitizer/i386/msan_x86_bts_asm.ll → ...MemorySanitizer/i386/msan_i386_bts_asm.ll
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Expand Up @@ -4,7 +4,7 @@
; RUN: opt < %s -msan-kernel=1 -msan-check-access-address=0 -msan-handle-asm-conservative=1 -S -passes=msan 2>&1 | FileCheck %s -check-prefixes=CONS

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
target triple = "i386-unknown-linux-gnu"

define dso_local i32 @main() sanitize_memory {
; CHECK-LABEL: define dso_local i32 @main(
Expand Down
14 changes: 7 additions & 7 deletions ...emorySanitizer/i386/msan_x86intrinsics.ll → ...morySanitizer/i386/msan_i386intrinsics.ll
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Expand Up @@ -5,7 +5,7 @@
; REQUIRES: x86-registered-target

target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
target triple = "i386-unknown-linux-gnu"

; Store intrinsic.

Expand All @@ -15,7 +15,7 @@ define void @StoreIntrinsic(ptr %p, <4 x float> %x) nounwind uwtable sanitize_me
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_tls to i64), i64 8) to ptr), align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr
; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP4]], align 1
; CHECK-NEXT: store <4 x float> [[X]], ptr [[P]], align 1
Expand All @@ -27,9 +27,9 @@ define void @StoreIntrinsic(ptr %p, <4 x float> %x) nounwind uwtable sanitize_me
; ORIGINS-NEXT: [[TMP2:%.*]] = load i32, ptr inttoptr (i64 add (i64 ptrtoint (ptr @__msan_param_origin_tls to i64), i64 8) to ptr), align 4
; ORIGINS-NEXT: call void @llvm.donothing()
; ORIGINS-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[P]] to i64
; ORIGINS-NEXT: [[TMP4:%.*]] = xor i64 [[TMP3]], 87960930222080
; ORIGINS-NEXT: [[TMP4:%.*]] = and i64 [[TMP3]], -2147483649
; ORIGINS-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr
; ORIGINS-NEXT: [[TMP6:%.*]] = add i64 [[TMP4]], 17592186044416
; ORIGINS-NEXT: [[TMP6:%.*]] = add i64 [[TMP4]], 1073741824
; ORIGINS-NEXT: [[TMP7:%.*]] = and i64 [[TMP6]], -4
; ORIGINS-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP7]] to ptr
; ORIGINS-NEXT: store <4 x i32> [[TMP1]], ptr [[TMP5]], align 1
Expand Down Expand Up @@ -64,7 +64,7 @@ define <16 x i8> @LoadIntrinsic(ptr %p) nounwind uwtable sanitize_memory {
; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -2147483649
; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
; CHECK-NEXT: [[_MSLD:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1
; CHECK-NEXT: [[CALL:%.*]] = call <16 x i8> @llvm.x86.sse3.ldu.dq(ptr [[P]])
Expand All @@ -75,9 +75,9 @@ define <16 x i8> @LoadIntrinsic(ptr %p) nounwind uwtable sanitize_memory {
; ORIGINS-SAME: ptr [[P:%.*]]) #[[ATTR0]] {
; ORIGINS-NEXT: call void @llvm.donothing()
; ORIGINS-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[P]] to i64
; ORIGINS-NEXT: [[TMP2:%.*]] = xor i64 [[TMP1]], 87960930222080
; ORIGINS-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], -2147483649
; ORIGINS-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
; ORIGINS-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 17592186044416
; ORIGINS-NEXT: [[TMP4:%.*]] = add i64 [[TMP2]], 1073741824
; ORIGINS-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], -4
; ORIGINS-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
; ORIGINS-NEXT: [[_MSLD:%.*]] = load <16 x i8>, ptr [[TMP3]], align 1
Expand Down
6 changes: 3 additions & 3 deletions ...emorySanitizer/i386/sse-intrinsics-x86.ll → ...morySanitizer/i386/sse-intrinsics-i386.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s

target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
target triple = "i386-unknown-linux-gnu"

define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) #0 {
; CHECK-LABEL: @test_x86_sse_cmp_ps(
Expand Down Expand Up @@ -203,7 +203,7 @@ define void @test_x86_sse_ldmxcsr(ptr %a0) #0 {
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A0:%.*]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr
; CHECK-NEXT: [[_LDMXCSR:%.*]] = load i32, ptr [[TMP4]], align 1
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
Expand Down Expand Up @@ -373,7 +373,7 @@ define void @test_x86_sse_stmxcsr(ptr %a0) #0 {
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[A0:%.*]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP2]], 87960930222080
; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], -2147483649
; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr
; CHECK-NEXT: store i32 0, ptr [[TMP4]], align 4
; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
Expand Down
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