[CVP] Add samesign flag to icmp

clang/test/CodeGen/aarch64-pure-scalable-args.c

@@ -405,7 +405,7 @@ void test_va_arg(int n, ...) {
 
 // CHECK-AAPCS-NEXT:   %new_reg_offs = add nsw i32 %gr_offs, 8
 // CHECK-AAPCS-NEXT:   store i32 %new_reg_offs, ptr %gr_offs_p, align 8
-// CHECK-AAPCS-NEXT:   %inreg = icmp ult i32 %gr_offs, -7
+// CHECK-AAPCS-NEXT:   %inreg = icmp samesign ult i32 %gr_offs, -7
 // CHECK-AAPCS-NEXT:   br i1 %inreg, label %vaarg.in_reg, label %vaarg.on_stack
 // CHECK-AAPCS-EMPTY:
 // CHECK-AAPCS-NEXT: vaarg.in_reg:                                     ; preds = %vaarg.maybe_reg

llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp

@@ -288,24 +288,35 @@ static bool processICmp(ICmpInst *Cmp, LazyValueInfo *LVI) {
   if (!Cmp->getOperand(0)->getType()->isIntOrIntVectorTy())
     return false;
 
-  if (!Cmp->isSigned())
+  if (!Cmp->isSigned() && (!Cmp->isUnsigned() || Cmp->hasSameSign()))
     return false;
 
-  ICmpInst::Predicate UnsignedPred =
-      ConstantRange::getEquivalentPredWithFlippedSignedness(
-          Cmp->getPredicate(),
-          LVI->getConstantRangeAtUse(Cmp->getOperandUse(0),
-                                     /*UndefAllowed*/ true),
-          LVI->getConstantRangeAtUse(Cmp->getOperandUse(1),
-                                     /*UndefAllowed*/ true));
+  bool Changed = false;
 
-  if (UnsignedPred == ICmpInst::Predicate::BAD_ICMP_PREDICATE)
-    return false;
+  ConstantRange CR1 = LVI->getConstantRangeAtUse(Cmp->getOperandUse(0),
+                                                 /*UndefAllowed=*/false),
+                CR2 = LVI->getConstantRangeAtUse(Cmp->getOperandUse(1),
+                                                 /*UndefAllowed=*/false);
 
-  ++NumSICmps;
-  Cmp->setPredicate(UnsignedPred);
+  if (Cmp->isSigned()) {
+    ICmpInst::Predicate UnsignedPred =
+        ConstantRange::getEquivalentPredWithFlippedSignedness(
+            Cmp->getPredicate(), CR1, CR2);
 
-  return true;
+    if (UnsignedPred == ICmpInst::Predicate::BAD_ICMP_PREDICATE)
+      return false;
+
+    ++NumSICmps;
+    Cmp->setPredicate(UnsignedPred);
+    Changed = true;
+  }
+
+  if (ConstantRange::areInsensitiveToSignednessOfICmpPredicate(CR1, CR2)) {
+    Cmp->setSameSign();
+    Changed = true;
+  }
+
+  return Changed;
 }
 
 /// See if LazyValueInfo's ability to exploit edge conditions or range

llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll

@@ -133,10 +133,10 @@ define void @test5(i32 %n) {
 ; CHECK-NEXT:    br i1 [[CMP]], label %[[LOOP:.*]], label %[[EXIT:.*]]
 ; CHECK:       [[LOOP]]:
 ; CHECK-NEXT:    [[A:%.*]] = phi i32 [ [[N]], %[[ENTRY]] ], [ [[SHR:%.*]], %[[LOOP]] ]
-; CHECK-NEXT:    [[COND:%.*]] = icmp ugt i32 [[A]], 4
+; CHECK-NEXT:    [[COND:%.*]] = icmp samesign ugt i32 [[A]], 4
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[COND]])
 ; CHECK-NEXT:    [[SHR]] = lshr i32 [[A]], 1
-; CHECK-NEXT:    [[LOOPCOND:%.*]] = icmp ugt i32 [[SHR]], 8
+; CHECK-NEXT:    [[LOOPCOND:%.*]] = icmp samesign ugt i32 [[SHR]], 8
 ; CHECK-NEXT:    br i1 [[LOOPCOND]], label %[[LOOP]], label %[[EXIT]]
 ; CHECK:       [[EXIT]]:
 ; CHECK-NEXT:    ret void

llvm/test/Transforms/CorrelatedValuePropagation/basic.ll

@@ -579,7 +579,7 @@ define i1 @umin(i32 %a, i32 %b) {
 ; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[B]], 20
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
 ; CHECK:       b_guard:
-; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp ult i32 [[A]], [[B]]
+; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp samesign ult i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i1 false
 ; CHECK:       out:
@@ -612,7 +612,7 @@ define i1 @smin(i32 %a, i32 %b) {
 ; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i32 [[B]], 20
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
 ; CHECK:       b_guard:
-; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp ule i32 [[A]], [[B]]
+; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp samesign ule i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i1 false
 ; CHECK:       out:
@@ -645,7 +645,7 @@ define i1 @smax(i32 %a, i32 %b) {
 ; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[B]], 20
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
 ; CHECK:       b_guard:
-; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp uge i32 [[A]], [[B]]
+; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp samesign uge i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i1 false
 ; CHECK:       out:
@@ -678,7 +678,7 @@ define i1 @umax(i32 %a, i32 %b) {
 ; CHECK-NEXT:    [[CMP2:%.*]] = icmp sgt i32 [[B]], 20
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[B_GUARD:%.*]], label [[OUT]]
 ; CHECK:       b_guard:
-; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp uge i32 [[A]], [[B]]
+; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp samesign uge i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[SEL_CMP]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i1 false
 ; CHECK:       out:
@@ -824,7 +824,7 @@ define i1 @clamp_low3(i32 noundef %a) {
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[A]], 5
 ; CHECK-NEXT:    br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
 ; CHECK:       a_guard:
-; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp ugt i32 [[A]], 5
+; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp samesign ugt i32 [[A]], 5
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[A]], -1
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 [[ADD]], i32 5
 ; CHECK-NEXT:    ret i1 false
@@ -852,7 +852,7 @@ define i1 @clamp_low4(i32 noundef %a) {
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[A]], 5
 ; CHECK-NEXT:    br i1 [[CMP]], label [[A_GUARD:%.*]], label [[OUT:%.*]]
 ; CHECK:       a_guard:
-; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp ule i32 [[A]], 5
+; CHECK-NEXT:    [[SEL_CMP:%.*]] = icmp samesign ule i32 [[A]], 5
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[A]], -1
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[SEL_CMP]], i32 5, i32 [[ADD]]
 ; CHECK-NEXT:    ret i1 false
@@ -1085,10 +1085,10 @@ define void @abs1(i32 %a, ptr %p) {
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[A]], 0
 ; CHECK-NEXT:    [[ABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
-; CHECK-NEXT:    [[C2:%.*]] = icmp ult i32 [[ABS]], 19
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ult i32 [[ABS]], 19
 ; CHECK-NEXT:    store i1 [[C2]], ptr [[P]], align 1
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
-; CHECK-NEXT:    [[C4:%.*]] = icmp uge i32 [[ABS]], 1
+; CHECK-NEXT:    [[C4:%.*]] = icmp samesign uge i32 [[ABS]], 1
 ; CHECK-NEXT:    store i1 [[C4]], ptr [[P]], align 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
@@ -1131,10 +1131,10 @@ define void @abs2(i32 %a, ptr %p) {
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[A]], 0
 ; CHECK-NEXT:    [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
-; CHECK-NEXT:    [[C2:%.*]] = icmp ult i32 [[ABS]], 19
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ult i32 [[ABS]], 19
 ; CHECK-NEXT:    store i1 [[C2]], ptr [[P]], align 1
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
-; CHECK-NEXT:    [[C4:%.*]] = icmp uge i32 [[ABS]], 1
+; CHECK-NEXT:    [[C4:%.*]] = icmp samesign uge i32 [[ABS]], 1
 ; CHECK-NEXT:    store i1 [[C4]], ptr [[P]], align 1
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
@@ -1934,7 +1934,7 @@ define void @select_assume(i32 %a, i32 %b, i1 %c, ptr %p) {
 ; CHECK-NEXT:    [[C2:%.*]] = icmp ult i32 [[B]], 20
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[C2]])
 ; CHECK-NEXT:    [[S:%.*]] = select i1 [[C]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    [[C3:%.*]] = icmp ult i32 [[S]], 19
+; CHECK-NEXT:    [[C3:%.*]] = icmp samesign ult i32 [[S]], 19
 ; CHECK-NEXT:    store i1 [[C3]], ptr [[P]], align 1
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
 ; CHECK-NEXT:    ret void
@@ -1957,10 +1957,10 @@ define void @xor(i8 %a, ptr %p) {
 ; CHECK-NEXT:    [[A_MASK:%.*]] = and i8 [[A]], 15
 ; CHECK-NEXT:    [[XOR:%.*]] = xor i8 [[A_MASK]], -86
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
-; CHECK-NEXT:    [[C2:%.*]] = icmp ugt i8 [[XOR]], -96
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ugt i8 [[XOR]], -96
 ; CHECK-NEXT:    store i1 [[C2]], ptr [[P]], align 1
 ; CHECK-NEXT:    store i1 true, ptr [[P]], align 1
-; CHECK-NEXT:    [[C4:%.*]] = icmp ult i8 [[XOR]], -81
+; CHECK-NEXT:    [[C4:%.*]] = icmp samesign ult i8 [[XOR]], -81
 ; CHECK-NEXT:    store i1 [[C4]], ptr [[P]], align 1
 ; CHECK-NEXT:    ret void
 ;

llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll

@@ -13,7 +13,7 @@ define void @test_icmp_from_implied_cond(i32 %a, i32 %b) {
 ; CHECK-NEXT:    br i1 [[COND]], label [[L2:%.*]], label [[END]]
 ; CHECK:       l2:
 ; CHECK-NEXT:    call void @use(i1 true)
-; CHECK-NEXT:    [[B_CMP2:%.*]] = icmp ult i32 [[B]], 31
+; CHECK-NEXT:    [[B_CMP2:%.*]] = icmp samesign ult i32 [[B]], 31
 ; CHECK-NEXT:    call void @use(i1 [[B_CMP2]])
 ; CHECK-NEXT:    ret void
 ; CHECK:       end:
@@ -74,7 +74,7 @@ define void @test_icmp_from_implied_range(i16 %x, i32 %b) {
 ; CHECK-NEXT:    br i1 [[COND]], label [[L1:%.*]], label [[END:%.*]]
 ; CHECK:       l1:
 ; CHECK-NEXT:    call void @use(i1 true)
-; CHECK-NEXT:    [[B_CMP2:%.*]] = icmp ult i32 [[B]], 65534
+; CHECK-NEXT:    [[B_CMP2:%.*]] = icmp samesign ult i32 [[B]], 65534
 ; CHECK-NEXT:    call void @use(i1 [[B_CMP2]])
 ; CHECK-NEXT:    ret void
 ; CHECK:       end:

llvm/test/Transforms/CorrelatedValuePropagation/deopt.ll

@@ -97,7 +97,7 @@ define void @test3(i1 %c, i1 %c2) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[C:%.*]], i64 0, i64 1
 ; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C2:%.*]], i64 [[SEL]], i64 2
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[SEL2]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ugt i64 [[SEL2]], 1
 ; CHECK-NEXT:    br i1 [[CMP]], label [[TAKEN:%.*]], label [[UNTAKEN:%.*]]
 ; CHECK:       taken:
 ; CHECK-NEXT:    call void @use() [ "deopt"(i64 2) ]
@@ -122,7 +122,7 @@ define void @test4(i1 %c, i1 %c2) {
 ; CHECK-NEXT:    [[SEL2:%.*]] = select i1 [[C2:%.*]], i64 0, i64 1
 ; CHECK-NEXT:    [[ADD1:%.*]] = add nuw nsw i64 0, [[SEL]]
 ; CHECK-NEXT:    [[ADD2:%.*]] = add nuw nsw i64 [[ADD1]], [[SEL2]]
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[ADD2]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp samesign ugt i64 [[ADD2]], 1
 ; CHECK-NEXT:    br i1 [[CMP]], label [[TAKEN:%.*]], label [[UNTAKEN:%.*]]
 ; CHECK:       taken:
 ; CHECK-NEXT:    call void @use() [ "deopt"(i64 2) ]

llvm/test/Transforms/CorrelatedValuePropagation/icmp.ll

@@ -128,7 +128,7 @@ define i1 @test4(i32 %x, i32 %y) #0 {
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]
 ; CHECK:       cont2:
 ; CHECK-NEXT:    [[ADD:%.*]] = add nuw nsw i32 [[X]], [[Y]]
-; CHECK-NEXT:    [[CMP3:%.*]] = icmp ult i32 [[ADD]], 15
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp samesign ult i32 [[ADD]], 15
 ; CHECK-NEXT:    br label [[OUT]]
 ; CHECK:       out:
 ; CHECK-NEXT:    [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT2]] ]
@@ -198,7 +198,7 @@ define i1 @test6(i32 %x, i32 %y) #0 {
 ; CHECK-NEXT:    br i1 [[CMP2]], label [[CONT2:%.*]], label [[OUT]]
 ; CHECK:       cont2:
 ; CHECK-NEXT:    [[SHIFTED:%.*]] = shl nuw nsw i32 [[X]], [[Y]]
-; CHECK-NEXT:    [[CMP3:%.*]] = icmp ult i32 [[SHIFTED]], 65536
+; CHECK-NEXT:    [[CMP3:%.*]] = icmp samesign ult i32 [[SHIFTED]], 65536
 ; CHECK-NEXT:    br label [[OUT]]
 ; CHECK:       out:
 ; CHECK-NEXT:    [[RET:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ true, [[CONT1]] ], [ [[CMP3]], [[CONT2]] ]
@@ -1265,7 +1265,7 @@ define void @ashr_sgt(i8 %x) {
 ; CHECK-NEXT:    br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
 ; CHECK:       if:
 ; CHECK-NEXT:    call void @check1(i1 true)
-; CHECK-NEXT:    [[C3:%.*]] = icmp ugt i8 [[X]], 8
+; CHECK-NEXT:    [[C3:%.*]] = icmp samesign ugt i8 [[X]], 8
 ; CHECK-NEXT:    call void @check1(i1 [[C3]])
 ; CHECK-NEXT:    ret void
 ; CHECK:       else:
@@ -1291,7 +1291,7 @@ define void @ashr_sge(i8 %x) {
 ; CHECK-NEXT:    br i1 [[C]], label [[IF:%.*]], label [[ELSE:%.*]]
 ; CHECK:       if:
 ; CHECK-NEXT:    call void @check1(i1 true)
-; CHECK-NEXT:    [[C3:%.*]] = icmp uge i8 [[X]], 5
+; CHECK-NEXT:    [[C3:%.*]] = icmp samesign uge i8 [[X]], 5
 ; CHECK-NEXT:    call void @check1(i1 [[C3]])
 ; CHECK-NEXT:    ret void
 ; CHECK:       else:
@@ -1374,7 +1374,7 @@ define i1 @pr69928(i64 noundef %arg, i64 noundef %arg1) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG:%.*]], 64424509440
 ; CHECK-NEXT:    [[AND:%.*]] = and i64 [[ARG1:%.*]], 4294967295
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i64 [[ARG]], [[AND]]
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ult i64 [[ARG]], [[AND]]
 ; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
 ; CHECK-NEXT:    ret i1 [[SELECT]]
 ;
@@ -1390,7 +1390,7 @@ define i1 @test_select_flip(i64 noundef %arg) {
 ; CHECK-LABEL: @test_select_flip(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i64 [[ARG:%.*]], 1000
-; CHECK-NEXT:    [[CMP2:%.*]] = icmp ult i64 [[ARG]], 100
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp samesign ult i64 [[ARG]], 100
 ; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
 ; CHECK-NEXT:    ret i1 [[SELECT]]
 ;

llvm/test/Transforms/CorrelatedValuePropagation/minmaxabs.ll

@@ -12,7 +12,7 @@ define void @test_umin(i32 %x) {
 ; CHECK-LABEL: @test_umin(
 ; CHECK-NEXT:    [[M:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 10)
 ; CHECK-NEXT:    call void @use(i1 true)
-; CHECK-NEXT:    [[C2:%.*]] = icmp ult i32 [[M]], 10
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ult i32 [[M]], 10
 ; CHECK-NEXT:    call void @use(i1 [[C2]])
 ; CHECK-NEXT:    ret void
 ;
@@ -60,7 +60,7 @@ define void @test_smax(i32 %x) {
 ; CHECK-LABEL: @test_smax(
 ; CHECK-NEXT:    [[M:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 10)
 ; CHECK-NEXT:    call void @use(i1 true)
-; CHECK-NEXT:    [[C2:%.*]] = icmp ugt i32 [[M]], 10
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ugt i32 [[M]], 10
 ; CHECK-NEXT:    call void @use(i1 [[C2]])
 ; CHECK-NEXT:    ret void
 ;
@@ -77,7 +77,7 @@ define void @test_abs1(ptr %p) {
 ; CHECK-NEXT:    [[X:%.*]] = load i32, ptr [[P:%.*]], align 4, !range [[RNG0:![0-9]+]]
 ; CHECK-NEXT:    [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X]], i1 true)
 ; CHECK-NEXT:    call void @use(i1 true)
-; CHECK-NEXT:    [[C2:%.*]] = icmp ult i32 [[A]], 15
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ult i32 [[A]], 15
 ; CHECK-NEXT:    call void @use(i1 [[C2]])
 ; CHECK-NEXT:    ret void
 ;
@@ -110,7 +110,7 @@ define void @test_abs3(i32 %x) {
 ; CHECK-LABEL: @test_abs3(
 ; CHECK-NEXT:    [[A:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
 ; CHECK-NEXT:    call void @use(i1 true)
-; CHECK-NEXT:    [[C2:%.*]] = icmp ugt i32 [[A]], 0
+; CHECK-NEXT:    [[C2:%.*]] = icmp samesign ugt i32 [[A]], 0
 ; CHECK-NEXT:    call void @use(i1 [[C2]])
 ; CHECK-NEXT:    ret void
 ;

llvm/test/Transforms/CorrelatedValuePropagation/overflow_predicate.ll

@@ -49,7 +49,7 @@ define i1 @uadd_ov_true(i8 %x, ptr %px, ptr %pc) {
 ; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
 ; CHECK-NEXT:    br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
 ; CHECK:       overflow:
-; CHECK-NEXT:    [[C1:%.*]] = icmp ugt i8 [[X]], -100
+; CHECK-NEXT:    [[C1:%.*]] = icmp samesign ugt i8 [[X]], -100
 ; CHECK-NEXT:    store i1 [[C1]], ptr [[PC:%.*]], align 1
 ; CHECK-NEXT:    ret i1 true
 ; CHECK:       trap:
@@ -113,7 +113,7 @@ define i1 @sadd_ov_true(i8 %x, ptr %px, ptr %pc) {
 ; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
 ; CHECK-NEXT:    br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
 ; CHECK:       overflow:
-; CHECK-NEXT:    [[C1:%.*]] = icmp ugt i8 [[X]], 28
+; CHECK-NEXT:    [[C1:%.*]] = icmp samesign ugt i8 [[X]], 28
 ; CHECK-NEXT:    store i1 [[C1]], ptr [[PC:%.*]], align 1
 ; CHECK-NEXT:    ret i1 true
 ; CHECK:       trap:
@@ -177,7 +177,7 @@ define i1 @usub_ov_true(i8 %x, ptr %px, ptr %pc) {
 ; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
 ; CHECK-NEXT:    br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
 ; CHECK:       overflow:
-; CHECK-NEXT:    [[C1:%.*]] = icmp ult i8 [[X]], 99
+; CHECK-NEXT:    [[C1:%.*]] = icmp samesign ult i8 [[X]], 99
 ; CHECK-NEXT:    store i1 [[C1]], ptr [[PC:%.*]], align 1
 ; CHECK-NEXT:    ret i1 true
 ; CHECK:       trap:
@@ -241,7 +241,7 @@ define i1 @ssub_ov_true(i8 %x, ptr %px, ptr %pc) {
 ; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
 ; CHECK-NEXT:    br i1 [[OV]], label [[OVERFLOW:%.*]], label [[TRAP:%.*]]
 ; CHECK:       overflow:
-; CHECK-NEXT:    [[C1:%.*]] = icmp ult i8 [[X]], -29
+; CHECK-NEXT:    [[C1:%.*]] = icmp samesign ult i8 [[X]], -29
 ; CHECK-NEXT:    store i1 [[C1]], ptr [[PC:%.*]], align 1
 ; CHECK-NEXT:    ret i1 true
 ; CHECK:       trap:
@@ -273,7 +273,7 @@ define i1 @umul_ov_false(i8 %x, ptr %px, ptr %pc) {
 ; CHECK-NEXT:    [[OV:%.*]] = extractvalue { i8, i1 } [[VAL_OV]], 1
 ; CHECK-NEXT:    br i1 [[OV]], label [[TRAP:%.*]], label [[NO_OVERFLOW:%.*]]
 ; CHECK:       no_overflow:
-; CHECK-NEXT:    [[C1:%.*]] = icmp ugt i8 [[X]], 24
+; CHECK-NEXT:    [[C1:%.*]] = icmp samesign ugt i8 [[X]], 24
 ; CHECK-NEXT:    store i1 [[C1]], ptr [[PC:%.*]], align 1
 ; CHECK-NEXT:    ret i1 false
 ; CHECK:       trap:

llvm/test/Transforms/CorrelatedValuePropagation/range.ll

@@ -64,7 +64,7 @@ define i32 @test3(i32 %c) nounwind {
 ; CHECK:       if.then:
 ; CHECK-NEXT:    ret i32 1
 ; CHECK:       if.end:
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp ult i32 [[C]], 3
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp samesign ult i32 [[C]], 3
 ; CHECK-NEXT:    br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END8:%.*]]
 ; CHECK:       if.then2:
 ; CHECK-NEXT:    br i1 true, label [[IF_THEN4:%.*]], label [[IF_END6:%.*]]
@@ -989,11 +989,11 @@ define i1 @ctlz_nofold(i16 %x) {
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
 ; CHECK:       if:
 ; CHECK-NEXT:    [[CTLZ:%.*]] = call i16 @llvm.ctlz.i16(i16 [[X]], i1 false)
-; CHECK-NEXT:    [[RES:%.*]] = icmp uge i16 [[CTLZ]], 9
+; CHECK-NEXT:    [[RES:%.*]] = icmp samesign uge i16 [[CTLZ]], 9
 ; CHECK-NEXT:    ret i1 [[RES]]
 ; CHECK:       else:
 ; CHECK-NEXT:    [[CTLZ2:%.*]] = call i16 @llvm.ctlz.i16(i16 [[X]], i1 false)
-; CHECK-NEXT:    [[RES2:%.*]] = icmp ult i16 [[CTLZ2]], 7
+; CHECK-NEXT:    [[RES2:%.*]] = icmp samesign ult i16 [[CTLZ2]], 7
 ; CHECK-NEXT:    ret i1 [[RES2]]
 ;
   %cmp = icmp ult i16 %x, 256
@@ -1038,7 +1038,7 @@ define i1 @cttz_nofold1(i16 %x) {
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
 ; CHECK:       if:
 ; CHECK-NEXT:    [[CTTZ:%.*]] = call i16 @llvm.cttz.i16(i16 [[X]], i1 true)
-; CHECK-NEXT:    [[RES:%.*]] = icmp uge i16 [[CTTZ]], 7
+; CHECK-NEXT:    [[RES:%.*]] = icmp samesign uge i16 [[CTTZ]], 7
 ; CHECK-NEXT:    ret i1 [[RES]]
 ; CHECK:       else:
 ; CHECK-NEXT:    ret i1 false
@@ -1061,7 +1061,7 @@ define i1 @cttz_nofold2(i16 %x) {
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
 ; CHECK:       if:
 ; CHECK-NEXT:    [[CTTZ:%.*]] = call i16 @llvm.cttz.i16(i16 [[X]], i1 false)
-; CHECK-NEXT:    [[RES:%.*]] = icmp uge i16 [[CTTZ]], 8
+; CHECK-NEXT:    [[RES:%.*]] = icmp samesign uge i16 [[CTTZ]], 8
 ; CHECK-NEXT:    ret i1 [[RES]]
 ; CHECK:       else:
 ; CHECK-NEXT:    ret i1 false
@@ -1106,7 +1106,7 @@ define i1 @ctpop_nofold(i16 %x) {
 ; CHECK-NEXT:    br i1 [[CMP]], label [[IF:%.*]], label [[ELSE:%.*]]
 ; CHECK:       if:
 ; CHECK-NEXT:    [[CTPOP:%.*]] = call i16 @llvm.ctpop.i16(i16 [[X]])
-; CHECK-NEXT:    [[RES:%.*]] = icmp ule i16 [[CTPOP]], 7
+; CHECK-NEXT:    [[RES:%.*]] = icmp samesign ule i16 [[CTPOP]], 7
 ; CHECK-NEXT:    ret i1 [[RES]]
 ; CHECK:       else:
 ; CHECK-NEXT:    ret i1 true