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[llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove #115645

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Merged
merged 1 commit into from
Nov 11, 2024
Merged

[llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove #115645

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10 changes: 8 additions & 2 deletions llvm/lib/Target/X86/X86PfmCounters.td
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Original file line number Diff line number Diff line change
Expand Up @@ -210,7 +210,10 @@ def AlderLakePfmCounters : ProcPfmCounters {
let IssueCounters = [
PfmIssueCounter<"ADLPPort00", "uops_dispatched_port:port_0">,
PfmIssueCounter<"ADLPPort01", "uops_dispatched_port:port_1">,
PfmIssueCounter<"ADLPPort02_03_10", "uops_dispatched_port:port_2_3_10">,
// The perfmon documentation and thus libpfm seems to incorrectly label
// this performance counter, as ports 2,3, and 11 are actually grouped
// according to most documentation. See #113941 for additional details.
PfmIssueCounter<"ADLPPort02_03_11", "uops_dispatched_port:port_2_3_10">,
PfmIssueCounter<"ADLPPort04_09", "uops_dispatched_port:port_4_9">,
PfmIssueCounter<"ADLPPort05_11", "uops_dispatched_port:port_5_11">,
PfmIssueCounter<"ADLPPort06", "uops_dispatched_port:port_6">,
Expand All @@ -226,7 +229,10 @@ def SapphireRapidsPfmCounters : ProcPfmCounters {
let IssueCounters = [
PfmIssueCounter<"SPRPort00", "uops_dispatched_port:port_0">,
PfmIssueCounter<"SPRPort01", "uops_dispatched_port:port_1">,
PfmIssueCounter<"SPRPort02_03_10", "uops_dispatched_port:port_2_3_10">,
// The perfmon documentation and thus libpfm seems to incorrectly label
// this performance counter, as ports 2,3, and 11 are actually grouped
// according to most documentation. See #113941 for additional details.
PfmIssueCounter<"SPRPort02_03_11", "uops_dispatched_port:port_2_3_10">,
PfmIssueCounter<"SPRPort04_09", "uops_dispatched_port:port_4_9">,
PfmIssueCounter<"SPRPort05_11", "uops_dispatched_port:port_5_11">,
PfmIssueCounter<"SPRPort06", "uops_dispatched_port:port_6">,
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1 change: 0 additions & 1 deletion llvm/lib/Target/X86/X86SchedAlderlakeP.td
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Expand Up @@ -60,7 +60,6 @@ def ADLPPort01_05_10 : ProcResGroup<[ADLPPort01, ADLPPort05, ADLPPort10]>;
def ADLPPort02_03 : ProcResGroup<[ADLPPort02, ADLPPort03]>;
def ADLPPort02_03_07 : ProcResGroup<[ADLPPort02, ADLPPort03, ADLPPort07]>;
def ADLPPort02_03_11 : ProcResGroup<[ADLPPort02, ADLPPort03, ADLPPort11]>;
def ADLPPort02_03_10 : ProcResGroup<[ADLPPort02, ADLPPort03, ADLPPort10]>;
def ADLPPort05_11 : ProcResGroup<[ADLPPort05, ADLPPort11]>;
def ADLPPort07_08 : ProcResGroup<[ADLPPort07, ADLPPort08]>;

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1 change: 0 additions & 1 deletion llvm/lib/Target/X86/X86SchedSapphireRapids.td
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Expand Up @@ -59,7 +59,6 @@ def SPRPort01_05 : ProcResGroup<[SPRPort01, SPRPort05]>;
def SPRPort01_05_10 : ProcResGroup<[SPRPort01, SPRPort05, SPRPort10]>;
def SPRPort02_03 : ProcResGroup<[SPRPort02, SPRPort03]>;
def SPRPort02_03_11 : ProcResGroup<[SPRPort02, SPRPort03, SPRPort11]>;
def SPRPort02_03_10 : ProcResGroup<[SPRPort02, SPRPort03, SPRPort10]>;
def SPRPort05_11 : ProcResGroup<[SPRPort05, SPRPort11]>;
def SPRPort07_08 : ProcResGroup<[SPRPort07, SPRPort08]>;

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