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[GlobalISel] Move DemandedElt's APInt size assert after isValid() check #115979

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Merged
merged 1 commit into from
Nov 18, 2024
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[GlobalISel] Move DemandedElt's APInt size assert after isValid() check #115979

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18 changes: 9 additions & 9 deletions llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -147,6 +147,15 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
unsigned Opcode = MI.getOpcode();
LLT DstTy = MRI.getType(R);

// Handle the case where this is called on a register that does not have a
// type constraint (i.e. it has a register class constraint instead). This is
Comment on lines +150 to +151
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These are not mutually exclusive. A register class constraint does not imply there is no LLT

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That's true but I'm just moving the existing code in this PR so that we check the LLT is valid before asserting on properties of it. Do you want me to fix that in the same PR?

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Might as well fix the comment while you're moving it

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#116083. I can merge that PR into this one if you want to do both at the same time

// unlikely to occur except by looking through copies but it is possible for
// the initial register being queried to be in this state.
if (!DstTy.isValid()) {
Known = KnownBits();
return;
}

#ifndef NDEBUG
if (DstTy.isFixedVector()) {
assert(
Expand All @@ -158,15 +167,6 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
}
#endif

// Handle the case where this is called on a register that does not have a
// type constraint (i.e. it has a register class constraint instead). This is
// unlikely to occur except by looking through copies but it is possible for
// the initial register being queried to be in this state.
if (!DstTy.isValid()) {
Known = KnownBits();
return;
}

unsigned BitWidth = DstTy.getScalarSizeInBits();
auto CacheEntry = ComputeKnownBitsCache.find(R);
if (CacheEntry != ComputeKnownBitsCache.end()) {
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